CEM3252L

N-Channel Enhancement Mode Field Effect Transistor FEATURES 30V, 8A, RDS(ON) = 29mΩ @VGS = 10V. RDS(ON) = 36mΩ @VGS = 4.5V. RDS(ON) = 55mΩ @VGS = 2.5V. Super high dense cell design for extremely low RDS(ON). High power and current handing capability. Lead free product is acquired. Surface mount Package. CEM3252L 5 D 8 D 7 D 6 D 5 SO-8 1 1 S 2 S 3 S 4 G ABSOLUTE MAXIMUM RATINGS Parameter Drain-Source Voltage Gate-Source Voltage Drain Current-Continuous Drain Current-Pulsed a TA = 25 C unless otherwise noted Symbol VDS VGS ID IDM PD TJ,Tstg Limit 30 Units V V A A W C ±12 7.3 28 2.5 -55 to 150 Maximum Power Dissipation Operating and Store Temperature Range Thermal Characteristics Parameter Thermal Resistance, Junction-to-Ambient b Symbol RθJA Limit 50 Units C/W Details are subject to change without notice . 1 Rev 2. 2007.Aug. http://www.cetsemi.com CEM3252L Electrical Characteristics Parameter Off Characteristics Drain-Source Breakdown Voltage Zero Gate Voltage Drain Current Gate Body Leakage Current, Forward Gate Body Leakage Current, Reverse On Characteristics c Gate Threshold Voltage Static Drain-Source On-Resistance Dynamic Characteristics Input Capacitance Output Capacitance Reverse Transfer Capacitance Switching Characteristics d Turn-On Delay Time Turn-On Rise Time Turn-Off Delay Time Turn-Off Fall Time Total Gate Charge Gate-Source Charge Gate-Drain Charge Drain-Source Diode Forward Current b Drain-Source Diode Forward Voltage c td(on) tr td(off) tf Qg Qgs Qgd IS VSD VGS = 0V, IS = 1A VDS = 15V, ID =5.8A, VGS = 4.5V VDD = 15V, ID = 5.5A, VGS = 10V, RGEN = 3Ω 9 4 36 4 9.2 2.5 2.4 7.3 1 18 8 72 8 12.2 ns ns ns ns nC nC nC A V d TA = 25 C unless otherwise noted Symbol BVDSS IDSS IGSSF IGSSR VGS(th) RDS(on) Test Condition VGS = 0V, ID = 250µA VDS = 30V, VGS = 0V VGS = 12V, VDS = 0V VGS = -12V, VDS = 0V VGS = VDS, ID = 250µA VGS =10V, ID = 7.3A VGS = 4.5V, ID = 6A VGS = 2.5V, ID = 5A Ciss Coss Crss 0.7 24 28 40 615 130 85 Min 30 1 100 -100 1.4 29 36 55 Typ Max Units V µA nA nA V mΩ mΩ mΩ pF pF pF 7 VDS = 15V, VGS = 0V, f = 1.0 MHz Drain-Source Diode Characteristics and Maximun Ratings Notes : a.Repetitive Rating : Pulse width limited by maximum junction temperature. b.Surface Mounted on FR4 Board, t < 5 sec. c.Pulse Test : Pulse Width < 300µs, Duty Cycle < 2%. d.Guaranteed by design, not subject to production testing. 2 CEM3252L 10 8 6 4 2 0 VGS=10,8,6,4V VGS=2V 15 25 C 12 9 6 3 0 ID, Drain Current (A) ID, Drain Current (A) TJ=125 C 0 1 2 -55 C 4 5 6 0 0.5 1 1.5 2 2.5 VDS, Drain-to-Source Voltage (V) Figure 1. Output Characteristics 1200 1000 800 600 400 200 0 Coss Crss 0 5 10 15 20 25 2.2 1.9 1.6 1.3 1.0 0.7 0.4 -100 VGS, Gate-to-Source Voltage (V) Figure 2. Transfer Characteristics ID=7.3A VGS=10V Ciss RDS(ON), Normalized RDS(ON), On-Resistance(Ohms) C, Capacitance (pF) -50 0 50 100 150 200 VDS, Drain-to-Source Voltage (V) Figure 3. Capacitance 1.3 1.2 1.1 1.0 0.9 0.8 0.7 0.6 -50 VDS=VGS TJ, Junction Temperature( C) Figure 4. On-Resistance Variation with Temperature IS, Source-drain current (A) VGS=0V 10 1 VTH, Normalized Gate-Source Threshold Voltage ID=250µA 10 0 -25 0 25 50 75 100 125 150 10 -1 0.4 0.6 0.8 1.0 1.2 1.4 TJ, Junction Temperature( C) Figure 5. Gate Threshold Variation with Temperature VSD, Body Diode Forward Voltage (V) Figure 6. Body Diode Forward Voltage Variation with Source Current 3 CEM3252L VGS, Gate to Source Voltage (V) 5 VDS=15V ID=7.3A 10 2 RDS(ON)Limit ID, Drain Current (A) 4 4 10ms 100ms 1s DC 10 1 3 10 0 2 1 10 -1 0 0 2 4 6 8 10 10 -2 TA=25 C TJ=150 C Single Pulse 10 -2 10 -1 10 0 10 1 10 2 Qg, Total Gate Charge (nC) Figure 7. Gate Charge VDS, Drain-Source Voltage (V) Figure 8. Maximum Safe Operating Area VDD t on V IN D VGS RGEN G 90% toff tr 90% RL VOUT td(on) VOUT td(off) 90% 10% tf 10% INVERTED S VIN 50% 10% 50% PULSE WIDTH Figure 9. Switching Test Circuit Figure 10. Switching Waveforms 10 0 r(t),Normalized Effective Transient Thermal Impedance D=0.5 0.2 10 -1 0.1 0.05 0.02 0.01 PDM t1 t2 Single Pulse 1. RθJA (t)=r (t) * RθJA 2. RθJA=See Datasheet 3. TJM-TA = P* RθJA (t) 4. Duty Cycle, D=t1/t2 10 -2 10 -3 10 -4 10 -3 10 -2 10 -1 10 0 10 1 10 2 Square Wave Pulse Duration (sec) Figure 11. Normalized Thermal Transient Impedance Curve 4