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CEP13N10_08

CEP13N10_08

  • 厂商:

    CET(华瑞)

  • 封装:

  • 描述:

    CEP13N10_08 - N-Channel Enhancement Mode Field Effect Transistor - Chino-Excel Technology

  • 数据手册
  • 价格&库存
CEP13N10_08 数据手册
N-Channel Enhancement Mode Field Effect Transistor FEATURES 100V, 12.8A, RDS(ON) = 180mΩ @VGS = 10V. Super high dense cell design for extremely low RDS(ON). High power and current handing capability. Lead free product is acquired. TO-220 & TO-263 package. CEP13N10/CEB13N10 D D G G D S S CEB SERIES TO-263(DD-PAK) G CEP SERIES TO-220 S ABSOLUTE MAXIMUM RATINGS Parameter Drain-Source Voltage Gate-Source Voltage Drain Current-Continuous Drain Current-Pulsed a Tc = 25 C unless otherwise noted Symbol Limit VDS VGS ID IDM PD TJ,Tstg 100 Units V V A A W W/ C C ±20 12.8 50 65 0.43 -55 to 175 Maximum Power Dissipation @ TC = 25 C - Derate above 25 C Operating and Store Temperature Range Thermal Characteristics Parameter Thermal Resistance, Junction-to-Case Thermal Resistance, Junction-to-Ambient Symbol RθJC RθJA Limit 2.3 62.5 Units C/W C/W Details are subject to change without notice . 1 Rev 2. 2008.Jan. http://www.cetsemi.com CEP13N10/CEB13N10 Electrical Characteristics Parameter Off Characteristics Drain-Source Breakdown Voltage Zero Gate Voltage Drain Current Gate Body Leakage Current, Forward Gate Body Leakage Current, Reverse On Characteristics b Gate Threshold Voltage Static Drain-Source On-Resistance Forward Transconductance Dynamic Characteristics Input Capacitance Output Capacitance Reverse Transfer Capacitance Switching Characteristics c Turn-On Delay Time Turn-On Rise Time Turn-Off Delay Time Turn-Off Fall Time Total Gate Charge Gate-Source Charge Gate-Drain Charge Drain-Source Diode Forward Current Drain-Source Diode Forward Voltage b td(on) tr td(off) tf Qg Qgs Qgd IS VSD VGS = 0V, IS = 12.8A VDS = 80V, ID = 12.8A, VGS = 10V VDD = 80, ID = 12.8A, VGS = 10V, RGEN = 9.1Ω 10 8 17 8 12 3.3 5.3 12.8 1.5 20 16 35 16 16 ns ns ns ns nC nC nC A V c Tc = 25 C unless otherwise noted Symbol BVDSS IDSS IGSSF IGSSR VGS(th) RDS(on) gFS Ciss Coss Crss Test Condition VGS = 0V, ID = 250µA VDS = 100V, VGS = 0V VGS = 20V, VDS = 0V VGS = -20V, VDS = 0V VGS = VDS, ID = 250µA VGS = 10V, ID = 6A VDS = 10V, ID = 6A 2 140 5 295 85 35 Min 100 1 100 -100 4 180 Typ Max Units V µA nA nA V mΩ S pF pF pF VDS = 25V, VGS = 0V, f = 1.0 MHz Drain-Source Diode Characteristics and Maximun Ratings Notes : a.Repetitive Rating : Pulse width limited by maximum junction temperature b.Pulse Test : Pulse Width < 300µs, Duty Cycle < 2%. c.Guaranteed by design, not subject to production testing. 2 CEP13N10/CEB13N10 24 VGS=10,9,8V 25 VGS=7V ID, Drain Current (A) 16 12 8 4 0 0 2 4 6 8 10 ID, Drain Current (A) 20 20 15 VGS=6V 10 VGS=5V 5 TJ=125 C 0 1 2 3 4 25 C -55 C 5 6 7 VDS, Drain-to-Source Voltage (V) Figure 1. Output Characteristics 600 500 400 Ciss 300 200 100 0 0 5 10 15 20 25 Coss Crss 2.6 2.2 1.8 1.4 1.0 0.6 0.2 -100 VGS, Gate-to-Source Voltage (V) Figure 2. Transfer Characteristics RDS(ON), Normalized RDS(ON), On-Resistance(Ohms) ID=6A VGS=10V C, Capacitance (pF) -50 0 50 100 150 200 VDS, Drain-to-Source Voltage (V) Figure 3. Capacitance 1.3 1.2 1.1 1.0 0.9 0.8 0.7 0.6 -50 TJ, Junction Temperature( C) Figure 4. On-Resistance Variation with Temperature VGS=0V 1 VTH, Normalized Gate-Source Threshold Voltage VDS=VGS ID=250µA IS, Source-drain current (A) 25 50 75 100 125 150 10 10 0 10 -25 0 -1 0.2 0.6 1.0 1.4 1.8 2.2 TJ, Junction Temperature( C) Figure 5. Gate Threshold Variation with Temperature VSD, Body Diode Forward Voltage (V) Figure 6. Body Diode Forward Voltage Variation with Source Current 3 CEP13N10/CEB13N10 VGS, Gate to Source Voltage (V) 10 8 6 4 2 0 VDS=80V ID=12.8A 10 2 RDS(ON)Limit ID, Drain Current (A) 100ms 10 1 1ms 10ms DC 10 0 0 2 4 6 8 10 12 10 -1 TC=25 C TJ=175 C Single Pulse 10 -1 10 0 10 1 10 2 Qg, Total Gate Charge (nC) Figure 7. Gate Charge VDD t on V IN VGS RGEN G RL D VOUT td(on) VOUT 10% VDS, Drain-Source Voltage (V) Figure 8. Maximum Safe Operating Area toff tr 90% td(off) 90% 10% tf INVERTED 90% S VIN 50% 10% 50% PULSE WIDTH Figure 9. Switching Test Circuit Figure 10. Switching Waveforms r(t),Normalized Effective Transient Thermal Impedance 10 0 D=0.5 0.2 10 -1 0.1 0.05 0.02 0.01 Single Pulse PDM t1 t2 10 -2 1. RθJC (t)=r (t) * RθJC 2. RθJC=See Datasheet 3. TJM-TC = P* RθJC (t) 4. Duty Cycle, D=t1/t2 10 -2 10 -1 10 0 10 1 10 2 10 3 10 4 Square Wave Pulse Duration (msec) Figure 11. Normalized Thermal Transient Impedance Curve 4
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