CEP14A04

N-Channel Enhancement Mode Field Effect Transistor FEATURES 40V, 180A, RDS(ON) = 5mΩ @VGS = 10V. Super high dense cell design for extremely low RDS(ON). High power and current handing capability. Lead free product is acquired. TO-220 & TO-263 package. CEP14A04/CEB14A04 PRELIMINARY D D G G D S S CEB SERIES TO-263(DD-PAK) G CEP SERIES TO-220 S ABSOLUTE MAXIMUM RATINGS Parameter Drain-Source Voltage Gate-Source Voltage Drain Current-Continuous Drain Current-Pulsed a Tc = 25 C unless otherwise noted Symbol Limit VDS VGS ID IDM PD EAS IAS TJ,Tstg 40 Units V V A A W W/ C mJ A C ±20 180 720 200 1.3 633 65 -55 to 175 Maximum Power Dissipation @ TC = 25 C - Derate above 25 C Single Pulsed Avalanche Energy d Single Pulsed Avalanche Current d Operating and Store Temperature Range Thermal Characteristics Parameter Thermal Resistance, Junction-to-Case Thermal Resistance, Junction-to-Ambient Symbol RθJC RθJA Limit 0.75 62.5 Units C/W C/W This is preliminary information on a new product in development now . Details are subject to change without notice . 1 Rev 2. 2010.June http://www.cetsemi.com CEP14A04/CEB14A04 Electrical Characteristics Parameter Off Characteristics Drain-Source Breakdown Voltage Zero Gate Voltage Drain Current Gate Body Leakage Current, Forward Gate Body Leakage Current, Reverse On Characteristics b Gate Threshold Voltage Static Drain-Source On-Resistance Forward Transconductance Dynamic Characteristics Input Capacitance Output Capacitance Reverse Transfer Capacitance Switching Characteristics c Turn-On Delay Time Turn-On Rise Time Turn-Off Delay Time Turn-Off Fall Time Total Gate Charge Gate-Source Charge Gate-Drain Charge Drain-Source Diode Forward Current Drain-Source Diode Forward Voltage b td(on) tr td(off) tf Qg Qgs Qgd IS VSD VGS = 0V, IS = 70A VDS = 32V, ID = 70A, VGS = 10V VDD = 28V, ID = 10A, VGS = 10V, RGEN = 4.5Ω 32 20 82 35 110 14.4 44.4 180 1.3 64 40 164 70 143 ns ns ns ns nC nC nC A V c Tc = 25 C unless otherwise noted Symbol BVDSS IDSS IGSSF IGSSR VGS(th) RDS(on) gFS Ciss Coss Crss Test Condition VGS = 0V, ID = 250µA VDS = 40V, VGS = 0V VGS = 20V, VDS = 0V VGS = -20V, VDS = 0V VGS = VDS, ID = 250µA VGS = 10V, ID = 70A VDS = 25V, ID = 70A 2 4.2 30 3390 1445 185 Min 40 25 100 -100 4 5 Typ Max Units V µA nA nA V mΩ S pF pF pF VDS = 25V, VGS = 0V, f = 1.0 MHz Drain-Source Diode Characteristics and Maximun Ratings Notes : a.Repetitive Rating : Pulse width limited by maximum junction temperature b.Pulse Test : Pulse Width < 300µs, Duty Cycle < 2%. c.Guaranteed by design, not subject to production testing. d.L = 0.3mH, IAS = 65A, VDD = 25V, RG = 25Ω, Starting TJ = 25 C 2 CEP14A04/CEB14A04 180 150 120 90 60 30 0 VGS=10,9,8,7V 240 25 C ID, Drain Current (A) ID, Drain Current (A) 180 VGS=6V 120 VGS=5V 60 TJ=125 C -55 C 0 0.5 1 1.5 2 2.5 3 0 0 2 4 6 8 10 VDS, Drain-to-Source Voltage (V) Figure 1. Output Characteristics 6600 5500 4400 3300 2200 1100 0 Crss 0 5 10 15 20 25 Coss Ciss 2.6 2.2 1.8 1.4 1.0 0.6 0.2 -100 VGS, Gate-to-Source Voltage (V) Figure 2. Transfer Characteristics ID=70A VGS=10V RDS(ON), Normalized RDS(ON), On-Resistance(Ohms) C, Capacitance (pF) -50 0 50 100 150 200 VDS, Drain-to-Source Voltage (V) Figure 3. Capacitance 1.3 1.2 1.1 1.0 0.9 0.8 0.7 0.6 -50 VDS=VGS TJ, Junction Temperature( C) Figure 4. On-Resistance Variation with Temperature IS, Source-drain current (A) VGS=0V VTH, Normalized Gate-Source Threshold Voltage ID=250µA 10 1 10 0 -25 0 25 50 75 100 125 150 10 -1 0.4 0.6 0.8 1.0 1.2 1.4 TJ, Junction Temperature( C) Figure 5. Gate Threshold Variation with Temperature VSD, Body Diode Forward Voltage (V) Figure 6. Body Diode Forward Voltage Variation with Source Current 3 CEP14A04/CEB14A04 VGS, Gate to Source Voltage (V) 10 8 6 4 2 0 VDS=32V ID=70A 10 3 RDS(ON)Limit 100ms ID, Drain Current (A) 10 2 10 1 1ms 10ms DC 0 30 60 90 120 10 0 TC=25 C TJ=175 C Single Pulse 10 -1 10 0 10 1 10 2 Qg, Total Gate Charge (nC) Figure 7. Gate Charge VDD t on V IN VGS RGEN G RL D VOUT td(on) VOUT 10% VDS, Drain-Source Voltage (V) Figure 8. Maximum Safe Operating Area toff tr 90% td(off) 90% 10% tf INVERTED 90% S VIN 50% 10% 50% PULSE WIDTH Figure 9. Switching Test Circuit Figure 10. Switching Waveforms r(t),Normalized Effective Transient Thermal Impedance 10 0 D=0.5 0.2 10 -1 0.1 0.05 0.02 0.01 Single Pulse PDM t1 t2 10 -2 1. RθJC (t)=r (t) * RθJC 2. RθJC=See Datasheet 3. TJM-TC = P* RθJC (t) 4. Duty Cycle, D=t1/t2 10 -2 10 -1 10 0 10 1 10 2 10 3 10 4 Square Wave Pulse Duration (msec) Figure 11. Normalized Thermal Transient Impedance Curve 4