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CEP6601

CEP6601

  • 厂商:

    CET(华瑞)

  • 封装:

  • 描述:

    CEP6601 - P-Channel Enhancement Mode Field Effect Transistor - Chino-Excel Technology

  • 数据手册
  • 价格&库存
CEP6601 数据手册
P-Channel Enhancement Mode Field Effect Transistor FEATURES -60V, -19A, RDS(ON) = 86mΩ @VGS = -10V. RDS(ON) = 125mΩ @VGS = -4.5V. Super high dense cell design for extremely low RDS(ON). High power and current handing capability. Lead free product is acquired. TO-220 & TO-263 package. D CEP6601/CEB6601 D G S CEB SERIES TO-263(DD-PAK) G G D S CEP SERIES TO-220 S ABSOLUTE MAXIMUM RATINGS Parameter Drain-Source Voltage Gate-Source Voltage Drain Current-Continuous Drain Current-Pulsed a Tc = 25 C unless otherwise noted Symbol Limit VDS VGS ID IDM PD TJ,Tstg -60 Units V V A A W W/ C C ±20 -19 -76 50 0.33 -55 to 150 Maximum Power Dissipation @ TC = 25 C - Derate above 25 C Operating and Store Temperature Range Thermal Characteristics Parameter Thermal Resistance, Junction-to-Case Thermal Resistance, Junction-to-Ambient Symbol RθJC RθJA Limit 3 62.5 Units C/W C/W Details are subject to change without notice . 1 Rev .2 2010.July. http://www.cetsemi.com CEP6601/CEB6601 Electrical Characteristics Parameter Off Characteristics Drain-Source Breakdown Voltage Zero Gate Voltage Drain Current Gate Body Leakage Current, Forward Gate Body Leakage Current, Reverse On Characteristics b Gate Threshold Voltage Static Drain-Source On-Resistance Forward Transconductance Dynamic Characteristics c Input Capacitance Output Capacitance Reverse Transfer Capacitance Switching Characteristics c Turn-On Delay Time Turn-On Rise Time Turn-Off Delay Time Turn-Off Fall Time Total Gate Charge Gate-Source Charge Gate-Drain Charge Drain-Source Diode Forward Current Drain-Source Diode Forward Voltage b td(on) tr td(off) tf Qg Qgs Qgd IS VSD VGS = 0V, IS = -19A VDS = -30V, ID = -3.5A, VGS = -10V VDD = -30V, ID = -1A, VGS = -10V, RGEN = 6Ω 13 4 45 6 22.6 2.4 5.7 -19 -1.5 26 8 90 12 29.4 ns ns ns ns nC nC nC A V VGS(th) RDS(on) gFS Ciss Coss Crss VGS = VDS, ID = -250µA VGS = -10V, ID = -8A VGS = -4.5V, ID = -6A VDS = -10V, ID = -15A -1 61 75 10 1135 95 60 -3 86 125 V mΩ mΩ S pF pF pF BVDSS IDSS IGSSF IGSSR VGS = 0V, ID = -250µA VDS = -60V, VGS = 0V VGS = 20V, VDS = 0V VGS = -20V, VDS = 0V -60 -1 100 -100 V µA Tc = 25 C unless otherwise noted Symbol Test Condition Min Typ Max Units nA nA VDS = -30V, VGS = 0V, f = 1.0 MHz Drain-Source Diode Characteristics and Maximun Ratings Notes : a.Repetitive Rating : Pulse width limited by maximum junction temperature. b.Pulse Test : Pulse Width < 300µs, Duty Cycle < 2%. c.Guaranteed by design, not subject to production testing. 2 CEP6601/CEB6601 10 -VGS=10,8,6V 25 -ID, Drain Current (A) -ID, Drain Current (A) 8 6 20 15 10 25 C 5 0 TJ=125 C 0 1 2 3 -55 C 4 5 6 -VGS=3V 4 2 0 0 0.3 0.6 0.9 1.2 1.5 1.8 -VDS, Drain-to-Source Voltage (V) Figure 1. Output Characteristics 1500 1250 1000 750 500 250 0 Crss 0 5 10 15 20 25 30 Coss Ciss 2.8 2.4 2.0 1.6 1.2 0.8 0.4 -100 -VGS, Gate-to-Source Voltage (V) Figure 2. Transfer Characteristics ID=-8A VGS=-10V RDS(ON), Normalized RDS(ON), On-Resistance(Ohms) C, Capacitance (pF) -50 0 50 100 150 200 -VDS, Drain-to-Source Voltage (V) Figure 3. Capacitance 1.3 1.2 1.1 1.0 0.9 0.8 0.7 0.6 -50 VDS=VGS 10 2 TJ, Junction Temperature( C) Figure 4. On-Resistance Variation with Temperature -IS, Source-drain current (A) VGS=0V VTH, Normalized Gate-Source Threshold Voltage ID=-250µA 10 1 10 0 -25 0 25 50 75 100 125 150 10 -1 0.4 0.6 0.8 1.0 1.2 1.4 TJ, Junction Temperature( C) Figure 5. Gate Threshold Variation with Temperature -VSD, Body Diode Forward Voltage (V) Figure 6. Body Diode Forward Voltage Variation with Source Current 3 CEP6601/CEB6601 -VGS, Gate to Source Voltage (V) 10 V =-30V DS ID=-3.5A 10 2 RDS(ON)Limit -ID, Drain Current (A) 8 6 4 2 0 100µs 1ms 10ms DC 10 1 10 0 0 5 10 15 20 10 -1 TC=25 C TJ=175 C Single Pulse -1 10 10 0 10 1 10 2 Qg, Total Gate Charge (nC) Figure 7. Gate Charge VDD t on V IN VGS RGEN G RL D VOUT td(on) VOUT -VDS, Drain-Source Voltage (V) Figure 8. Maximum Safe Operating Area toff tr 90% td(off) 90% 10% tf 10% INVERTED 90% S VIN 50% 10% 50% PULSE WIDTH Figure 9. Switching Test Circuit Figure 10. Switching Waveforms r(t),Normalized Effective Transient Thermal Impedance 10 0 D=0.5 0.2 10 -1 0.1 0.05 0.02 0.01 Single Pulse PDM t1 t2 10 -2 1. RθJC (t)=r (t) * RθJC 2. RθJC=See Datasheet 3. TJM-TC = P* RθJC (t) 4. Duty Cycle, D=t1/t2 10 -5 10 -4 10 -3 10 -2 10 -1 10 0 10 1 Square Wave Pulse Duration (msec) Figure 11. Normalized Thermal Transient Impedance Curve 4
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