CES2302

N-Channel Enhancement Mode Field Effect Transistor FEATURES 20V, 3.0A, RDS(ON) = 72mΩ @VGS = 4.5V. RDS(ON) = 110mΩ @VGS = 2.5V. High dense cell design for extremely low RDS(ON). Lead free product is acquired. Rugged and reliable. SOT-23 package. CES2302 D D G SOT-23 G S S ABSOLUTE MAXIMUM RATINGS Parameter Drain-Source Voltage Gate-Source Voltage Drain Current-Continuous Drain Current-Pulsed a TA = 25 C unless otherwise noted Symbol VDS VGS ID IDM PD TJ,Tstg Limit 20 Units V V A A W C ±8 3 10 1.25 -55 to 150 Maximum Power Dissipation Operating and Store Temperature Range Thermal Characteristics Parameter Thermal Resistance, Junction-to-Ambient b Symbol RθJA Limit 100 Units C/W Details are subject to change without notice . 1 Rev 2. 2010.Dec http://www.cetsemi.com CES2302 Electrical Characteristics Parameter Off Characteristics Drain-Source Breakdown Voltage Zero Gate Voltage Drain Current Gate Body Leakage Current, Forward Gate Body Leakage Current, Reverse On Characteristics c Gate Threshold Voltage Static Drain-Source On-Resistance Dynamic Characteristics d Input Capacitance Output Capacitance Reverse Transfer Capacitance Switching Characteristics d Turn-On Delay Time Turn-On Rise Time Turn-Off Delay Time Turn-Off Fall Time Total Gate Charge Gate-Source Charge Gate-Drain Charge Drain-Source Diode Forward Current b Drain-Source Diode Forward Voltage c td(on) tr td(off) tf Qg Qgs Qgd IS VSD VGS = 0V, IS = 0.94A VDS = 10V, ID = 3.6A, VGS = 4.5V VDD = 10V, ID = 3.6A, VGS = 4.5V, RGEN = 6Ω 10 6 28 15 5.1 1 1.3 0.94 1.2 20 12 56 30 6.6 ns ns ns ns nC nC nC A V Ciss Coss Crss VDS = 10V, VGS = 0V, f = 1.0 MHz 330 90 60 pF pF pF VGS(th) RDS(on) VGS = VDS, ID = 250µA VGS = 4.5V, ID = 3.6A VGS = 2.5V, ID = 3.1A 0.65 55 82 1.2 72 110 V mΩ mΩ BVDSS IDSS IGSSF IGSSR VGS = 0V, ID = 10µA VDS = 20V, VGS = 0V VGS = 8V, VDS = 0V VGS = -8V, VDS = 0V 20 1 100 -100 V µA TA = 25 C unless otherwise noted Symbol Test Condition Min Typ Max Units nA nA Drain-Source Diode Characteristics and Maximun Ratings Notes : a.Repetitive Rating : Pulse width limited by maximum junction temperature. b.Surface Mounted on FR4 Board, t < 10 sec. c.Pulse Test : Pulse Width < 300µs, Duty Cycle < 2%. d.Guaranteed by design, not subject to production testing. 2 CES2302 10 8 6 VGS=4.5,3.5,2.5V 10 8 6 4 2 0 TJ=125 C -55 C 5 0 1 2 3 25 C ID, Drain Current (A) VGS=2.0V 4 2 0 VGS=1.5V 0 1 2 3 4 ID, Drain Current (A) VDS, Drain-to-Source Voltage (V) Figure 1. Output Characteristics 600 500 400 300 200 100 0 Coss Crss 0 5 10 15 20 25 2.2 1.9 1.6 1.3 1.0 0.7 0.4 -100 VGS, Gate-to-Source Voltage (V) Figure 2. Transfer Characteristics ID=3.6A VGS=4.5V Ciss RDS(ON), Normalized RDS(ON), On-Resistance(Ohms) C, Capacitance (pF) -50 0 50 100 150 200 VDS, Drain-to-Source Voltage (V) Figure 3. Capacitance 1.3 1.2 1.1 1.0 0.9 0.8 0.7 0.6 -50 VDS=VGS TJ, Junction Temperature( C) Figure 4. On-Resistance Variation with Temperature IS, Source-drain current (A) VGS=0V 10 1 VTH, Normalized Gate-Source Threshold Voltage ID=250µA 10 0 -25 0 25 50 75 100 125 150 10 -1 0.2 0.4 0.6 0.8 1.0 1.2 TJ, Junction Temperature( C) Figure 5. Gate Threshold Variation with Temperature VSD, Body Diode Forward Voltage (V) Figure 6. Body Diode Forward Voltage Variation with Source Current 3 CES2302 VGS, Gate to Source Voltage (V) 5 V =10V DS ID=3.6A ID, Drain Current (A) 4 3 2 1 0 10 1 RDS(ON)Limit 1ms 10ms 100ms 1s DC 10 0 10 -1 0 2 4 6 10 -2 TA=25 C TJ=150 C Single Pulse 10 -1 10 0 10 1 10 2 Qg, Total Gate Charge (nC) Figure 7. Gate Charge VDD t on V IN VGS RGEN G RL D VOUT td(on) VOUT 10% VDS, Drain-Source Voltage (V) Figure 8. Maximum Safe Operating Area toff tr 90% td(off) 90% 10% tf INVERTED 90% S VIN 50% 10% 50% PULSE WIDTH Figure 9. Switching Test Circuit Figure 10. Switching Waveforms r(t),Normalized Effective Transient Thermal Impedance 10 0 D=0.5 0.2 10 -1 0.1 0.05 0.02 PDM t1 t2 10 -2 Single Pulse -4 1. RθJA (t)=r (t) * RθJA 2. RθJA=See Datasheet 3. TJM-TA = P* RθJA (t) 4. Duty Cycle, D=t1/t2 10 10 -3 10 -2 10 -1 10 0 10 1 10 2 Square Wave Pulse Duration (sec) Figure 11. Normalized Thermal Transient Impedance Curve 4