0
登录后你可以
  • 下载海量资料
  • 学习在线课程
  • 观看技术视频
  • 写文章/发帖/加入社区
创作中心
发布
  • 发文章

  • 发资料

  • 发帖

  • 提问

  • 发视频

创作活动
CEU4060AL

CEU4060AL

  • 厂商:

    CET(华瑞)

  • 封装:

  • 描述:

    CEU4060AL - N-Channel Enhancement Mode Field Effect Transistor - Chino-Excel Technology

  • 数据手册
  • 价格&库存
CEU4060AL 数据手册
CED4060AL/CEU4060AL N-Channel Enhancement Mode Field Effect Transistor FEATURES 60V, 15A, RDS(ON) = 80mΩ @VGS = 10V. RDS(ON) = 95mΩ @VGS = 5V. Super high dense cell design for extremely low RDS(ON). High power and current handing capability. Lead free product is acquired. TO-251 & TO-252 package. D D G S CEU SERIES TO-252(D-PAK) G D G S CED SERIES TO-251(I-PAK) S ABSOLUTE MAXIMUM RATINGS Parameter Drain-Source Voltage Gate-Source Voltage Drain Current-Continuous Drain Current-Pulsed a Tc = 25 C unless otherwise noted Symbol Limit VDS VGS ID IDM PD TJ,Tstg 60 Units V V A A W W/ C C ±20 15 45 50 0.3 -55 to 175 Maximum Power Dissipation @ TC = 25 C - Derate above 25 C Operating and Store Temperature Range Thermal Characteristics Parameter Thermal Resistance, Junction-to-Case Thermal Resistance, Junction-to-Ambient Symbol RθJC RθJA Limit 3 50 Units C/W C/W Rev 3. 2006.June 6 - 58 http://www.cetsemi.com CED4060AL/CEU4060AL Electrical Characteristics Parameter Off Characteristics Drain-Source Breakdown Voltage Zero Gate Voltage Drain Current Gate Body Leakage Current, Forward Gate Body Leakage Current, Reverse On Characteristics b Gate Threshold Voltage Static Drain-Source On-Resistance Forward Transconductance Dynamic Characteristics Input Capacitance Output Capacitance Reverse Transfer Capacitance Switching Characteristics c Turn-On Delay Time Turn-On Rise Time Turn-Off Delay Time Turn-Off Fall Time Total Gate Charge Gate-Source Charge Gate-Drain Charge Drain-Source Diode Forward Current Drain-Source Diode Forward Voltage b td(on) tr td(off) tf Qg Qgs Qgd IS VSD VGS = 0V, IS = 6A 0.83 VDS = 48V, ID = 15A, VGS = 10V VDD = 30V, ID = 15A, VGS = 5V, RGEN = 51Ω 15 210 55 80 13 2.6 3.2 15 1.3 20 250 100 150 17 ns ns ns ns nC nC nC A V c Tc = 25 C unless otherwise noted Symbol BVDSS IDSS IGSSF IGSSR VGS(th) RDS(on) gFS Ciss Coss Crss Test Condition VGS = 0V, ID = 250µA VDS = 60V, VGS = 0V VGS = 20V, VDS = 0V VGS = -20V, VDS = 0V VGS = VDS, ID = 250µA VGS = 10V, ID = 12A VGS = 5V, ID = 6A VDS = 10V, ID = 6A 1 1.5 65 80 10 480 130 30 Min 60 25 100 -100 2 80 95 Typ Max Units V µA nA nA V mΩ mΩ S pF pF pF 6 VDS = 25V, VGS = 0V, f = 1.0 MHz Drain-Source Diode Characteristics and Maximun Ratings Notes : a.Repetitive Rating : Pulse width limited by maximum junction temperature. b.Pulse Test : Pulse Width < 300µs, Duty Cycle < 2%. c.Guaranteed by design, not subject to production testing. 6 - 59 CED4060AL/CEU4060AL 12 VGS=10,8,6,5,4V 10 25 ID, Drain Current (A) 8 6 4 2 0 0 1 2 VGS=3V ID, Drain Current (A) 20 15 10 25 C 5 TJ=125 C -55 C 0 3 0 1 2 3 4 VDS, Drain-to-Source Voltage (V) Figure 1. Output Characteristics 900 750 600 Ciss 450 300 150 0 0 5 10 15 20 25 Coss Crss 2.6 2.2 1.8 1.4 1.0 0.6 0.2 -100 VGS, Gate-to-Source Voltage (V) Figure 2. Transfer Characteristics RDS(ON), Normalized RDS(ON), On-Resistance(Ohms) ID=12A VGS=10V C, Capacitance (pF) -50 0 50 100 150 200 VDS, Drain-to-Source Voltage (V) Figure 3. Capacitance 1.3 1.2 1.1 1.0 0.9 0.8 0.7 0.6 -50 TJ, Junction Temperature( C) Figure 4. On-Resistance Variation with Temperature VGS=0V 1 VTH, Normalized Gate-Source Threshold Voltage VDS=VGS ID=250µA IS, Source-drain current (A) 25 50 75 100 125 150 10 10 0 10 -25 0 -1 0.4 0.6 0.8 1.0 1.2 1.4 TJ, Junction Temperature( C) Figure 5. Gate Threshold Variation with Temperature VSD, Body Diode Forward Voltage (V) Figure 6. Body Diode Forward Voltage Variation with Source Current 6 - 60 CED4060AL/CEU4060AL VGS, Gate to Source Voltage (V) 10 VDS=48V ID=15A RDS(ON)Limit 10µs ID, Drain Current (A) 8 100µs 10 1 6 1ms 10ms DC 4 2 10 0 TC=25 C TJ=175 C Single Pulse 10 0 6 10 1 0 0 4 8 12 16 10 2 Qg, Total Gate Charge (nC) Figure 7. Gate Charge VDS, Drain-Source Voltage (V) Figure 8. Maximum Safe Operating Area VDD t on V IN D VGS RGEN G 90% toff tr 90% RL VOUT td(on) VOUT td(off) 90% 10% tf 10% INVERTED S VIN 50% 10% 50% PULSE WIDTH Figure 9. Switching Test Circuit Figure 10. Switching Waveforms r(t),Normalized Effective Transient Thermal Impedance 10 0 D=0.5 0.2 10 -1 0.1 0.05 0.02 0.01 Single Pulse PDM t1 t2 1. RθJC (t)=r (t) * RθJC 2. RθJC=See Datasheet 3. TJM-TC = P* RθJC (t) 4. Duty Cycle, D=t1/t2 10 -2 10 -2 10 -1 10 0 10 1 10 2 10 3 10 4 Square Wave Pulse Duration (msec) Figure 11. Normalized Thermal Transient Impedance Curve 6 - 61
CEU4060AL 价格&库存

很抱歉,暂时无法提供与“CEU4060AL”相匹配的价格&库存,您可以联系我们找货

免费人工找货