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CEU6601

CEU6601

  • 厂商:

    CET(华瑞)

  • 封装:

  • 描述:

    CEU6601 - P-Channel Enhancement Mode Field Effect Transistor - Chino-Excel Technology

  • 数据手册
  • 价格&库存
CEU6601 数据手册
P-Channel Enhancement Mode Field Effect Transistor FEATURES -60V, -16A, RDS(ON) = 86mΩ RDS(ON) = 125mΩ @VGS = -10V. @VGS = -4.5V. CED6601/CEU6601 Super high dense cell design for extremely low RDS(ON). High power and current handing capability. Lead free product is acquired. TO-251 & TO-252 package. D D G S CEU SERIES TO-252(D-PAK) G D G S CED SERIES TO-251(I-PAK) S ABSOLUTE MAXIMUM RATINGS Parameter Drain-Source Voltage Gate-Source Voltage Drain Current-Continuous Drain Current-Pulsed a Tc = 25 C unless otherwise noted Symbol Limit VDS VGS ID IDM PD TJ,Tstg -60 Units V V A A W W/ C C ±20 -16 -64 42 0.33 -55 to 150 Maximum Power Dissipation @ TC = 25 C - Derate above 25 C Operating and Store Temperature Range Thermal Characteristics Parameter Thermal Resistance, Junction-to-Case Thermal Resistance, Junction-to-Ambient Symbol RθJC RθJA Limit 3 50 Units C/W C/W Details are subject to change without notice . 1 Rev 2. 2006.Oct http://www.cetsemi.com CED6601/CEU6601 Electrical Characteristics Parameter Off Characteristics Drain-Source Breakdown Voltage Zero Gate Voltage Drain Current Gate Body Leakage Current, Forward Gate Body Leakage Current, Reverse On Characteristics b Gate Threshold Voltage Static Drain-Source On-Resistance Dynamic Characteristics c Forward Transconductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Switching Characteristics c Turn-On Delay Time Turn-On Rise Time Turn-Off Delay Time Turn-Off Fall Time Total Gate Charge Gate-Source Charge Gate-Drain Charge Drain-Source Diode Forward Current Drain-Source Diode Forward Voltage b td(on) tr td(off) tf Qg Qgs Qgd IS VSD VGS = 0V, IS = -1.3A VDS = -30V, ID = -3.5A, VGS = -10V VDD = -30V, ID = -1A, VGS = -10V, RGEN = 6Ω 15 8 69 20 19.2 3.2 4 -16 -1.2 30 16 138 40 25.5 ns ns ns ns nC nC nC A V gFS Ciss Coss Crss VDS = -10V, ID = -15A VDS = -30V, VGS = 0V, f = 1.0 MHz 10 1130 120 70 S pF pF pF VGS(th) RDS(on) VGS = VDS, ID = -250µA VGS = -10V, ID = -8A VGS = -4.5V, ID = -6A -1 70 95 -3 86 125 V mΩ mΩ BVDSS IDSS IGSSF IGSSR VGS = 0V, ID = -250µA VDS = -60V, VGS = 0V VGS = 20V, VDS = 0V VGS = -20V, VDS = 0V -60 -1 100 -100 V µA Tc = 25 C unless otherwise noted Symbol Test Condition Min Typ Max Units nA nA 6 Drain-Source Diode Characteristics and Maximun Ratings Notes : a.Repetitive Rating : Pulse width limited by maximum junction temperature. b.Pulse Test : Pulse Width < 300µs, Duty Cycle < 2%. c.Guaranteed by design, not subject to production testing. 2 CED6601/CEU6601 50 -VGS=10,8V 25 -ID, Drain Current (A) 40 -ID, Drain Current (A) 20 -VGS=6V 30 15 20 -VGS=5V 10 25 C 5 TJ=125 C 0 -55 C 2 3 4 5 6 10 -VGS=4V -VGS=3V 0 0 3 6 9 12 15 18 0 1 -VDS, Drain-to-Source Voltage (V) Figure 1. Output Characteristics 1500 1250 1000 750 500 250 0 Crss 0 5 10 15 20 25 30 Coss Ciss 2.2 1.9 1.6 1.3 1.0 0.7 0.4 -100 -VGS, Gate-to-Source Voltage (V) Figure 2. Transfer Characteristics RDS(ON), Normalized RDS(ON), On-Resistance(Ohms) ID=-8A VGS=-10V C, Capacitance (pF) -50 0 50 100 150 200 -VDS, Drain-to-Source Voltage (V) Figure 3. Capacitance 1.3 1.2 1.1 1.0 0.9 0.8 0.7 0.6 -50 TJ, Junction Temperature( C) Figure 4. On-Resistance Variation with Temperature -IS, Source-drain current (A) 10 2 VTH, Normalized Gate-Source Threshold Voltage VDS=VGS ID=-250µA VGS=0V 10 1 10 0 10 -25 0 25 50 75 100 125 150 -1 0.4 0.6 0.8 1.0 1.2 1.4 TJ, Junction Temperature( C) Figure 5. Gate Threshold Variation with Temperature -VSD, Body Diode Forward Voltage (V) Figure 6. Body Diode Forward Voltage Variation with Source Current 3 CED6601/CEU6601 -VGS, Gate to Source Voltage (V) 10 V =-30V DS ID=-3.5A 8 10 2 RDS(ON)Limit 100µs 1ms 10ms DC -ID, Drain Current (A) 10 1 6 4 10 0 2 6 -1 0 0 5 10 15 20 10 TC=25 C TJ=150 C Single Pulse -1 10 10 0 10 1 10 2 Qg, Total Gate Charge (nC) Figure 7. Gate Charge -VDS, Drain-Source Voltage (V) Figure 8. Maximum Safe Operating Area VDD t on V IN D VGS RGEN G 90% toff tr 90% RL VOUT td(on) VOUT td(off) 90% 10% tf 10% INVERTED S VIN 50% 10% 50% PULSE WIDTH Figure 9. Switching Test Circuit Figure 10. Switching Waveforms r(t),Normalized Effective Transient Thermal Impedance 10 0 D=0.5 0.2 10 -1 0.1 0.05 0.02 0.01 Single Pulse PDM t1 t2 1. RθJC (t)=r (t) * RθJC 2. RθJC=See Datasheet 3. TJM-TC = P* RθJC (t) 4. Duty Cycle, D=t1/t2 10 -2 10 -2 10 -1 10 0 10 1 10 2 10 3 10 4 Square Wave Pulse Duration (msec) Figure 11. Normalized Thermal Transient Impedance Curve 4
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