CDB5581

CDB5581 200 kSps, 16-bit, High-throughput ΔΣ ADC Evaluation Board Features General Description  Analog Input Channel to the CS5581 ADC  Pre-configured to require a minimum number of external connections to your data acquisition system.  All functionality accessible through the connector interface and board-level options.  On-board 4.096 V Reference  Pre-configured for Master mode SPI™ communication to a data capture system. The CDB5581 is a versatile tool designed for evaluating the functionality and performance of the CS5581 ADC (Analog-to-Digital Converter). The SPI serial port on the CDB5581 evaluation board is configured in Master mode and will start transmitting data after power-up upon reset. This evaluation board is designed to connect to your data capture system or will interface to the CapturePlus II data acquisition system available from Cirrus Logic. The CS5581 delta-sigma ADC produces fully settled conversions to full specified accuracy at 200 kSps. This ability to produce fully settled conversions for every sample makes it suitable for converting multiplexed input signals. To help evaluate this feature, the CDB5581 includes two single-ended analog inputs multiplexed into the CS5581. The multiplexer can be switched at the CS5581 ADC sample speed and the ADC will produce fully settled conversion data for each input channel. All evaluation board functionality for evaluating the CS5581 ADC is accessed through the connector interface and board-level options. Schematics in PADS™ PowerLogic™ format are available for download at: http://www.cirrus.com/en/products/pro/detail/P1120.html. ORDERING INFORMATION CDB5581 www.cirrus.com Copyright  Cirrus Logic, Inc. 2009 (All Rights Reserved) Evaluation Board OCT ‘09 DS796DB3 CDB5581 TABLE OF CONTENTS 1. INTRODUCTION ....................................................................................................................... 3 1.1 Overview ............................................................................................................................ 4 2. QUICK START .......................................................................................................................... 5 3. HARDWARE DESCRIPTION ................................................................................................... 6 3.1 Absolute Maximum Ratings ............................................................................................... 6 3.2 Power Supply ..................................................................................................................... 6 3.3 Analog Section ................................................................................................................... 6 3.3.1 Analog Input Buffers .............................................................................................. 6 3.3.2 Multiplexer ............................................................................................................. 7 3.3.3 ADC Reset ............................................................................................................ 7 3.3.4 Voltage Reference ................................................................................................ 7 3.3.5 ADC Reference Frequency ................................................................................... 7 3.4 Digital Section .................................................................................................................... 8 3.4.1 Hardware Configuration ........................................................................................ 8 3.4.2 SPI™ Serial Port Communications ....................................................................... 8 APPENDIX A. MAXIMIZING THE PERFORMANCE OF THE CS5581 ........................................ 9 A.1 PCB Layout Considerations .............................................................................................. 9 A.2 Hardware Considerations .................................................................................................. 9 APPENDIX B. BILL OF MATERIALS ........................................................................................ 10 APPENDIX C. SCHEMATICS ..................................................................................................... 11 APPENDIX D. LAYER PLOTS ................................................................................................... 16 APPENDIX E. CALIBRATION FUNCTION ................................................................................. 25 APPENDIX E. REVISION HISTORY .......................................................................................... 26 LIST OF FIGURES Figure 1. CDB5581 Block Diagram ................................................................................................. 4 Figure 2. CDB5581 Board Layout ................................................................................................... 5 Figure 3. Schematic - Block Diagram............................................................................................ 11 Figure 4. Schematic - Power Supplies .......................................................................................... 12 Figure 5. Schematic - Input Buffers and Multiplexer ..................................................................... 13 Figure 6. Schematic - CS5581 ...................................................................................................... 14 Figure 7. Schematic - Configuration & Misc. ................................................................................. 15 Figure 8. Top Silkscreen ............................................................................................................... 16 Figure 9. Top Solder Mask ............................................................................................................ 17 Figure 10. Top Routing.................................................................................................................. 18 Figure 11. Ground Plane ............................................................................................................... 19 Figure 12. Power Plane................................................................................................................. 20 Figure 13. Bottom Solder Mask..................................................................................................... 21 Figure 14. Bottom Silkscreen ........................................................................................................ 22 Figure 15. Top Solder Paste Mask................................................................................................ 23 Figure 16. Bottom Routing ............................................................................................................ 24 LIST OF TABLES Table 1. Power Supply Connections ............................................................................................... 6 Table 2. Analog Input Connections ................................................................................................. 6 Table 3. Analog Input Channel Selection ........................................................................................ 7 Table 4. Hardware Configuration Signals........................................................................................ 8 Table 5. Serial Interface Connections ............................................................................................. 8 2 DS796DB3 CDB5581 1. INTRODUCTION The CDB5581 evaluation board is a platform for evaluating the CS5581 ADC performance. The evaluation board is designed to connect to the SPI serial port of a processor or data capture system or will interface directly to the CapturePlus II data acquisition system available from Cirrus Logic. The CapturePlus II data acquisition system is a powerful integrated hardware/software tool designed to fully exercise the CDB5581 and other Cirrus Logic evaluation boards. The CDB5581 evaluation board is designed to simplify the hardware setup required to evaluate the CS5581. Interfacing the CDB5581 evaluation board to a user-supplied data capture system can be as simple as connecting the SPI port and using the CDB5581 default hardware configuration. In this configuration, simply press the Reset switch on the CDB5581 and it will automatically begin transmitting data to the data capture system. All evaluation board functionality for evaluating the CS5581 ADC is accessed through the connector interface and board-level options. The CS5581 delta-sigma ADC produces fully settled conversions to full specified accuracy at 200 kSps. The ability to produce fully settled conversions for every sample makes it suitable for converting multiplexed input signals. To help evaluate this feature, the CDB5581 includes two single-ended analog inputs multiplexed into the CS5581 The multiplexer can be switched at the CS5581 ADC sample speed and the ADC will produce fully settled conversion data for each input channel. For detailed information on the CS5581 ADC, please reference data sheet DS796 at www.cirrus.com. DS796DB3 3 CDB5581 1.1 Overview The CDB5581 evaluation board has both analog and digital circuit sections. The analog section consists of the CS5581 ADC, two analog input signal buffers, controlled through a multiplexer, that condition the signal into the ADC, and a precision 4.096 V reference. The digital section consists of board operation configuration control signals, reset circuitry, an SPI™ serial port, a jumper connection for initiating ADC calibration, and an EEPROM for evaluation board identification. The evaluation board operates from +2.5V, -2.5V, +3.3V and communicates through an SPI™ serial port. Figure 1 illustrates the CDB5581 block diagram. VREF 4.096 V Single-ended Analog Inputs IN_A IN_B J8 Master/Slave Serial Port J6 Digital Inputs to ADC J7 Digital Outputs from ADC CS3004 M U X CS5581 XTAL 16 MHz Communication/Control Interface +2.5V GND -2.5V GND +3.3V GND Figure 1. CDB5581 Block Diagram 4 DS796DB3 CDB5581 2. QUICK START Signals to ADC & Mux Buffer Enable DC Supply Calibrate 2 ADC Reset 4.096 V Reference Master/Slave SPI ADC MCLK Out Analog Inputs NOTES: 1. Shaded boxes marked with "OPT. CONFIG." are not necessary for operation in an end user product. 2. Calibration function has been removed from the device but still appears on the PCB. J2 must be shorted (grounded) for proper operation. See Appendix E for details. Figure 2. CDB5581 Board Layout The CDB5581 evaluation board is designed to interface with a data acquisition system. To connect and configure the CDB5581 perform the following initialization procedure: 1. Verify that the power supplies are off. 2. Connect the power supplies to the CDB5581 as shown in Table 1 on page 6. 3. Verify that the power is off to the analog input signal & control signal sources. 4. Connect the analog input signal source to the evaluation board per Table 2 on page 6. Verify from Table 4 on page 8 that the analog input channel selected is IN_A. 5. Configure the CDB5581 by connecting the control signal sources to the evaluation board as shown in Table 3 on page 7. Apply logic-level inputs as required to override the resistor pull-ups/pull-downs. 6. Make connections to the SPI™ serial port connector as shown in Table 5 on page 8. The CS5581 ADC serial port is configured by default to operate in the SSC (Synchronous Self Clocking) mode. Refer to the CS5581 data sheet for more information on serial communication modes and signal timing. 7. Turn on the power supplies to the evaluation board. 8. Apply power to the signal source. 9. Press the Reset switch on the evaluation board. 10. The CS5581 ADC's SPI™ serial port should now be communicating data. DS796DB3 5 CDB5581 3. HARDWARE DESCRIPTION 3.1 Absolute Maximum Ratings Observe the following limits to ensure the CDB5581 component ratings are not exceeded. • CS5581 – The absolute maximum supply voltage that can be applied to the +3.3V power supply connection is +3.6V. – The absolute maximum power supply voltage that can be applied between pins VL and V1is 6.1 V. • CS3004 – The absolute maximum power supply voltage that can be applied between the +2.5V and -2.5V power supply connections is +5.5V. 3.2 Power Supply Power supply connections and requirements are specified in Table 1. below. Table 1. Power Supply Connections Power Supply Requirement Power Supply Connection Associated Ground Return Associated Test Points +2.5 V DC, ±5%,