CDB6143-1

w WM8350 Wolfson AudioPlus™ Stereo CODEC with Power Management DESCRIPTION FEATURES The WM8350 is an integrated audio and power management subsystem which provides a cost effective, single-chip solution for portable audio and multimedia systems. Stereo Hi-Fi CODEC • DAC SNR 95dB (‘A’ weighted @ 48kHz), THD –81dB • ADC SNR 95dB (‘A’ weighted @ 48kHz), THD –83dB The integrated audio CODEC provides all the necessary functions for high-quality stereo recording and playback. Programmable on-chip amplifiers allow for the direct connection of headphones and microphones with a minimum of external components. A programmable low-noise bias voltage is available to feed one or more electret microphones. Additional audio features include programmable high-pass filter in the ADC input path. • • • The WM8350 includes six programmable DC-DC converters, four low-dropout (LDO) regulators and a current limit switch to generate suitable supply voltages for each part of the system, including the integrated audio CODEC as well as off-chip components such as a digital core and I/O supplies, and LED lighting. An additional on-chip regulator maintains the backup power for always-on functions. The WM8350 can be powered by a lithium battery, by a wall adaptor or USB. An on-chip battery charger supports both trickle charging and fast (constant current, constant voltage) charging of single-cell lithium batteries. The charge current, termination voltage, and charger time-out are programmable to suit different types of batteries. Internal power management circuitry controls the start-up and shutdown sequencing of clocks and supply voltages. It also detects and handles conditions such as under-voltage, extreme temperatures, and deeply discharged or defective batteries, with a minimum of software involvement. Two programmable constant-current sinks are available for driving LED strings, e.g. for display backlights or photo-flash applications, in a highly power-efficient way. Additional RGB LEDs can be driven through GPIO pins. The WM8350 includes a 32.768kHz crystal oscillator, an internal RC oscillator, a real-time clock (RTC) and an alarm function capable of waking up the system. Internal circuitry can generate all clock signals required to start up the device. The master clock for the audio CODEC can be input directly, or may be generated internally using an integrated, low power Frequency Locked Loop (FLL). To extend battery life, fine-grained power management enables each function in the WM8350 to be independently powered down through the control interface. The WM8350 forms part of the Wolfson AudioPlusTM series of audio and power management solutions. • 40mW on-chip headphone driver with ‘capless’ option 16Ω headphone load: THD -72dB, Po = 20mW 2 differential microphone inputs with low-noise bias voltage and programmable preamps Programmable high-pass filter for ADC • • • Microphone and Headphone detection Auxiliary inputs for analogue signals Sample rates: 8, 11.025, 16, 22.05, 24, 32, 44.1 or 48kHz System Control • Support for 2-wire or 3-/4-wire Control Interface • Handles power sequencing, reset signals and fault conditions • Autonomous power source selection (battery, wall adaptor or USB bus) • Total current drawn from USB bus is limited to comply with USB 2.0 standard and USB OTG supplement Supply Generation • 2 x DC-DC Buck Converters (0.85V - 3.4V, Up to 1A) • 2 x DC-DC Buck Converters (0.85V - 3.4V, Up to 500mA) • 2 x DC-DC Boost Converters (5V - 20V, 40 to 200mA) • 4 x LDO voltage regulators (0.9V - 3.3V, 150mA) LED Drivers • 2 programmable constant-current sinks, suitable for screen backlight or white LED photo flash • 3 open-drain outputs for RGB LEDs Battery Charger • Single-cell Li-Ion / Li-Pol battery charger • Thermal protection for charge control; temperature monitoring available for thermal regulation • LED outputs to indicate charge status and fault conditions Additional Features • • • “Always on” RTC with wake-up alarm Watchdog timer Up to 13 configurable GPIO pins • • • On-chip crystal oscillator and internal RC oscillator Low power FLL supporting wide range of input clocks 7x7mm, 129 BGA package, 0.5mm ball pitch APPLICATIONS • • • WOLFSON MICROELECTRONICS plc To receive regular email updates, sign up at http://www.wolfsonmicro.com/enews Portable Audio and Media players Portable Navigation Devices Portable systems powered by single-cell lithium batteries Production Data, December 2010, Rev 4.3 Copyright ©2010 Wolfson Microelectronics plc WM8350 Production Data TYPICAL APPLICATIONS The WM8350 is a complete audio and power management solution for portable media devices. The device incorporates four programmable step-down switching regulators, two step-up switching regulators, a full-featured battery charger, four Low Drop-Out (LDO) voltage regulators which can also serve as hot-swap outputs, a backup supply regulator, two programmable white LED drivers, a Real-Time Clock (RTC) alongside a 32.768kHz (32kHz) oscillator capable of operating from a backup battery, a 12-bit auxiliary ADC for precise measurements, a ROM-programmable power management state machine and numerous protection features all in a single 7x7mm BGA package. When only battery power is available, a battery switch provides power to all switching regulators (and some other internal modules). When external power is applied (eg. from USB or Wall adapter), the WM8350 seamlessly transitions from battery power (a single-cell Lithium battery) to the applicable external supply. The battery charger is then activated, all internal power for the device is drawn from the appropriate external power source and the battery is disconnected from the load. Maximum battery charge current and charge time are programmable. The USB power manager provides accurate current limiting for the USB pin under all conditions. The hot-swap outputs (LDOs in currentlimited ‘Switch Mode’ operation) are ideal for powering memory cards and other devices that can be inserted while the system is fully powered. The integrated Hi-Fi stereo CODEC incorporates preamps and a low-noise bias voltage for differential microphones, and flexible pseudo-differential drivers for headphone and differential/singleended line outputs. External component requirements are reduced as no separate microphone or headphone amplifiers are required. Digital filter options are available in the ADC and DAC paths, to cater for application filtering. The WM8350 is capable of operating without any external clock, as it can derive all required clocks from its internal crystal oscillator, RC clock, and Frequency Locked Loop. An external low jitter clock may be required in some applications for high performance audio. w PD, December 2010, Rev 4.3 2 Production Data WM8350 BLOCK DIAGRAM w PD, December 2010, Rev 4.3 3 WM8350 Production Data TABLE OF CONTENTS DESCRIPTION ....................................................................................................... 1 FEATURES............................................................................................................. 1 APPLICATIONS ..................................................................................................... 1 TYPICAL APPLICATIONS ..................................................................................... 2 BLOCK DIAGRAM ................................................................................................. 3 TABLE OF CONTENTS ......................................................................................... 4 1 PIN CONFIGURATION .................................................................................. 9 2 ORDERING INFORMATION .......................................................................... 9 3 PIN DESCRIPTION ...................................................................................... 10 4 THERMAL CHARACTERISTICS ................................................................. 13 5 ABSOLUTE MAXIMUM RATINGS .............................................................. 14 6 RECOMMENDED OPERATING CONDITIONS ........................................... 15 7 ELECTRICAL CHARACTERISTICS ............................................................ 16 7.1 7.2 7.3 7.4 7.5 7.6 7.7 7.8 7.9 7.10 8 9 HI-FI AUDIO CODEC ......................................................................................... 16 DC-DC STEP UP CONVERTER ELECTRICAL CHARACTERISTICS ............... 18 DC-DC STEP DOWN CONVERTER ELECTRICAL CHARACTERISTICS ........ 19 LDO REGULATOR ELECTRICAL CHARACTERISTICS ................................... 21 BATTERY CHARGER........................................................................................ 22 CURRENT LIMIT SWITCH ................................................................................ 22 LED DRIVERS ................................................................................................... 23 GENERAL PURPOSE INPUTS / OUTPUTS (GPIO) ......................................... 23 DIGITAL INTERFACES ..................................................................................... 24 AUXILIARY ADC ............................................................................................ 24 TYPICAL POWER CONSUMPTION ............................................................ 25 TYPICAL PERFORMANCE DATA............................................................... 27 9.1 9.2 AUDIO CODEC.................................................................................................. 27 DC-DC CONVERTERS...................................................................................... 28 9.2.1 9.2.2 9.2.3 9.3 10 LDO REGULATORS .......................................................................................... 31 SIGNAL TIMING REQUIREMENTS............................................................. 32 10.1 10.2 10.3 10.4 10.5 11 POWER EFFICIENCY ............................................................................................................. 28 OUTPUT VOLTAGE REGULATION ........................................................................................ 29 DYNAMIC OUTPUT VOLTAGE ............................................................................................... 30 SYSTEM CLOCK TIMING .............................................................................. 32 AUDIO INTERFACE TIMING - MASTER MODE ............................................ 32 AUDIO INTERFACE TIMING - SLAVE MODE................................................ 33 AUDIO INTERFACE TIMING - TDM MODE ................................................... 34 CONTROL INTERFACE TIMING.................................................................... 35 CONTROL INTERFACE .............................................................................. 38 11.1 11.2 11.3 11.4 11.5 11.6 11.7 GENERAL DESCRIPTION ............................................................................. 38 CONTROL INTERFACE MODES ................................................................... 38 2-WIRE SERIAL CONTROL MODE ............................................................... 39 3-WIRE SERIAL CONTROL MODE ............................................................... 42 4-WIRE SERIAL CONTROL MODE ............................................................... 43 REGISTER LOCKING .................................................................................... 44 SPECIAL REGISTERS ................................................................................... 44 11.7.1 11.7.2 CHIP ID ................................................................................................................................ 44 DEVICE INFORMATION ...................................................................................................... 44 w PD, December 2010, Rev 4.3 4 WM8350 Production Data 12 CLOCKING, TIMING AND SAMPLE RATES .............................................. 45 12.1 GENERAL DESCRIPTION ............................................................................. 45 12.1.1 12.1.2 12.1.3 12.2 12.3 CRYSTAL OSCILLATOR................................................................................ 46 CLOCKING AND SAMPLE RATES ................................................................ 47 12.3.1 12.3.2 12.3.3 12.3.4 12.3.5 12.3.6 12.4 SYSCLK CONTROL............................................................................................................. 49 ADC / DAC SAMPLE RATES............................................................................................... 50 BCLK CONTROL ................................................................................................................. 52 ADCLRCLK / DACLRCLK CONTROL ................................................................................. 54 OPCLK CONTROL .............................................................................................................. 55 SLOWCLK CONTROL ......................................................................................................... 55 FLL ................................................................................................................. 55 12.4.1 12.4.2 13 CLOCKING THE AUDIO CODEC ........................................................................................ 46 CLOCKING THE DC-DC CONVERTERS ............................................................................ 46 INTERNAL RC OSCILLATOR .............................................................................................. 46 EXAMPLE FLL CALCULATION ........................................................................................... 58 EXAMPLE FLL SETTINGS .................................................................................................. 59 AUDIO CODEC SUBSYSTEM ..................................................................... 60 13.1 13.2 13.3 13.4 GENERAL DESCRIPTION ............................................................................. 60 AUDIO PATHS ............................................................................................... 61 ENABLING THE AUDIO CODEC ................................................................... 62 INPUT SIGNAL PATH .................................................................................... 63 13.4.1 13.4.2 13.4.3 13.4.4 13.4.5 13.4.6 13.4.7 13.5 ANALOGUE TO DIGITAL CONVERTER (ADC) ............................................. 71 13.5.1 13.5.2 13.6 OUT1L AND OUT1R ............................................................................................................ 83 OUT2L AND OUT2R ............................................................................................................ 85 HEADPHONE OUTPUTS EXTERNAL CONNECTIONS ..................................................... 87 OUT3 AND OUT4 ................................................................................................................ 89 DIGITAL AUDIO INTERFACE ........................................................................ 91 13.10.1 13.10.2 13.10.3 13.10.4 13.11 13.12 ENABLING THE ANALOGUE OUTPUTS ............................................................................ 79 OUTPUT MIXERS ................................................................................................................ 80 ANALOGUE OUTPUTS .................................................................................. 83 13.9.1 13.9.2 13.9.3 13.9.4 13.10 DAC PLAYBACK VOLUME CONTROL ............................................................................... 76 DAC SOFT MUTE AND SOFT UN-MUTE............................................................................ 76 DAC DE-EMPHASIS ............................................................................................................ 77 DAC OUTPUT PHASE AND MONO MIXING ....................................................................... 78 DAC STOPBAND ATTENUATION ....................................................................................... 78 OUTPUT SIGNAL PATH ................................................................................ 79 13.8.1 13.8.2 13.9 DIGITAL SIDETONE ............................................................................................................ 73 DIGITAL TO ANALOGUE CONVERTER (DAC) ............................................. 75 13.7.1 13.7.2 13.7.3 13.7.4 13.7.5 13.8 ADC VOLUME CONTROL ................................................................................................... 72 ADC HIGH-PASS FILTER.................................................................................................... 72 DIGITAL MIXING ............................................................................................ 73 13.6.1 13.7 MICROPHONE INPUTS ...................................................................................................... 63 ENABLING THE PRE-AMPLIFIERS .................................................................................... 64 SELECTING INPUT SIGNALS ............................................................................................. 65 CONTROLLING THE PRE-AMPLIFIER GAINS ................................................................... 66 MICROPHONE BIASING ..................................................................................................... 67 AUXILIARY INPUTS (IN3L AND IN3R) ................................................................................ 67 INPUT MIXERS .................................................................................................................... 69 AUDIO DATA FORMATS ..................................................................................................... 91 AUDIO INTERFACE TDM MODE ........................................................................................ 94 TDM DATA FORMATS......................................................................................................... 94 LOOPBACK ......................................................................................................................... 96 COMPANDING ............................................................................................... 97 ADDITIONAL CODEC FUNCTIONS ............................................................... 99 w PD, December 2010, Rev 4.3 5 WM8350 Production Data 13.12.1 13.12.2 13.12.3 13.12.4 13.12.5 13.12.6 13.12.7 14 POWER MANAGEMENT SUBSYSTEM .................................................... 106 14.1 14.2 GENERAL DESCRIPTION ........................................................................... 106 POWER MANAGEMENT OPERATING STATES ......................................... 106 14.2.1 14.3 14.4 OVERVIEW........................................................................................................................ 142 DC-DC STEP DOWN CONVERTERS ............................................................................... 143 DC-DC STEP UP CONVERTERS...................................................................................... 144 LDO REGULATOR OPERATION ................................................................. 145 CURRENT LIMIT SWITCH ........................................................................ 146 15.1 15.2 GENERAL DESCRIPTION ........................................................................... 146 CONFIGURING THE CURRENT LIMIT SWITCH......................................... 146 15.2.1 15.2.2 15.2.3 16 LDO REGULATOR ENABLE ............................................................................................. 137 LDO REGULATOR CONTROL .......................................................................................... 138 INTERRUPTS AND FAULT PROTECTION ....................................................................... 140 ADDITIONAL CONTROL FOR LDO1 ................................................................................ 141 DC-DC CONVERTER OPERATION ............................................................. 142 14.8.1 14.8.2 14.8.3 14.9 DC-DC CONVERTER ENABLE ......................................................................................... 128 CLOCKING ........................................................................................................................ 129 DC-DC BUCK (STEP-DOWN) CONVERTER CONTROL.................................................. 129 DC-DC BOOST (STEP-UP) CONVERTER CONTROL...................................................... 132 INTERRUPTS AND FAULT PROTECTION ....................................................................... 134 CONFIGURING THE LDO REGULATORS .................................................. 137 14.7.1 14.7.2 14.7.3 14.7.4 14.8 CONFIGURATION MODE 01 ............................................................................................ 119 CONFIGURATION MODE 10 ............................................................................................ 122 CONFIGURATION MODE 11 ............................................................................................ 125 CONFIGURING THE DC-DC CONVERTERS .............................................. 128 14.6.1 14.6.2 14.6.3 14.6.4 14.6.5 14.7 CONTROL INTERFACE REDIRECTION ........................................................................... 114 STARTING UP IN DEVELOPMENT MODE ....................................................................... 115 CONFIGURING THE WM8350 IN DEVELOPMENT MODE .............................................. 117 CUSTOM MODES ........................................................................................ 119 14.5.1 14.5.2 14.5.3 14.6 STARTUP .......................................................................................................................... 108 POWER-UP SEQUENCING .............................................................................................. 109 SHUTDOWN ...................................................................................................................... 110 POWER CYCLING ............................................................................................................ 111 REGISTER RESET ............................................................................................................ 111 RESET SIGNALS............................................................................................................... 112 DEVELOPMENT MODE ............................................................................... 114 14.4.1 14.4.2 14.4.3 14.5 HIBERNATE STATE SELECTION ..................................................................................... 107 POWER SEQUENCING AND CONTROL .................................................... 108 14.3.1 14.3.2 14.3.3 14.3.4 14.3.5 14.3.6 15 HEADPHONE JACK DETECT ............................................................................................. 99 MICROPHONE DETECTION ............................................................................................. 100 MID-RAIL REFERENCE (VMID) ........................................................................................ 101 ANTI-POP CONTROL ........................................................................................................ 102 UNUSED ANALOGUE INPUTS/OUTPUTS ....................................................................... 103 ZERO CROSS TIMEOUT .................................................................................................. 105 INTERRUPTS AND FAULT PROTECTION ....................................................................... 105 CURRENT LIMIT SWITCH ENABLE ................................................................................. 146 CURRENT LIMIT SWITCH BULK DETECTION CONTROL .............................................. 147 INTERRUPTS AND FAULT PROTECTION ....................................................................... 147 CURRENT SINKS (LED DRIVERS) .......................................................... 149 16.1 16.2 GENERAL DESCRIPTION ........................................................................... 149 CONSTANT-CURRENT SINKS .................................................................... 149 16.2.1 16.2.2 16.2.3 16.2.4 ENABLING THE SINK CURRENT ..................................................................................... 149 PROGRAMMING THE SINK CURRENT............................................................................ 150 FLASH MODE .................................................................................................................... 150 ON/OFF RAMP TIMING ..................................................................................................... 152 w PD, December 2010, Rev 4.3 6 WM8350 Production Data 16.2.5 16.3 16.4 17 POWER SUPPLY CONTROL .................................................................... 154 17.1 17.2 17.3 17.4 17.5 17.6 17.7 GENERAL DESCRIPTION ........................................................................... 154 BATTERY POWERED OPERATION ............................................................ 155 WALL ADAPTOR (LINE) POWERED OPERATION ..................................... 155 USB POWERED OPERATION ..................................................................... 156 EXTERNAL INTERRUPTS ........................................................................... 158 BACKUP POWER ........................................................................................ 158 BATTERY CHARGER .................................................................................. 159 17.7.1 17.7.2 17.7.3 17.7.4 17.7.5 17.7.6 17.7.7 17.7.8 18 19 GENERAL DESCRIPTION ........................................................................... 172 INITIATING AUXADC MEASUREMENTS .................................................... 173 VOLTAGE SCALING AND REFERENCES................................................... 175 AUXADC READBACK .................................................................................. 176 CALIBRATION .............................................................................................. 178 DIGITAL COMPARATORS ........................................................................... 179 AUXADC INTERRUPTS ............................................................................... 180 GENERAL PURPOSE INPUTS / OUTPUTS (GPIO) ................................. 181 20.1 GENERAL DESCRIPTION ........................................................................... 181 20.1.1 20.1.2 20.1.3 20.2 MAIN REFERENCE (VREF) ......................................................................... 191 LOW-POWER REFERENCE........................................................................ 191 REAL-TIME CLOCK (RTC)........................................................................ 192 22.1 22.2 GENERAL DESCRIPTION ........................................................................... 192 RTC CONTROL ............................................................................................ 192 22.2.1 22.2.2 22.2.3 22.2.4 22.2.5 22.3 22.4 22.5 23 24 LIST OF ALTERNATE FUNCTIONS .................................................................................. 184 SELECTING GPIO ALTERNATE FUNCTIONS ................................................................. 187 VOLTAGE REFERENCES ......................................................................... 191 21.1 21.2 22 CONFIGURING GPIO PINS .............................................................................................. 182 INPUT DE-BOUNCE .......................................................................................................... 183 GPIO INTERRUPTS .......................................................................................................... 183 GPIO ALTERNATE FUNCTIONS ................................................................. 184 20.2.1 20.2.2 21 GENERAL DESCRIPTION................................................................................................. 159 BATTERY CHARGER ENABLE ......................................................................................... 160 TRICKLE CHARGING ........................................................................................................ 161 FAST CHARGING .............................................................................................................. 163 BATTERY CHARGER TIMEOUT AND TERMINATION ..................................................... 165 BATTERY CHARGER STATUS ......................................................................................... 166 BATTERY FAULT CONDITIONS ....................................................................................... 167 INTERRUPTS AND FAULT PROTECTION ....................................................................... 169 SYSTEM MONITORING AND UNDERVOLTAGE LOCKOUT (UVLO) ..... 170 AUXILIARY ADC ........................................................................................ 172 19.1 19.2 19.3 19.4 19.5 19.6 19.7 20 INTERRUPTS AND FAULT PROTECTION ....................................................................... 152 OPEN-DRAIN LED OUTPUTS ..................................................................... 153 LED DRIVER CONNECTIONS ..................................................................... 153 MODES OF OPERATION .................................................................................................. 192 RTC TIME REGISTERS ..................................................................................................... 192 SETTING THE TIME .......................................................................................................... 193 RTC ALARM REGISTERS ................................................................................................. 193 SETTING THE ALARM ...................................................................................................... 195 TRIMMING THE RTC ................................................................................... 195 RTC GPIO OUTPUT..................................................................................... 197 RTC INTERRUPTS ...................................................................................... 198 WATCHDOG TIMER .................................................................................. 199 INTERRUPT CONTROLLER ..................................................................... 201 24.1 CONFIGURING THE IRQ PIN ...................................................................... 201 w PD, December 2010, Rev 4.3 7 WM8350 24.2 24.3 Production Data FIRST-LEVEL INTERRUPTS ....................................................................... 202 SECOND-LEVEL INTERRUPTS .................................................................. 203 24.3.1 24.3.2 24.3.3 24.3.4 24.3.5 24.3.6 24.3.7 24.3.8 24.3.9 24.3.10 24.3.11 24.3.12 25 TEMPERATURE SENSING ....................................................................... 211 25.1 26 OVERVIEW .................................................................................................. 212 REGISTER BITS BY ADDRESS................................................................ 223 DIGITAL FILTER CHARACTERISTICS ..................................................... 328 28.1 28.2 29 CHIP TEMPERATURE MONITORING ......................................................... 211 REGISTER MAP ........................................................................................ 212 26.1 27 28 DAC FILTER RESPONSES .......................................................................... 328 ADC FILTER RESPONSES .......................................................................... 329 APPLICATIONS INFORMATION ............................................................... 330 29.1 29.2 29.3 29.4 TYPICAL CONNECTIONS ........................................................................... 330 VOLTAGE REFERENCE (VREF) COMPONENTS ....................................... 331 DC-DC (STEP-DOWN) CONVERTER EXTERNAL COMPONENTS ............ 331 DC-DC (STEP-UP) CONVERTER EXTERNAL COMPONENTS .................. 333 29.4.1 29.4.2 29.4.3 29.4.4 29.5 29.6 30 31 OVERCURRENT INTERRUPT .......................................................................................... 203 UNDERVOLTAGE INTERRUPTS ...................................................................................... 203 CURRENT SINK (LED DRIVER) INTERRUPTS ................................................................ 204 EXTERNAL INTERRUPTS ................................................................................................ 205 CODEC INTERRUPTS ...................................................................................................... 205 GPIO INTERRUPTS .......................................................................................................... 206 AUXADC AND DIGITAL COMPARATOR INTERRUPTS ................................................... 207 RTC INTERRUPTS ............................................................................................................ 207 SYSTEM INTERRUPTS ..................................................................................................... 208 CHARGER INTERRUPTS ................................................................................................. 208 USB INTERRUPTS ............................................................................................................ 209 WAKE-UP INTERRUPTS .................................................................................................. 210 DC-DC (STEP-UP) CONVERTERS - CONSTANT VOLTAGE MODE ............................... 333 DC-DC (STEP-UP) CONVERTERS - CONSTANT CURRENT MODE .............................. 335 DC-DC (STEP-UP) CONVERTERS - USB MODE ............................................................. 336 DC-DC (STEP-UP) CONVERTERS RECOMMENDED COMPONENTS ........................... 336 LDO REGULATOR EXTERNAL COMPONENTS ......................................... 337 PCB LAYOUT ............................................................................................... 338 PACKAGE DIAGRAM ................................................................................ 339 IMPORTANT NOTICE ................................................................................ 340 w PD, December 2010, Rev 4.3 8 WM8350 Production Data 1 PIN CONFIGURATION 1 2 3 4 5 6 7 8 9 10 11 12 13 A VP5 PG5 OP PV1 L1 PG1 PG6 L6 PV6 FB6 GPIO12 FB2 PG2 B L5 NGATE5 IP PV1 L1 PG1 PG6 L6 PV6 PVDD GPIO10 NGATE2 VP2 C L4 PG4 FB4 FB5 LINEDCD C FB1 GND GND AUX4 GPIO11 PGND PG3 L2 D PV4 BATT HIVDD N/A N/A N/A N/A N/A N/A N/A FB3 PV3 L3 E BATT BATT WALLFB N/A N/A N/A N/A N/A N/A N/A ISINKA ISINKB SINKGND F LINE LINE LIN E N/A N/A GND GND GND N/A N/A VOUT4 LDO VDD VINB G USB USB U SB N/A N/A GND GND GND N/A N/A VOUT2 VOUT3 VINA H VRTC LINEINT CREF N/A N/A GND GND GND N/A N/A AUX1 VOUT1 AUX3 J CONF0 X1 RREF N/A N/A N/A N/A N/A N/A N/A OUT1R HPCOM AUX2 K CONF1 ON X2 N/A N/A N/A N/A N/A N/A N/A OUT1L OUT4 HPVDD L G PIO0 /RST SW VRTC IR Q GPIO5 GPIO 8 GPIO9 BCLK LRCLK IN3L IN 1LN OUT3 HPGND M G PIO2 GPIO1 SDA GPIO6 DGND MCLK ADCDATA AVD D IN3R INL2 MICBIAS OUT2R OUT2L N G PIO3 SCL GPIO4 GPIO7 DCVDD DBVDD VMID IN1LP INR2 IN1RP IN1RN DACDATA REFG ND 7mm x 7mm BGA1Z Notes: Pin names beginning with a lower-case "n" indicate that the pin is active low. Colour coding indicates function of pins in typical usage: DC-DC converters LDO voltage regulators Power m anagem ent functions Analogue pins for audio codec Digital pins for audio codec Quiet ground Others 2 ORDERING INFORMATION ORDER CODE TEMPERATURE RANGE PACKAGE MOISTURE SENSITIVITY LEVEL PEAK SOLDERING TEMPERATURE WM8350GEB/V -25°C to +85°C 129-ball BGA (7 x 7 mm) (Pb-free) MSL3 260oC WM8350GEB/RV -25°C to +85°C 129-ball BGA (7 x 7 mm) (Pb-free, tape and reel) MSL3 260oC Note: Reel quantity = 2,200 w PD, December 2010, Rev 4.3 9 WM8350 3 Production Data PIN DESCRIPTION Notes: Pins are listed in alphabetical order by name. NAME LOCATION(S) TYPE ADCDATA M7 Digital Output AUX1 H11 POWER DOMAIN DESCRIPTION DBVDD Digital audio output (typically from on-chip audio ADC to external IC) Analogue Input LINE Auxiliary ADC input AUX1 (Special function for connection to temperature-sensing NTC resistor in battery pack) AUX2 J13 Analogue Input LINE Auxiliary ADC input AUX2 AUX3 H13 Analogue Input LINE Auxiliary ADC input AUX3 AUX4 C9 Analogue Input LINE Auxiliary ADC input AUX4 AVDD M8 Supply BATT E1, E2, D2 Analogue I/O BCLK L8 Digital I/O CREF H3 Analogue Output Analogue supply for audio CODEC Main battery power connection (can draw power or charge battery) DBVDD Bit clock signal for digital audio interface VRTC Decoupling for VREF reference voltage (connect capacitor here) CONF0 J1 Digital Input VRTC Start-up configuration pin 0 CONF1 K1 Digital Input VRTC Start-up configuration pin 1 DACDATA N7 Digital Input DBVDD Digital audio input (typically from external IC to on-chip audio DAC) DCVDD N5 Supply Digital core supply; powers digital core of audio CODEC DBVDD N6 Supply Digital I/O buffer supply; powers digital audio interface, control interface and pins GPIO4 to GPIO9 DGND M5 Supply Digital ground; return path for DCVDD and DBVDD supplies FB1 C6 Analogue Input PV1 DC-DC1 feedback pin FB2 A12 Analogue Input VP2 DC-DC2 feedback pin FB3 D11 Analogue Input PV3 DC-DC3 feedback pin FB4 C3 Analogue Input PV4 DC-DC4 feedback pin FB5 C4 Analogue Input VP5 DC-DC5 feedback pin FB6 A10 Analogue Input PV6 DC-DC6 feedback pin GND F6, F7, F8, G6,G7, G8, H6, H7, H8, C7, C8 Supply Quiet ground connection for audio CODEC. Note that DC-DC Converters use a separate ground connection. GPIO0 L1 Digital I/O VRTC General Purpose Input/Output pin 0 GPIO1 M2 Digital I/O VRTC General Purpose Input/Output pin 1 GPIO2 M1 Digital I/O VRTC General Purpose Input/Output pin 2 GPIO3 N1 Digital I/O VRTC General Purpose Input/Output pin 3 GPIO4 N3 Digital I/O DBVDD General Purpose Input/Output pin 4 GPIO5 L5 Digital I/O DBVDD General Purpose Input/Output pin 5 GPIO6 M4 Digital I/O DBVDD General Purpose Input/Output pin 6 GPIO7 N4 Digital I/O DBVDD General Purpose Input/Output pin 7 GPIO8 L6 Digital I/O DBVDD General Purpose Input/Output pin 8 GPIO9 L7 Digital I/O DBVDD General Purpose Input/Output pin 9 GPIO10 B11 Digital I/O LINE General Purpose Input/Output pin 10 GPIO11 C10 Digital I/O LINE General Purpose Input/Output pin 11 GPIO12 A11 Digital I/O LINE HIVDD D3 Analogue Output HPCOM J12 Analogue Input HPGND L13 w Supply General Purpose Input/ Output pin 12 Analogue output from power management unit which determines highest supply from Line, Battery or USB. HPVDD Headphone output amplifier noise compensation input HPVDD Headphone ground; return path for HPVDD supply PD, December 2010, Rev 4.3 10 WM8350 Production Data NAME LOCATION(S) TYPE POWER DOMAIN DESCRIPTION HPVDD K13 Supply IN1LN L11 Analogue Input AVDD Inverting input for left microphone channel AVDD Non-inverting input 1 for left microphone channel Inverting input for right microphone channel Headphone supply – powers the analogue outputs OUT1L, OUT1R, OUT2L, OUT2R, OUT3 and OUT4 IN1LP N10 Analogue Input IN1RN N13 Analogue Input AVDD IN1RP N12 Analogue Input AVDD Non-inverting input 1 for right microphone channel IN2L M10 Analogue Input AVDD Non-inverting input 2 for left microphone channel IN2R N11 Analogue Input AVDD Non-inverting input 2 for right microphone channel IN3L L10 Analogue Input AVDD Auxiliary input for analogue audio signals (left channel) IN3R M9 Analogue Input AVDD Auxiliary input for analogue audio signals (right channel) Power input to current limit switch IP B3 Analogue Input ISINKA E11 Analogue Output LDOVDD Constant-current LED driver A ISINKB E12 Analogue Output LDOVDD Constant-current LED driver B L1 A5, B5 Analogue I/O PV1 DC-DC1 inductor connection L2 C13 Analogue I/O VP2 DC-DC2 inductor connection L3 D13 Analogue I/O PV3 DC-DC3 inductor connection L4 C1 Analogue I/O PV4 DC-DC4 inductor connection L5 B1 Analogue I/O VP5 DC-DC5 inductor connection L6 A8, B8 Analogue I/O PV6 DC-DC6 inductor connection LDOVDD F12 Supply LDO amplifier supply voltage LINEDCDC C5 Supply Supply connection for DC-DC 1, 4 and 5 control circuits LINEINT H2 Supply Supply connection for Internal Reference circuits LINE F1, F2, F3 Supply LRCLK L9 Digital I/O DBVDD Word clock (left/right clock) signal for digital audio interface LINE supply connection MCLK M6 Digital I/O DBVDD Master Clock (may be generated internally or externally) MICBIAS M11 Analogue Output AVDD Low-noise bias voltage for condenser microphones (connect decoupling capacitor here) NGATE2 B12 Analogue Output VP2 DC-DC2 connection to gate of external power FET NGATE5 B2 Analogue Output VP5 DC-DC5 connection to gate of external power FET IRQ L4 Digital Output open-drain DBVDD Interrupt signal from WM8350 to host processor ON K2 Digital Input /RST L2 Digital Output open-drain OP A3 Analogue Output OUT1L K11 Analogue Output VRTC Connection for power-on switch DBVDD System Reset Signal (active low) AVDD Left channel analogue audio output 1 Power output from current limit switch OUT2L M13 Analogue Output AVDD Left channel analogue audio output 2 OUT1R J11 Analogue Output AVDD Right channel analogue audio output 1 OUT2R M12 Analogue Output AVDD Right channel analogue audio output 2 OUT3 L12 Analogue Output AVDD Analogue audio output 3 (or pseudo-ground output for capacitor-less headphone outputs) OUT4 K12 Analogue Output AVDD Analogue audio output 4 PG1 A6, B6 Supply DC-DC1 power ground PG2 A13 Supply DC-DC2 power ground PG3 C12 Supply DC-DC3 power ground PG4 C2 Supply DC-DC4 power ground PG5 A2 Supply DC-DC5 power ground PG6 A7, B7 Supply DC-DC6 power ground PGND C11 Supply Ground connection PV1 A4, B4, Supply DC-DC1 line or battery power input PV3 D12 Supply DC-DC3 line or battery power input PV4 D1 Supply DC-DC4 line or battery power input w PD, December 2010, Rev 4.3 11 WM8350 Production Data NAME LOCATION(S) TYPE POWER DOMAIN DESCRIPTION PV6 A9, B9 Supply DC-DC6 power input PVDD B10 Supply Supply connection for DC-DC 2, 3 and 6 control circuits REFGND N8 Supply Reference ground for audio ADC and DAC RREF J3 Analogue Output SCLK N2 Digital Input DBVDD Clock signal for 2-wire serial control interface (5V Tolerant) DBVDD Data line for 2-wire serial control interface (5V Tolerant) VRTC Switchable VRTC output. Typically used for battery temperature monitoring SDATA M3 Digital I/O SINKGND E13 Supply SWVRTC L3 Analogue Output Connection for external 100kΩ current reference resistor Ground connection for ISINKA and ISINKB USB G1, G2, G3 Supply Connection to USB power rail VINA G13 Supply Input to voltage regulators LDO1 and LDO2 VINB F13 Supply VMID N9 Analogue I/O AVDD Reference voltage (normally AVDD/2) for audio CODEC (connect capacitor here) VOUT1 H12 Analogue Output VINA Output of voltage regulator LDO1 VOUT2 G11 Analogue Output VINA Output of voltage regulator LDO2 VOUT3 G12 Analogue Output VINB Output of voltage regulator LDO3 VOUT4 F11 Analogue Output VINB Output of voltage regulator LDO4 VP2 B13 Supply DC-DC2 power input VP5 A1 Supply DC-DC5 power input VRTC H1 Supply Backup power connection (WM8350 can draw power from this pin or re-charge the backup power source) WALLFB E3 Analogue Input LINE Connection to Wall feedback X1 J2 Analogue Input VRTC Connection for 32.768kHz crystal (input to oscillator from crystal) or 32.768kHz external clock input (when not using crystal) X2 K3 Analogue Output VRTC Connection for 32.768kHz crystal (output from oscillator to crystal) w Input to voltage regulators LDO3 and LDO4 PD, December 2010, Rev 4.3 12 WM8350 Production Data 4 THERMAL CHARACTERISTICS Thermal analysis must be performed in the intended application to prevent the WM8350 from exceeding maximum junction temperature. Several contributing factors affect thermal performance most notably the physical properties of the mechanical enclosure, location of the device on the PCB in relation to surrounding components and the number of PCB layers. Connecting the nine central GND balls through thermal vias and into a large ground plane will aid heat extraction. Three main heat transfer paths exist to surrounding air: - Package top to air (radiation). - Package bottom to PCB (radiation). - Package leads to PCB (conduction). The temperature rise TR is given by TR = PD * ӨJA - PD is the power dissipated by the device. - ӨJA is the thermal resistance from the junction of the die to the ambient temperature and is therefore a measure of heat transfer from the die to surrounding air. - For WM8350, ӨJA = 32°C/W The junction temperature TJ is given by TJ = TA + TR - TA, is the ambient temperature. The worst case conditions are when the WM8350 is operating in a high ambient temperature, with low supply voltage, high duty cycle and high output current. Under such conditions, it is possible that the heat dissipated could exceed the maximum junction temperature of the device. Care must be taken to avoid this situation. An example calculation of the junction temperature is given below. - PD = 1W (example figure) - ӨJA = 32°C/W - TR = PD * ӨJA = 32°C - TA = 85°C (example figure) - TJ = TA +TR = 117°C The minimum and maximum operating junction temperatures for the WM8350 are quoted in Section 5. The maximum junction temperature is 125°C. Therefore, the junction temperature in the above example is within the operating limits of the WM8350. w PD, December 2010, Rev 4.3 13 WM8350 5 Production Data ABSOLUTE MAXIMUM RATINGS Absolute Maximum Ratings are stress ratings only. Permanent damage to the device may be caused by continuously operating at or beyond these limits. Device functional operating limits and guaranteed performance specifications are given under Electrical Characteristics at the test conditions specified. ESD Sensitive Device. This device is manufactured on a CMOS process. It is therefore generically susceptible to damage from excessive static voltages. Proper ESD precautions must be taken during handling and storage of this device. Wolfson tests its package types according to IPC/JEDEC J-STD-020B for Moisture Sensitivity to determine acceptable storage conditions prior to surface mount assembly. These levels are: MSL1 = unlimited floor life at