CRD4205-1

CRD4205-1 CrystalClear® Notebook Audio Docking Station Example Features l Emulates Description Docking Station Environment The CRD4205-1 reference design features the CS4205 AC ‘97 audio codec and emulates the audio sub-system in a PC notebook computer. The CRD4205-1 can be used alone or with the CRD4205-2 companion card. The CRD4205-2 companion card simulates the audio subsystem in a PC digital docking station. This reference design features stereo analog audio inputs for Line, CD, Video, and Aux inputs. In addition, the card has mono analog inputs for Microphone, Modem Audio, and PC Beep. It also has several advanced features including a ZV port digital input and a S/PDIF digital output. The CRD4205-1 is available by ordering the CMK42053 manufacturing kit. This kit includes a full set of schematics (OrCAD® 7.2 format), PCB job files (PADS ® ASCII), PCB Gerber files, and bill of materials. In addition, WDM audio drivers that support Windows 98se, Millennium®, and Windows 2000 are also included. ORDERING INFORMATION CMK4205-3 Manufacturing Kit for the CRD4205-1 – Simulates audio portion of a notebook computer – “Docks” to the CRD4205-2 l Features the CS4205 AC ‘97 audio codec. – 18-bit Analog to Digital Converters (ADCs) – 20-bit Digital to Analog Converters (DACs) – Digital mixer – Integrated digital effects l Four stereo and two mono analog inputs l Digital ZV port input l Five GPIO pins l CNR interface l S/PDIF (IEC-958) digital output l Crystal, oscillator, or PLL operation l Exceeds Microsoft PC-99 and PC-2001 audio performance requirements MIC IN INT MODEM CD IN VIDEO IN AUX IN LINE IN LINE / HEADPHONE OUT CS4205 Cirrus Logic CRD4205-1_REVB S/PDIF OUT Preliminary Product Information P.O. Box 17847, Austin, Texas 78760 (512) 445 7222 FAX: (512) 445 7581 http://www.cirrus.com This document contains information for a new product. Cirrus Logic reserves the right to modify this product without notice. Copyright © Cirrus Logic, Inc. 2001 (All Rights Reserved) FEB ‘01 DS489RD1A2 1 CRD4205-1 TABLE OF CONTENTS 1. 2. GENERAL INFORMATION .......................................................................... 3 SCHEMATIC DESCRIPTION ...................................................................... 3 2.1 Block Diagram ...................................................................................... 3 2.2 CS4205 Audio Codec ........................................................................... 3 2.3 Analog Inputs ....................................................................................... 3 2.4 Dock Interface ..................................................................................... 4 2.5 AnalogOutputs ..................................................................................... 4 2.6 S/PDIF Optical Output .......................................................................... 4 2.7 CNR Connector .................................................................................... 4 2.8 Component Selection ........................................................................... 5 2.9 EMC Components ................................................................................ 5 GROUNDING AND LAYOUT ....................................................................... 5 REFERENCES ............................................................................................. 6 ADDENDUM ................................................................................................. 6 BILL OF MATERIALS ............................................................................ 22 3. 4. 5. 6. LIST OF FIGURES Figure 1. Block Diagram........................................................................................7 Figure 2. CS4205 Audio Codec.............................................................................8 Figure 3. Analog Inputs .........................................................................................9 Figure 4. Docking Interface .................................................................................10 Figure 5. Analog Outputs ....................................................................................11 Figure 6. S/PDIF Optical Outputs........................................................................12 Figure 7. CNR Connector....................................................................................13 Figure 8. Assembly Drawing ...............................................................................14 Figure 9. Top Silkscreen .....................................................................................15 Figure 10. Top Layer ...........................................................................................16 Figure 11. Ground Layer .....................................................................................17 Figure 12. Vcc Layer ...........................................................................................18 Figure 13. Bottom Layer......................................................................................19 Figure 14. Bottom Silkscreen ..............................................................................20 Figure 15. Drill Drawing.......................................................................................21 LIST OF TABLES Table 1. Serial I/O Breakout Connector ................................................................ 3 Table 2. CNR Connector Jumper Settings ............................................................ 5 Table 3. JP8 and JP3 Positions for Each Clock Mode .......................................... 5 Table 4. Bill of Materials ...................................................................................... 22 Contacting Cirrus Logic Support For a complete listing of Direct Sales, Distributor, and Sales Representative contacts, visit the Cirrus Logic web site at: http://www.cirrus.com/corporate/contacts/sales.cfm Microsoft , Windows 95, Windows 98 and Windows Millenium and WHQL is registered trademark of Microsoft. CrystalClear is a trademark of Cirrus Logic, Inc. Intel is a registered trademark of Intel Corporation. OrCAD is a registered trademark of OrCAD, Inc. PADS is a registered trademark of, PADS Software, Inc. Preliminary product information describes products which are in production, but for which full characterization data is not yet available. Advance product information describes products which are in development and subject to development changes. Cirrus Logic, Inc. has made best efforts to ensure that the information contained in this document is accurate and reliable. However, the information is subject to change without notice and is provided “AS IS” without warranty of any kind (express or implied). No responsibility is assumed by Cirrus Logic, Inc. for the use of this information, nor for infringements of patents or other rights of third parties. This document is the property of Cirrus Logic, Inc. and implies no license under patents, copyrights, trademarks, or trade secrets. No part of this publication may be copied, reproduced, stored in a retrieval system, or transmitted, in any form or by any means (electronic, mechanical, photographic, or otherwise) without the prior written consent of Cirrus Logic, Inc. Items from any Cirrus Logic website or disk may be printed for use by the user. However, no part of the printout or electronic files may be copied, reproduced, stored in a retrieval system, or transmitted, in any form or by any means (electronic, mechanical, photographic, or otherwise) without the prior written consent of Cirrus Logic, Inc.Furthermore, no part of this publication may be used as a basis for manufacture or sale of any items without the prior written consent of Cirrus Logic, Inc. The names of products of Cirrus Logic, Inc. or other vendors and suppliers appearing in this document may be trademarks or service marks of their respective owners which may be registered in some jurisdictions. A list of Cirrus Logic, Inc. trademarks and service marks can be found at http://www.cirrus.com. 2 CRD4205-1 1. GENERAL INFORMATION The CRD4205-1 reference design can be used for the development of CNR or motherboard PC audio systems that use the CS4205. The CRD4205-1 can also be used in conjunction with the CRD4205-2 to develop audio systems for PC notebook computers with digital docking stations. The CS4205 is an AC ‘97 audio codec with the same great features as our other Crystal Clear® audio codecs and some unique features especially designed for PC notebook computers. These include I2S outputs for digital docking and a ZV port for digital audio inputs. For additional information on the CS4205 audio codec, see the CS4205 Datasheet. The CS4205 has anti-alias filters for the ADCs that require external filter capacitors on AFLT1, AFLT2, and AFLT3 (pins 29, 30, and 31). Each pin has a 1000 pF NPO/COG capacitor to analog ground. NPO/COG capacitors are used to minimize audio distortion. The internal ADCs, DACs, and AC-Link operate at a fixed 48 kHz sampling rate. The CS4205 is clocked by a 24.576 MHz (+ 50 PPM) crystal. This design provides two population options for different crystal footprints. Footprint Y1 is for CA301 miniature crystals and footprint Y2 supports standard HC-49S package. Footprint Y3 is for an optional clock oscillator. Many notebook computers have a ZV or “Zoomed Video” port that carries PCM audio data in I2S serial format. The CS4205 has a built-in ZV port input connected to JP5. The CS4205 has seven multi-purpose pins that primarily support I2S serial inputs and outputs for digital docking or multi-channel audio. These signals are tied to a a 5x2 (0.1 inch center) breakout connector. Pin 1 3 5 7 9 Even Pins Function LRCLK SDO1 DSSD1 DSSD2 DSDD3 Digital Ground 2. SCHEMATIC DESCRIPTION This section describes the CRD4205-1 schematics shown in figures 1 through 7. These schematics are also available in the CMK4205-3 manufacturing kit as ORCAD version 7.2 files. 2.1 Block Diagram The block diagram shows the interconnections between schematic pages. The schematic is divided into six blocks: the CS4205 Audio Codec, Analog Inputs, Docking Interface, Analog Outputs, S/PDIF Optical Output, and CNR Connector. 2.2 CS4205 Audio Codec Figure 2 shows the CS4205 and its associated circuitry. The CS4205 communicates digitally to the audio controller or core logic through a five wire bi-directional 12.288 MHz serial interface called the AC-Link. The AC-Link may require series termination resistors. These resistors should be located close to their respective signal source. The BIT_CLK and SDATA_IN signals are driven from the CS4205, while the SDATA_OUT, SYNC, and RESET# signals are driven from the controller. RESET# does not require serial termination. Table 1. Serial I/O Breakout Connector 2.3 Analog Inputs The CRD4205-1 has four stereo and three mono analog audio inputs as shown in figure 3. The inputs for VIDEO, AUX and LINE are passed through a divider circuit that reduces the voltage by 6 dB to allow connection of line level sources up to 2 Vrms. The 100 pF capacitors are provided on Line In and Mic In for EMI suppression. The capacitors may be removed if EMC testing determines they are not required. 3 CRD4205-1 MIC IN and PC BEEP IN are AC coupled through 0.1 µF capacitors. All analog other analog inputs are AC coupled through 2.2 µF electrolytic capacitors to minimize the low frequency roll-off. The internal CD audio connection utilizes a pseudo-differential interface with CD GND as the common return path for both the left and right channels. This arrangement will reduce any common mode noise picked up by the CD signal path. The MODEM AUDIO connector provides monitoring of modem audio signals during modem dialing and connecting. This connector has both the modem audio input and output signals. The modem input voltage is divided by 6 dB and can accommodate a line level source up to 2 Vrms. The output is connected to the CS4205 MONO_OUT pin. The maximum output voltage is 1 Vrms. The MIC IN circuit complies with PC-99 requirements for both microphone phantom power and optional frequency response roll-offs. Phantom power for the microphone is derived from the +5 V analog supply and filtered by R14, R15, C27, and C28. The 3 dB roll-off points located at 60 Hz and 15 kHz. The PC BEEP input connector routes the computer beep tones to the CS4205. The CS4205 has a feature called PC Beep Bypass that allows system beeps to be heard even during system reset or BIOS boot-up. 2.5 Analog Outputs The LINE_OUT jack in figure 5 functions as the main stereo outputs in a two channel system. This circuit utilizes a Motorola MC34072 dual opamp which is capable of driving high impedance line level signals (10 kΩ or greater). This circuit has a gain of 3 dB. 2.6 S/PDIF Optical Output The S/PDIF (IEC-958) digital output in figure 6 is compatible with digital inputs on consumer devices such as stereo receivers and MiniDisc recorders. The S/PDIF output of the CS4205 operates at a fix sampling frequency of 48 kHz. The CRD4205-1 S/PDIF digital optical output uses an industry standard Toshiba TOTX-173 optical transmitter. 2.7 CNR Connector 2.4 Dock Interface The CRD4205-1 is designed to “dock” with the CRD4205-2 to simulate a notebook computer digital docking system. The CRD4205-1 simulates the audio circuitry in the notebook computer and the CRD4205-2 simulates the audio circuitry in the docking station. The CS4205 serial ports provides the digital audio output for the digital docking station. The CNR connector shown in figure 7 is the interface between the CRD4205-1 and the system motherboard. The CNR interface supports audio, modem, and LAN subsystems. Also present on the CNR connector is 12 Volt, 5 Volt, and 3.3 Volt power. The CRD4205-1 uses the AC-Link, SMBus, 12 Volt, and 3.3 Volt power. The SMBus signals are connected to a AT24C02 EEPROM that enables plug-in-play functionality. The EEPROM holds the subsystem vendor ID and subsystem ID. It also contains other information for implementing a Plug-and-Play CNR card. See the Intel® Communication and Network Riser homepage at http://developer.intel.com/technology/cnr/ for CNR design specifications, programming utilities, and information on programming the EEPROM. The CRD4205-1 CNR connector includes jumpers for several functions. These are summarized in table 2. 4 CRD4205-1 . Jumper JP1 Codec Reset JP2 3.3 V supply JP3 Primary Down JP8 From CNR Bus Secondary Down JP4 SDATA_IN0 SDIN Target JP9 Places pull-up Primary Down on Primary Down when inserted. Pins 1-2 Reset from CNR Bus 3.3 V from CNR Bus From CNR Bus Pins 2-3 Force Low Not Used Force Low Force Low SDATA_IN1 NA (2 pin jumper) 2.8 Component Selection Great attention was given to the particular components used on the CRD4205-1 board with cost, performance, and package selection as the most important factors. Listed are some of the guidelines used in the selection of components: • • No components smaller than 0805 package. Only single package components passive components. No resistor packs. This reduces the risk of crosstalk between audio signals. All ICs are surface mount. Dual footprint for XTAL. Standard H49S and small circular CA-301 pin in hole package. • • Table 2. CNR Connector Jumper Settings Note:The CRD4205-1 default positions for all jumpers is between pins 1-2 JP9 inserts a 1 kΩ pull-up on Primary Down. This is used to disable on-board audio for motherboards that have a 10 kΩ pull-down resistor on Primary Down as required by the CNR 1.1 specification. In addition, JP3 and JP8 can be used to determine the clocking mode of the CS4205. The CS4205 supports three clocking modes: oscillator (Osc), crystal (Xtal), and AC-Link bit clock (BIT_CLK). This is shown in table 3. JP8 1-2 1-2 2-3 2-3 1-2 1-2 2-3 2-3 JP3 1-2 2-3 1-2 2-3 1-2 2-3 1-2 2-3 ID 0 0 0 0 0 1 2 3 Osc Osc Osc Osc Osc Xtal Bclk Bclk Bclk PLL no yes yes yes no no no no Frequency Mode 24.576 MHz Primary 14.318 MHz Primary 27.000 MHz Primary 48.000 MHz Primary 24.576 MHz Primary 12.288 MHz Secondary 12.288 MHz Secondary 12.288 MHz Secondary 2.9 EMC Components Optional capacitors and inductors are included to help the board meet EMI compliance tests, such as FCC Part 15. Choose these component values according to individual requirements. 3. GROUNDING AND LAYOUT One of the most critical aspects of PC audio design is good PC board layout. The PC is a hostile environment for audio and good layout is essential for achieving high audio quality. The CRD4205-1 is partitioned into a digital and analog sections to help isolate noisy digital circuitry from quiet analog audio circuitry. The most important rule for successful PC audio layout is to keep all digital signal traces and components over the digital ground plane, and all analog signal traces and components over an analog ground plane. These planes are separated by a minimum of 60 to 100 mils (0.060 to 0.100 inches). Do not allow digital and analog signals to cross planes, otherwise digital noise may be induced into the analog signals and severely reduce audio performance. The CS4205 is placed at the transition point of the analog and digital ground planes. The CS4205 pins are partitioned into analog and digital areas. This is Table 3. JP8 and JP3 Positions for Each Clock Mode The CS4205 requires both digital +3.3 V and analog +5 V supply. The digital power is supplied from the CNR connector. A Motorola MC78M05C regulates the +12 V supply from the CNR bus down to a clean +5 V analog supply. This +5 V linear regulator is used to maintain good audio quality. 5 CRD4205-1 done to make board layout easier. The digital and analog grounds are tied together by a wide trace, over 50 mils or 0.050 inches, at a single point underneath the CS4205 in order to provide a common ground reference. Delta-sigma converters are highly susceptible to noise on the crystal pins. The area around the crystal oscillator and the two XTAL signals is filled with copper on the top and bottom sides and attached to digital ground. This ground plane serves to keep noise from coupling onto these pins. A separate chassis ground provides a reference plane for all of the EMC components. The chassis ground plane is connected to the analog ground plane at the external jacks. The capacitors on REFFLT, AFLT1, AFLT2, AFLT3, and the power supply are placed close to the CS4205 pins for best audio performance. 4. REFERENCES 1) Intel, Audio Codec ‘97 Component Specification, Revision 2.1, May 22, 1998. developer.intel.com/pc-supp /platform/ac97/ 2) Communication and Network Riser Specification revision 1.0, Feb 7, 2000 http://developer.intel.com/technology/cnr/. 3) Steve Harris, Clif Sanchez, Personal Computer Audio Quality Measurements, Ver 1.0 www.cirrus.com/products/papers/meas/meas.htm 4) Cirrus Logic, CS4205 Data Sheet 5. ADDENDUM • • Schematic drawings Layout drawings 6 LINE_IN_L LINE_IN_R CD_IN_L CD_IN_R CD_COM VIDEO_IN_L VIDEO_IN_R AUX_IN_L AUX_IN_R MIC_IN PHONE_IN MONO_OUT PC_BEEP LINE_IN_L LINE_IN_R CD_IN_L CD_IN_R CD_COM VIDEO_L VIDEO_R AUX_IN_L AUX_IN_R MIC1 SEC_DN# PRIM_DN# PHONE_IN MONO_OUT PC_BEEP ABITCLK ASYNC ASDOUT ASDIN SPDIF/SDATA_2 LINE_OUT_L LINE_OUT_R VREF LINE_OUT_L LINE_OUT_R VREF DSSDI3 DSSDI2 DSSDI1 Front Channel Outputs ARST# SDATA_1 SCLK LRCLK SDATA_1 SCLK LRCLK Analog Inputs CS4205 Audio Codec SPDIF/SDATA_2 ABITCLK DSSDI3 DSSDI2 DSSDI1 ABITCLK ASYNC ASDOUT ASDIN SEC_DN# PRIM_DN# ARST# Dock Interface/Surround Outputs CNR Connector SPDIF/SDATA_2 S/PDIF Optical Output CRD4205-1 Figure 1. Block Diagram 7 LINE_OUT_R LINE_OUT_L MONO_OUT 1 8 4 8 +3.3VD +5VA +3.3VD +5VA 25 38 U1 CS4205 26 42 4 7 AVdd1 AVdd2 DVdd1 DVdd2 PC_BEEP PHONE AUX_L AUX_R VIDEO_L VIDEO_R CD_L CD_GND CD_R MIC1 MIC2 LINE_IN_L LINE_IN_R AVss1 AVss2 DVss1 DVss2 BIT_CLK SDATA_OUT SDATA_IN SYNC RESET# LINE_OUT_L LINE_OUT_R MONO_OUT ID0# ID1# ZLRCLK C1 0.1uF X7R C2 0.1uF X7R C3 0.1uF X7R C4 0.1uF X7R 1 9 12 AGND DGND R1 R2 0 0 6 5 8 10 11 35 36 37 45 46 32 33 34 48 47 41 40 39 44 43 PC_BEEP DGND AGND PHONE_IN AUX_IN_L AUX_IN_R VIDEO_L VIDEO_R CD_IN_L C13 1000pF NPO CD_COM CD_IN_R MIC1 LINE_IN_L LINE_IN_R AGND VREF 13 14 15 16 17 18 19 20 21 22 23 24 28 27 29 30 31 AC-Link ABITCLK ASDOUT ASDIN ASYNC ARST# LINE_OUT_L LINE_OUT_R MONO_OUT PRIM_DN# SEC_DN# Analog C11 1000pF NPO C12 1000pF NPO 1 2 3 4 JP5 ZV Port Pin 1 can provide a DGND on the back side over to DGND test pin. SPDIF/SDATA_2 SCLK DSSDI3 DSSDI2 DSSDI1 SDATA_1 LRCLK Vrefout REFFLT AFLT1 AFLT2 AFLT3 ZV Port ZSDATA ZSCLK SPDO/SDO2 EAPD/SCLK GPIO4/SDI3 GPIO3/SDI2 GPIO2/SDI1 GPIO1/SDOUT GPIO0/LRCLK 4X1CON GPIO, C5 2.2uF Y5V C6 0.1uF X7R C7 1000pF NPO C8 1000pF NPO C10 1000pF NPO 3 2 Serial XTL_OUT XTL_IN Y1 AGND For Crystal operation: populate C15=22 pF For Oscillator operation: populate Y3 = 14.318 MHz, C68= 0.022 uF, R51= 2.2 k ohms, R52 = 100 ohms, C15=220 pF and remove C14, and Y1 +3.3VD R51 NO POP 2.2k 24.576MHz Y2 NOTE: Populated only one of Y1, Y2, or Y3. J13 10 8 6 4 2 9 7 5 3 1 GPIOs 4 3 2 1 0 C68 NO POP 0.022uF C15 22pF NPO 24.576MHz NO POP C14 22pF NPO 5x2 CON DGND DGND DGND Y3 NO POP R52 5 DGND NO POP osc. 100 14.318MHz CRD4205-1 DGND Figure 2. CS4205 Audio Codec CD IN L1 J2 4 3 2 1 LINE IN R3 AGND 0 C16 2.2uF ELEC + CD_IN_R J1 4 3 5 2 1 R4 AGND 6.8K C17 2.2uF ELEC + 31@100MHz R5 270K [No Pop] LINE_IN_R R6 6.8K L2 AGND 4X1HDR-AU 31@100MHz R7 0 C18 4.7uF ELEC + CD_COM PHONO-1/8 R9 270K [No Pop] Connect CGND to AGND at the jack C22 2.2uF ELEC CD_IN_L + AGND CGND C19 100pF NPO C20 100pF NPO R8 AGND 6.8K C21 2.2uF ELEC + LINE_IN_L R10 6.8K L3 AGND R11 0 31@100MHz R12 270K [No Pop] VIDEO IN L4 J4 4 3 2 1 MIC IN R13 AGND 6.8K C23 2.2uF ELEC + J3 4 +5VA R14 2.2K R15 1.5K VIDEO_IN_R 5 2 1 31@100MHz R16 6.8K R17 100 C24 0.1uF X7R MIC_IN L5 AGND 4X1HDR-AU 31@100MHz R18 6.8K C25 2.2uF ELEC VIDEO_IN_L + PHONO-1/8 Connect CGND to AGND at the jack C26 100pF NPO C27 100pF NPO + C28 10uF ELEC C29 0.1uF X7R R19 6.8K -3 dB corners at 60 Hz and 16 kHz (Ri = 28 kOhm) AGND AGND CGND AGND AGND AUX IN L6 J5 AGND 4 3 2 1 PC BEEP IN J6 R20 6.8K C30 2.2uF ELEC + L7 AUX_IN_R 2 1 R21 47K X7R C31 0.1uF PC_BEEP 31@100MHz R22 6.8K 2X1HDR-SN/PB 31@100MHz R23 4.7K C32 2700pF X7R L8 AGND 4X1HDR-AU 31@100MHz R24 6.8K C33 2.2uF ELEC AUX_IN_L DGND AGND AGND + -3 dB corners at 60 Hz and 13.8 kHz (Ri >= 28 kOhm) R25 6.8K AGND MODEM AUDIO L9 J7 4 3 2 1 R26 AGND 6.8K C34 2.2uF ELEC + PHONE_IN 31@100MHz R27 6.8K CRD4205-1 L10 4X1HDR-AU R28 0 C35 2.2uF ELEC + MONO_OUT AGND 31@100MHz R29 47K Figure 3. Analog Inputs AGND 9 SDATA_1 SCLK LRCLK ABITCLK 1A1 1A2 1A3 1A4 2A1 2A2 2A3 2A4 1OE 2OE 1Y1 1Y2 1Y3 1Y4 2Y1 2Y2 2Y3 2Y4 SDATA DEM#/SCLK LRCK MCLK AOUTL VA+ AGND AOUTR C36 1 + SPDIF/SDATA_2 11 13 15 17 9 7 5 3 + SDATA2 n.c. (reserved) 7x2 CON To Docking Station SDATA DEM#/SCLK LRCK MCLK AOUTL VA+ AGND AOUTR C43 NO POP 1 2 ELEC + R40 NO POP 1 + 10 NOT SUPPORTED +5VA SURROUND JACK U7 2 4 6 8 18 16 14 12 1 2 3 4 U2 NO POP 8 7 6 5 J8 C37 1 NO POP 2 ELEC NO POP 2 ELEC R31 1 NO POP 2 NO POP 2 1 2 R30 1 4 1 1 1 1 C38 NO POP X7R +5VA R32 NO POP 2 2 C39 NO POP X7R NO POP 1 1 +5VD DGND 1 19 20 R33 NO POP R34 NO POP 2 2 R35 NO POP Connect CGND to AGND at the jack 2 2 1 1 1 VCC GND 10 + C40 ELEC NO POP C41 NO POP X7R C42 NO POP X7R AGND AGND AGND AGND AGND 74HC244 2 2 2 DGND J14 14 12 10 8 6 4 2 13 11 9 7 5 3 1 /OBE DSMCK DSLRCK DSSCK SDATA1 CNT/LFE JACK U3 1 2 3 4 DSSDI1 DSSDI3 DSSDI2 NO POP 8 7 6 5 J9 C44 1 NO POP 2 ELEC R37 1 R36 1 NO POP 2 NO POP 2 1 2 4 DGND R38 NO POP AGND 2 2 R41 NO POP C45 NO POP X7R AGND 1 1 1 NO POP C46 NO POP X7R 1 1 R39 NO POP Connect CGND to AGND at the jack 2 2 AGND 2 2 AGND AGND CRD4205-1 Figure 4. Docking Interface R42 33K LINE OUT JACK C47 22pF NPO +5VA C49 3 C48 10uF ELEC 10uF ELEC 2 1 4 J10 R43 LINE_OUT_R 27K 2 + - U4A 1 MC34072D +5VA AGND 33K + + PHONO-1/8 Vcc R44 220K C52 R45 220K C50 100pF NPO C51 100pF NPO Connect CGND to AGND at the jack R46 VREF C53 22pF NPO +5VA 0.1uF X7R 5 R47 LINE_OUT_L 27K 6 + - U4B 7 MC34072D Vee AGND AGND AGND AGND AGND CRD4205-1 Figure 5. Analog Outputs 11 12 SPDIF/SDATA_2 J12 5 +5VD 4 3 DGND C59 0.1uF X7R 2 R50 1 8.2K 2 2 1 6 DGND Figure 6. S/PDIF Optical Outputs 1 TOTX-173 DGND CRD4205-1 +3.3VD P1 B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 B11 B12 B13 B14 B15 reserved reserved reserved GND reserved reserved GND LAN_TXD1 LAN_RSTSYNC GND LAN_RXD2 LAN_RXD0 GND reserved +5Vdual USB_OC# GND -12V +3.3VD reserved reserved GND reserved reserved GND LAN_TXD2 LAN_TXD0 GND LAN_CLK LAN_RXD1 reserved USB+ GND USB+12V GND +3.3Vdual +5VD A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 U5 SMB_A0 SMB_A1 SMB_A2 1 2 3 4 A0 A1 A2 Vss Vcc WP SCL SDA 8 7 6 5 SMB_SCL SMB_SDA C60 0.1uF X7R AT24C02 DGND DGND JP1 3x1HDR +12VD +12V +3.3Vdual DGND +5VD 1 2 3 ARESET# ARST# +3.3VD B16 B17 B18 B19 +3.3Vdual 3 2 1 JP2 3x1HDR B20 B21 B22 B23 B24 B25 B26 B27 B28 GND EE_DOUT EE_SHCLK GND SMB_A0 SMB_SCL PRIMARY_DN# GND AC97_SYNC AC97_SDATA_OUT AC97_BITCLK GND EE_DIN EE_CS SMB_A1 SMB_A2 SMB_SDA AC97_RESET# reserved AC97_SDATA_IN1 AC97_SDATA_IN0 GND A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 1 2 3 JP3 3x1HDR 1 +3.3VD PR_DN# 2 3 SMB_A0 SMB_SCL PR_DN# SMB_A1 SMB_A2 SMB_SDA ARESET# ASDIN1 ASDIN0 ASDIN JP8 3x1HDR PRIM_DN# R53 1k 2 1 DGND 1 2 3 ASYNC ASDOUT ABITCLK B29 B30 SEC_DN# JP9 2x1HDR CNR Connector JP4 3x1HDR DGND DGND +5VD JP8 JP3 id Osc? PLL 1-2 1-2 0 Osc. no Frequency Mode 24.576 MHz Primary DGND 1-2 2-3 0 Osc. yes 14.318 MHz Primary 2-3 1-2 0 Osc. yes 27.000 MHz Primary C63 0.1uF X7R +12VD U6 1 3 + C64 10uF ELEC 2-3 2-3 0 Osc yes 48.000 MHz Primary 24.576 MHz Primary 12.288 MHz Secondary 12.288 MHz Secondary 12.288 MHz Secondary 1-2* 1-2* 0 Xtal no 1-2 2-3 1 BCLK no 2-3 1-2 2 BCLK no 2-3 2-3 3 BCLK no +5VA +3.3VD IN GND OUT DGND C61 0.1uF X7R + C62 10uF ELEC * Indicates Default Jumper Setting C65 0.1uF X7R + C66 10uF ELEC MC78M05C + C67 10uF ELEC 2 DGND CRD4205-1 AGND Connect AGND to DGND with a 50 mil trace near the regulator. Connect CGND to DGND with a 50 mil trace near the finger edge of the board. Figure 7. CNR Connector 13 CRD4205-1 Figure 8. Assembly Drawing 14 CRD4205-1 Figure 9. Top Silkscreen 15 CRD4205-1 Figure 10. Top Layer 16 CRD4205-1 Figure 11. Ground Layer 17 CRD4205-1 Figure 12. Vcc Layer 18 CRD4205-1 Figure 13. Bottom Layer 19 CRD4205-1 Figure 14. Bottom Silkscreen 20 CRD4205-1 Figure 15. Drill Drawing 21 22 6. BILL OF MATERIALS Item Quantity Reference 1 14 C1,C2,C3,C4,C6,C24,C29, C31,C52,C59,C60,C61,C63, C65 2 1 C5 3 6 C7,C8,C10,C11,C12,C13 4 4 C14,C15,C47,C53 5 10 C16,C17,C21,C22,C23,C25, C30,C33,C34,C35 6 1 C18 7 6 C19,C20,C26,C27,C50,C51 8 7 C28,C48,C49,C62,C64,C66, C67 9 1 C32 10 5 C36,C37,C40,C43,C44 11 6 C38,C39,C42,C45,C46,C68 12 1 C41 13 5 JP1,JP2,JP3,JP4,JP8 14 1 JP5 15 1 JP9 16 1 J1 17 4 J2,J4,J5,J7 18 1 J3 19 1 J6 20 1 J8 21 1 J9 22 1 J10 23 1 J12 24 1 J13 25 1 J14 26 10 L1,L2,L3,L4,L5,L6,L7,L8,L9, L10 27 1 P1 28 6 R1,R2,R3,R7,R11,R28 29 14 R4,R6,R8,R10,R13,R16,R18, R19,R20,R22,R24,R25,R26, R27 30 3 R5,R9,R12 31 1 R14 32 1 R15 33 1 R17 34 2 R29,R21 35 1 R23 Manufacturer KEMET Part Number C0805C104K5RAC Description CAP, 0805, X7R, .1uF, 10%, 50V KEMET KEMET KEMET PANASONIC PANASONIC KEMET PANASONIC KEMET NO POP NO POP KEMET SAMTEC SAMTEC SAMTEC LZR ELECTRONICS MOLEX LZR ELECTRONICS MOLEX NO POP NO POP LZR ELECTRONICS TOSHIBA MOLEX AMP TDK NONE PHILIPS PHILIPS C1206C225M8VAC C0805C102K5GAC C0805C220K5GAC ECE-V1VS2R2SR ECE-V1ES4R7SR C0805C101J5GAC ECE-V1CA100R C0805C272K5RAC NO POP NO POP NO POP TSW-103-07-T-S TSW-104-07-G-S TSW-102-07-T-S SJ372 70553-0003 SJ374 70553-0036 NO POP NO POP SJ373 TOTX173 10-89-1101 103309-2 HF50ACB321611-T NONE 9C08052A0R00J 9C08052A6801F CAP, 1206, Y5V, 2.2uF, 20%, 10V CAP, 0805, C0G, 1000pF, 10%, 50V CAP, 0805, C0G, 22pF, 10%, 50V CAP, SMT A, ELEC, 2.2uF, 20%, 35V CAP, SMT A, ELEC, 4.7uF, 20%, 25V CAP, 0805, COG, 100pF, 5%, 50V CAP, SMT B, ELEC, 10uF, 20%, 16V CAP, 0805, X7R, 2700pF, 10%, 50V NO POP NO POP NO POP HDR, 3x1, 0.025" PIN, 0.1" CTR HDR, 4x1, 0.025" PIN, 0.1" CTR HDR, 2x1, 0.025" PIN, 0.1" CTR CONN, 3.5MM DOUBLE SW. STEREO PHONE JACK HDR, 4X1, 0.025" PIN, 0.1" CTR, 15u" AU CONN, 3.5MM DOUBLE SW. STEREO PHONE JACK HDR, 2X1, 0.025" PIN, 0.1" CTR, 150u" SN/PB NO POP NO POP CONN, 1/8" NON-SW. STEREO PHONE JACK CONN, OPTICAL TOSLINK TRANSMITTER CONN, 5x2 HEADER, MALE, STRAIGHT CONN, 7x2 RIBBON, MALE, STRAIGHT, SHROUDED IND, FBEAD, 1206, 31@100MHz, 25% CNR BUS CONNECTOR RES, SO, 0805, 0, 5%, 1/10W, METAL FILM RES, SO, 0805, 6.8K, 1%, 1/10W, METAL FILM CRD4205-1 PHILIPS PHILIPS PHILIPS PHILIPS PHILIPS PHILIPS 9C08052A2703J 9C08052A2201J 9C08052A1501J 9C08052A1000J 9C08052A4702J 9C08052A4701J RES, SO, 0805, 270K, 5%, 1/10W, METAL FILM RES, SO, 0805, 2.2K, 5%, 1/10W, METAL FILM RES, SO, 0805, 1.5K, 5%, 1/10W, METAL FILM RES, SO, 0805, 100, 5%, 1/10W, METAL FILM RES, SO, 0805, 47K, 5%, 1/10W, METAL FILM RES, SO, 0805, 4.7K, 5%, 1/10W, METAL FILM 36 14 37 38 39 40 41 42 43 44 45 46 47 48 49 50 2 2 2 1 1 1 2 1 1 1 1 1 1 1 R30,R31,R32,R33,R34,R35, R36,R37,R38,R39,R40,R41, R51,R52 R42,R46 R43,R47 R45,R44 R50 R53 U1 U2,U3 U4 U5 U6 U7 Y1 Y2 Y3 NO POP NO POP NO POP PHILIPS PHILIPS PHILIPS PHILIPS PHILIPS CIRRUS LOGIC NO POP MOTOROLA ATMEL MOTOROLA MC74HC244DAW FOX NO POP NO POP 9C08052A3302F 9C08052A2702F 9C08052A2203J 9C08052A8201J 9C08052A1001J CS4205-KQ NO POP MC34072D AT24C02N-10SC-2.7 MC78M05CDT MOTOROLA FS24.576 NO POP NO POP RES, SO, 0805, 33K, 1%, 1/10W, METAL FILM RES, SO, 0805, 27K, 1%, 1/10W, METAL FILM RES, SO, 0805, 220K, 5%, 1/10W, METAL FILM RES, SO, 0805, 8.2K, 5%, 1/10W, METAL FILM RES, SO, 0805, 1k, 5%, 1/10W, METAL FILM IC, TQFP, AC ’97 2.1 SERIAL CODEC NO POP IC, SO, SOIC8, 34072, SINGLE SUPPLY DUAL OP AMP IC, SO, SOIC8, SERIAL EEPROM, 256 x 8, 2.7V IC, SO, +5V REGULATOR, DPAK, 4%, 500mA IC,74HC244, HCTTL, S020 XTAL, 24.576MHz, HC49S, Fund Mode, Par Res NO POP NO POP CRD4205-1 23