CS3003 Precision Low-voltage Amplifier
Features & Description
Low Offset:
– 10 µV Max.
Description
The CS3003 single amplifier is designed for precision amplification of low-level signals. This amplifier achieves excellent offset stability, high open loop gain, and low noise. The devices also exhibit excellent CMRR and PSRR. The common mode input range includes the supply rails. The amplifier operates with any supply voltage from 2.7 V to 5 V (±1.35 V to ±2.50 V).
Low Drift:
– 0.05 µV/°C Max.
Low Noise:
– 17 nV/√Hz
Open-loop Voltage Gain:
– 150 dB Typ.
Rail-to-Rail Inputs Rail-to-Rail Output Swing
– to within 10 mV of supply voltage
Pin Configurations
1.0 mA Supply Current Slew rate:
– 0.25 V/µs
NC
1
CS3003
(Top View)
1
Exposed Thermal2 Die Pad
1 2 3 4 8
Exposed Thermal 2 Die Pad
1 2 3 4 +
8 NC 7 V+
NC1 -IN +IN V-
NC1 V+ Output NC1
Applications
Thermocouple/Thermopile Amplifiers Load Cell and Bridge Transducer Amplifiers Precision Instrumentation Battery-powered Systems
-IN +IN V-
– +
7 6 5
6 Output 5 NC
1
8-Lead SOIC
1. Must not be connected. 2. Connect thermal die pad to V-.
QFN-8
1000
200 150 100
100
50 0
10
-50 -100 -150
1 0.01
-200
0.1
1
10
0
1
2
3
4
5
6
7
8
9
10
Frequency (Hz)
Time (sec)
Noise vs. Frequency (Measured)
0.01 Hz to 10 Hz Noise Performance
Cirrus Logic, Inc. http://www.cirrus.com
Copyright © Cirrus Logic, Inc. 2007 (All Rights Reserved)
AUG ‘07 DS735F1
CS3003
TABLE OF CONTENTS
1. CHARACTERISTICS AND SPECIFICATIONS ............................................. 3 1.1 5 V Electrical Characteristics ................................................................... 3 1.2 3 V Electrical Characteristics ................................................................... 4 1.3 Absolute Maximum Ratings ..................................................................... 5 2. TYPICAL PERFORMANCE PLOTS .............................................................. 5 3. PACKAGE DRAWINGS ................................................................................. 6 4. ORDERING INFORMATION .......................................................................... 8 5. ENVIRONMENTAL, MANUFACTURING, & HANDLING INFORMATION ... 8 6. REVISION HISTORY .................................................................................... 8
LIST OF FIGURES
Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. Figure 8. Noise vs Frequency (Measured) .................................................................................5 0.01 Hz to 10 Hz Noise ...............................................................................................5 Gain & Phase vs. Frequency (2.7 V) ...........................................................................5 Gain & Phase vs. Frequency (5 V) ..............................................................................5 Supply Current vs. Supply Voltage ..............................................................................5 Supply Current vs. Temperature .................................................................................5 Voltage Swing vs. Output Current (2.7 V) ...................................................................6 Voltage Swing vs. Output Current (5 V) ......................................................................6
Contacting Cirrus Logic Support
For all product questions and inquiries contact a Cirrus Logic Sales Representative. To find one nearest you go to http://www.cirrus.com
IMPORTANT NOTICE Cirrus Logic, Inc. and its subsidiaries ("Cirrus") believe that the information contained in this document is accurate and reliable. However, the information is subject to change without notice and is provided "AS IS" without warranty of any kind (express or implied). Customers are advised to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgment, including those pertaining to warranty, indemnification, and limitation of liability. No responsibility is assumed by Cirrus for the use of this information, including use of this information as the basis for manufacture or sale of any items, or for infringement of patents or other rights of third parties. This document is the property of Cirrus and by furnishing this information, Cirrus grants no license, express or implied under any patents, mask work rights, copyrights, trademarks, trade secrets or other intellectual property rights. Cirrus owns the copyrights associated with the information contained herein and gives consent for copies to be made of the information only for use within your organization with respect to Cirrus integrated circuits or other products of Cirrus. This consent does not extend to other copying such as copying for general distribution, advertising or promotional purposes, or for creating any work for resale. CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE ("CRITICAL APPLICATIONS"). CIRRUS PRODUCTS ARE NOT DESIGNED, AUTHORIZED OR WARRANTED FOR USE IN AIRCRAFT SYSTEMS, MILITARY APPLICATIONS, PRODUCTS SURGICALLY IMPLANTED INTO THE BODY, AUTOMOTIVE SAFETY OR SECURITY DEVICES, LIFE SUPPORT PRODUCTS OR OTHER CRITICAL APPLICATIONS. INCLUSION OF CIRRUS PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO BE FULLY AT THE CUSTOMER'S RISK AND CIRRUS DISCLAIMS AND MAKES NO WARRANTY, EXPRESS, STATUTORY OR IMPLIED, INCLUDING THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR PARTICULAR PURPOSE, WITH REGARD TO ANY CIRRUS PRODUCT THAT IS USED IN SUCH A MANNER. IF THE CUSTOMER OR CUSTOMER'S CUSTOMER USES OR PERMITS THE USE OF CIRRUS PRODUCTS IN CRITICAL APPLICATIONS, CUSTOMER AGREES, BY SUCH USE, TO FULLY INDEMNIFY CIRRUS, ITS OFFICERS, DIRECTORS, EMPLOYEES, DISTRIBUTORS AND OTHER AGENTS FROM ANY AND ALL LIABILITY, INCLUDING ATTORNEYS' FEES AND COSTS, THAT MAY RESULT FROM OR ARISE IN CONNECTION WITH THESE USES. Cirrus Logic, Cirrus, and the Cirrus Logic logo designs are trademarks of Cirrus Logic, Inc. All other brand and product names in this document may be trademarks or service marks of their respective owners.
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DS735F1
CS3003
1. CHARACTERISTICS AND SPECIFICATIONS
1.1 5 V Electrical Characteristics
Parameter Input Offset Voltage Average Input Offset Drift Input Bias Current • Input Offset Current • Input Noise Voltage Density Input Noise Voltage Input Noise Current Density Input Noise Current Input Voltage Range Common Mode Rejection Ratio (dc) Power Supply Rejection Ratio Large Signal Voltage Gain (Note 3) Output Voltage Swing Slew Rate Overload Recovery Time Supply Current Chopping Frequency Input Capacitance Differential Common Mode • RL = 2 kΩ to V+/2 RS = 100 Ω, f0 = 1 Hz RS = 100 Ω, f0 = 1 kHz 0.1 to 10 Hz f0 = 1 Hz 0.1 to 10 Hz (Note 2) • • • • • (Note 2) (Note 2) • • Min V110 110 120 (V+ – 100) (V+ – 10) Typ ±2 ±0.01 ±170 ±340 17 17 350 100 1.9 120 130 150 150 0.25 25 1.0 150 1.5 10 V+ (V- + 100 ) (V- + 10) TBD Max ±10 ±0.05 ±250 ±1.5 ±500 ±3.0 Unit µV µV/ºC pA nA pA nA
nV/ Hz nV/ Hz
V+ = +5 V, ±5%; V- = 0V; VCM = 2.5 V; Unless otherwise noted, TA = 25º C (See Note 1).
nVp-p
fA/ Hz
-
pAp-p V dB dB dB dB mV mV V/µs µs mA kHz pF pF
RL = 2 kΩ to V+/2 (Note 4) RL = 100 kΩ to V+/2 RL = 2 k, 100 pF
Notes: 1. Symbol “•” denotes specification applies over -40 to +125 ° C. 2. This parameter is guaranteed by design and/or laboratory characterization. 3. Guaranteed within the output limits of (V+ – 0.2 V) to (V- + 0.2 V). 4. Specifies the worst case drive voltage relative to the supply rail under stated load conditions.
DS735F1
3
CS3003
1.2 3 V Electrical Characteristics
Parameter Input Offset Voltage Average Input Offset Drift Input Bias Current • Input Offset Current • Input Noise Voltage Density Input Noise Voltage Input Noise Current Density Input Noise Current Input Voltage Range Common Mode Rejection Ratio (DC) Power Supply Rejection Ratio Large Signal Voltage Gain (Note 7) Output Voltage Swing Slew Rate Overload Recovery Time Supply Current Chopping Frequency Input Capacitance Differential Common Mode • RL = 2 kΩ to V+/2 RS = 100 Ω, f0 = 1 Hz RS = 100 Ω, f0 = 1 kHz 0.1 to 10 Hz f0 = 1 Hz 0.1 to 10 Hz (Note 6) • • • • • (Note 6) (Note 6) • • Min V110 110 120 (V+ – 100) (V+ – 10) Typ ±2 ±0.01 ±110 ±220 17 17 350 100 1.9 120 130 160 150 0.25 25 2.0 150 1.5 10 V+ (V- + 100 ) (V- + 10) 2.5 Max ±10 ±0.05 ±150 ±1.0 ±300 ±2.0 Unit µV µV/ºC pA nA pA nA
nV/ Hz nV/ Hz
V+ = +3 V, ±10%; V- = 0V; VCM = 1.5 V; Unless otherwise noted, TA = 25º C (See Note 5).
nVp-p
fA/ Hz
-
pAp-p V dB dB dB dB mV mV V/µs µs mA kHz pF pF
RL = 2 kΩ to V+/2 (Note 8) RL = 100 kΩ to V+/2 RL = 2 k, 100 pF
Notes: 5. Symbol “•” denotes specification applies over -40 to +125 ° C. 6. This parameter is guaranteed by design and/or laboratory characterization. 7. Guaranteed within the output limits of (V+ – 0.2 V) to (V- + 0.2 V). 8. Specifies the worst case drive voltage relative to the supply rail under stated load conditions.
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DS735F1
CS3003
1.3 Absolute Maximum Ratings
Parameter Supply Voltage Input Voltage Storage Temperature Range [(V+) – (V-)] Min 2.7 (V-) – 0.3 -65 Typ Max 5.5 (V+) + 0.3 +150 Unit V V ºC
2. TYPICAL PERFORMANCE PLOTS
1000
200 150 100
100
50 0
10
-50 -100 -150
1 0.01
0.1
1
10
-200
0 1 2 3 4 5 6 7 8 9 10
Frequency (Hz)
Time (sec)
Figure 1. Noise vs Frequency (Measured)
Figure 2. 0.01 Hz to 10 Hz Noise
180 160 140 120 100 80 60 40 20 0 -20 0.001 0.01
0.1
1
10
100
1k
10k 100k 1M
270 225 180 135 90 45 0 -45 -90 -135 -180 10M
180 160 140 120 100 80 60 40 20 0 -20 0.001 0.01
Phase (Deg.)
0
0.1
1
10
100
1k
10k 100k 1M
-45 -90 -135 -180 10M
Frequency (Hz)
Frequency (Hz)
Figure 3. Gain & Phase vs. Frequency (2.7 V)
Figure 4. Gain & Phase vs. Frequency (5 V)
1.2 1.15 1.1 1.05 1 0.95 0.9 0.85 0.8
1.25
Supply Current (mA)
Supply Current (mA)
5V
1.0
2.7V
0.75
2.5
3
3.5
4
4.5
5
5.5
6
0.5 -40
-15
10
35
60
85
110 125
Supply Voltage (V)
Temperature (°C)
Figure 5. Supply Current vs. Supply Voltage
Figure 6. Supply Current vs. Temperature
DS735F1
Phase (Deg.)
Gain (dB)
Gain (dB)
270 225 180 135 90 45
5
CS3003
Typical Performance Plots (Cont.)
V+ -50 -100 -150 -200
V+ -50 -100 -40°C -150 -200
+25°C
+125°C
+200 +150 +100 +50 V– 0 1 2 3 4 5
+200 +150 +100 +50 V– 0 1 2 3 -40°C
+25°C
+125°C
4
5
Output Current (mA)
Output Current (mA)
Figure 7. Voltage Swing vs. Output Current (2.7 V)
Figure 8. Voltage Swing vs. Output Current (5 V)
3. PACKAGE DRAWINGS 8L SOIC (150 MIL BODY) PACKAGE DRAWING
E
H
1 b c
D SEATING PLANE e A1
A L
∝
INCHES DIM A A1 B C D E e H L MIN 0.053 0.004 0.013 0.007 0.189 0.150 0.040 0.228 0.016 0° MAX 0.069 0.010 0.020 0.010 0.197 0.157 0.060 0.244 0.050 8° JEDEC # : MS-012 6
∝
MILLIMETERS MIN MAX 1.35 1.75 0.10 0.25 0.33 0.51 0.19 0.25 4.80 5.00 3.80 4.00 1.02 1.52 5.80 6.20 0.40 1.27 0° 8°
DS735F1
CS3003
8L QFN (4 mm X 4 mm) PACKAGE DRAWING
DS735F1
7
CS3003
4. ORDERING INFORMATION
Part # CS3003-FS CS3003-FSZ CS3003-FNZ* * Connect thermal die pad to V-. Temperature Range -40 °C to +125 °C -40 °C to +125 °C -40 °C to +125 °C Package Description 8-lead SOIC 8-lead SOIC, Lead Free 8-lead QFN, Lead Free
5. ENVIRONMENTAL, MANUFACTURING, & HANDLING INFORMATION
Model Number CS3003-FS CS3003-FSZ 260 °C CS3003-FNZ Peak Reflow Temp 240 °C 2 365 Days MSL Rating* Max Floor Life
* MSL (Moisture Sensitivity Level) as specified by IPC/JEDEC J-STD-020.
6. REVISION HISTORY
Revision A0 A1 F1 Date JAN 2007 FEB 2007 AUG 2007 Initial Release. Corrected diagram on p1. Updated to “Final” per QPL process. Changes
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DS735F1