CS3302A

CS3302A High-Z, Programmable Gain, Differential Amplifier Features & Description Signal Bandwidth: DC to 2 kHz Selectable Gain: x1, x2, x4, x8, x16, x32, x64 Differential Inputs, Differential Outputs • • • • Multiplexed inputs: INA, INB, 800Ω termination Rough / fine charge outputs for CS5371A / 72A / 73A Max signal amplitude: 5 Vpp differential Ultra-low input bias: < 1 pA Description The CS3302A is a high input-impedance, differential input, differential output amplifier with programmable gain, optimized for amplifying signals from high-impedance sensors such as hydrophones. The gain settings are binary weighted (x1, x2, x4, x8, x16, x32, x64) and are selected using simple pin settings. Two sets of external inputs, INA and INB, simplify system design as inputs from a sensor and test DAC. An internal 800Ω termination can also be selected for noise tests. Amplifier input impedance is very high, requiring less than 1 pA of input current. Noise performance is very good at 1 µVp-p between 0.1 Hz and 10 Hz, and a noise density of 8.5 nV/ √Hz over the 200 Hz to 2 kHz bandwidth. Distortion performance is also extremely good, typically -118 dB THD. Low input current, low noise, and low total harmonic distortion make this amplifier ideal for high-impedance differential sensors requiring maximum dynamic range. ORDERING INFORMATION See page 15. Excellent Noise Performance • 1 µVp-p between 0.1 Hz and 10 Hz • 8.5 nV/ √Hz from 200 Hz to 2 kHz Low Total Harmonic Distortion • -118 dB THD typical (0.000126%) • -112 dB THD maximum (0.000251%) Low Power Consumption • Normal operation: 5 mA • Power down: 10 µA Dual Power Supply Configuration • VA+ = +2.5 V; VA- = -2.5 V; VD = +3.3 V VA+ INA+ INB+ 400 Ω GUARD VD + - OUTR+ OUTF+ MUX0 MUX1 400 Ω GAIN0 GAIN1 GAIN2 + INAINBVA- OUTFOUTR- PWDN GND Preliminary Product Information http://www.cirrus.com This document contains information for a new product. Cirrus Logic reserves the right to modify this product without notice. Copyright © Cirrus Logic, Inc. 2007 (All Rights Reserved) NOV '07 DS765PP1 CS3302A DS765PP1 TABLE OF CONTENTS CS3302A 1. CHARACTERISTICS AND SPECIFICATIONS ....................................................................... 4 SPECIFIED OPERATING CONDITIONS ................................................................................ 4 ABSOLUTE MAXIMUM RATINGS .......................................................................................... 4 THERMAL CHARACTERISTICS ............................................................................................. 5 ANALOG CHARACTERISTICS ............................................................................................... 5 DIGITAL CHARACTERISTICS ................................................................................................ 8 POWER SUPPLY CHARACTERISTICS ................................................................................. 9 2. GENERAL DESCRIPTION..................................................................................................... 10 2.1. Analog Signals .............................................................................................................. 10 2.2.1.Analog Inputs ....................................................................................................... 10 2.3.2.Analog Outputs .................................................................................................... 11 2.4.3.Differential Signals ............................................................................................... 11 2.5.4.Guard Output ....................................................................................................... 11 2.6. Digital Signals ............................................................................................................... 12 2.7.1.Gain Selection...................................................................................................... 12 2.8.2.Mux Selection....................................................................................................... 12 2.9.3.Power Down Selection ......................................................................................... 12 2.10. Power Supplies ............................................................................................................. 12 2.11.1.Analog Power Supplies ...................................................................................... 12 2.12.2.Digital Power Supplies ....................................................................................... 12 2.13. Connection Diagram ..................................................................................................... 13 3. PIN DESCRIPTION ................................................................................................................ 14 4. ORDERING INFORMATION ................................................................................................. 15 5. ENVIRONMENTAL, MANUFACTURING, & HANDLING INFORMATION ........................... 15 6. PACKAGE DIMENSIONS ...................................................................................................... 16 LIST OF FIGURES Figure 1. CS3302A Noise Performance.......................................................................................... 5 Figure 2. Digital Input Rise and Fall Times ..................................................................................... 8 Figure 3. System Architecture....................................................................................................... 10 Figure 4. System Architecture....................................................................................................... 11 Figure 5. CS3302A Amplifier Connections.................................................................................... 13 Figure 6. CS3302A Pin Assignments............................................................................................ 14 LIST OF TABLES Table 1. Digital Selection for Gain and Input Mux Control ............................................................. 8 Table 2. Pin Descriptions ............................................................................................................. 14 2 DS765PP1 CS3302A DS765PP1 REVISION HISTORY Revision PP1 Date NOV 2007 Initial release. Changes CS3302A Contacting Cirrus Logic Support For all product questions and inquiries contact a Cirrus Logic Sales Representative. To find one nearest you go to www.cirrus.com IMPORTANT NOTICE "Preliminary" product information describes products that are in production, but for which full characterization data is not yet available. Cirrus Logic, Inc. and its subsidiaries (“Cirrus”) believe that the information contained in this document is accurate and reliable. However, the information is subject to change without notice and is provided “AS IS” without warranty of any kind (express or implied). Customers are advised to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgment, including those pertaining to warranty, indemnification, and limitation of liability. No responsibility is assumed by Cirrus for the use of this information, including use of this information as the basis for manufacture or sale of any items, or for infringement of patents or other rights of third parties. This document is the property of Cirrus and by furnishing this information, Cirrus grants no license, express or implied under any patents, mask work rights, copyrights, trademarks, trade secrets or other intellectual property rights. Cirrus owns the copyrights associated with the information contained herein and gives consent for copies to be made of the information only for use within your organization with respect to Cirrus integrated circuits or other products of Cirrus. This consent does not extend to other copying such as copying for general distribution, advertising or promotional purposes, or for creating any work for resale. CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL APPLICATIONS”). CIRRUS PRODUCTS ARE NOT DESIGNED, AUTHORIZED OR WARRANTED FOR USE IN AIRCRAFT SYSTEMS, MILITARY APPLICATIONS, PRODUCTS SURGICALLY IMPLANTED INTO THE BODY, AUTOMOTIVE SAFETY OR SECURITY DEVICES, LIFE SUPPORT PRODUCTS OR OTHER CRITICAL APPLICATIONS. INCLUSION OF CIRRUS PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO BE FULLY AT THE CUSTOMER'S RISK AND CIRRUS DISCLAIMS AND MAKES NO WARRANTY, EXPRESS, STATUTORY OR IMPLIED, INCLUDING THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR PARTICULAR PURPOSE, WITH REGARD TO ANY CIRRUS PRODUCT THAT IS USED IN SUCH A MANNER. IF THE CUSTOMER OR CUSTOMER'S CUSTOMER USES OR PERMITS THE USE OF CIRRUS PRODUCTS IN CRITICAL APPLICATIONS, CUSTOMER AGREES, BY SUCH USE, TO FULLY INDEMNIFY CIRRUS, ITS OFFICERS, DIRECTORS, EMPLOYEES, DISTRIBUTORS AND OTHER AGENTS FROM ANY AND ALL LIABILITY, INCLUDING ATTORNEYS' FEES AND COSTS, THAT MAY RESULT FROM OR ARISE IN CONNECTION WITH THESE USES. Cirrus Logic, Cirrus, and the Cirrus Logic logo designs are trademarks of Cirrus Logic, Inc. All other brand and product names in this document may be trademarks or service marks of their respective owners. DS765PP1 3 CS3302A DS765PP1 1. • • • • CS3302A CHARACTERISTICS AND SPECIFICATIONS Min/Max characteristics and specifications are guaranteed over the Specified Operating Conditions. Typical performance characteristics and specifications are derived from measurements taken at nominal supply voltages and TA = 25°C. GND = 0 V, all voltages with respect to 0 V. Device connected as shown in Figure 5 on page 12 unless otherwise noted. SPECIFIED OPERATING CONDITIONS Parameter Bipolar Power Supplies Positive Analog Negative Analog Positive Digital Thermal Ambient Operating Temperature Industrial (-IS, -ISZ) TA -40 25 85 °C +2% (Note 1) +2% (Note 2) +3% VA+ VAVD 2.45 -2.55 3.20 2.50 -2.50 3.30 2.55 -2.45 3.40 V V V Symbol Min Nom Max Unit Notes: 1. VA- must be the most negative voltage to avoid potential SCR latch-up conditions. 2. VD must conform to Digital Supply Differential under Absolute Maximum Ratings. ABSOLUTE MAXIMUM RATINGS CS3302A Parameter DC Power Supplies Positive Analog Negative Analog Digital [(VA+) - (VA-)] [(VD) - (VA-)] (Note 3) (Note 3) (Note 3) Symbol VA+ VAVD VADIFF VDDIFF IIN IPWR IOUT PD VINA VIND TSTG Min -0.3 -6.8 -0.3 (VA-)-0.5 -0.5 -65 Max 6.8 0.3 6.8 6.8 6.8 +10 +50 +25 500 (VA+)+0.5 (VD)+0.5 150 Unit V V V V V mA mA mA mW V V ºC Analog Supply Differential Digital Supply Differential Input Current, Power Supplies Output Current Power Dissipation Analog Input Voltages Digital Input Voltages Storage Temperature Range Input Current, Any Pin Except Supplies WARNING: Operation at or beyond these limits may result in permanent damage to the device. Normal operation is not guaranteed at these extremes. Notes: 3. Transient currents up to 100mA will not cause SCR latch-up. 4 DS765PP1 CS3302A DS765PP1 THERMAL CHARACTERISTICS CS3302A Parameter Storage Temperature Range Allowable Junction Temperature Junction to Ambient Thermal Impedance Ambient Operating Temperature ΘJA TA Symbol TSTR Min -65 - CS3302A Typ 65 - Max 150 125 - Unit ºC ºC ºC / W ºC -40 +85 ANALOG CHARACTERISTICS CS3302A Parameter Noise Performance Input Voltage Noise Input Voltage Noise Density Input Current Noise Density Distortion Performance Total Harmonic Distortion (Note 5) x1 x2 x4 x8 x16 x32 x64 x1 x2 x4 x8 x16 x32 x64 -118 -119 -119 -119 -118 -115 -112 0.0001259 0.0001122 0.0001122 0.0001122 0.0001259 0.0001778 0.0002512 -112 0.0002512 f0 = 0.1 Hz to 10 Hz f0 = 200 Hz to 2 kHz (Note 4) VNPP VND IND 1 8.5 20 3 12 µVpp nV/ Hz fA/ Hz Symbol Min Typ Max Unit THD dB Linearity (Note 5) LIN % Notes: 4. Guaranteed by design and/or characterization. 5. Tested with a 31.25 Hz sine wave at -1 dB amplitude. CS3302A In-Band Noise 20 CS3302A Wide Band Noise 300 250 15 200 Noise Density (nV/rtHz) Noise Density (nV/rtHz) 10 5 150 100 50 0 0.1 1 10 100 1000 10000 100000 1E+06 Frequency (Hz) 0 0 200 400 600 800 1000 1200 1400 1600 1800 2000 Frequency (Hz) Figure 1. CS3302A Noise Performance DS765PP1 5 CS3302A DS765PP1 ANALOG CHARACTERISTICS (CONT.) CS3302A Parameter Gain Gain, Differential Gain, Common Mode Gain Accuracy, Absolute Gain Accuracy, Relative (Note 8) (Note 6) (Note 7) x2 x4 x8 x16 x32 x64 (Note 4, 9) (Note 10) GAIN GAINCM GAINABS x1 -0.4 x1 ±1 -0.2 -0.2 -0.2 -0.2 -0.2 -0.2 5 +250 +1 100 1 x64 ±2 0 +750 Symbol Min Typ Max CS3302A Unit % LIN % Gain Drift Offset Offset Voltage, Input Referred Offset After Calibration, Absolute Offset Calibration Range Offset Voltage Drift GAINTC OFST ppm / ºC µV µV % F.S. µV / ºC (Note 11) OFSTCAL (Note 12) OFSTRNG (Note 4, 9) OFSTTC Notes: 6. Common mode signals pass unchanged through the differential amplifier architecture and are rejected by the CS5371A / 72A / 73A modulator CMRR. 7. Absolute gain accuracy tests the matching of x1 gain across multiple CS3302A devices. 8. Relative gain accuracy tests the tracking of x1,x2, x4,x16,x32,x64 gain relative to x1 gain on a single CS3302A device. 9. Specification is for the parameter over the specified temperature range and is for the CS3302A device only. It does not include the effects of external components. 10. Offset voltage is tested with the amplifier inputs connected to the internal 800Ω termination. 11. The absolute offset after calibration specification applies to the effective offset voltage of the CS3302A output when used with the CS5371A / 72A / 73A modulator and the CS5376A / 78 digital filter, and is measured from the digitally calibrated output codes of the CS5376A / 78. 12. The CS3302A offset calibration is performed digitally with the CS5371A / 72A / 73A modulator and CS5376A / 78 digital filter and includes the full scale signal range. Calibration offsets of greater than + 5% of full scale will begin to subtract from system dynamic range. 6 DS765PP1 CS3302A DS765PP1 ANALOG CHARACTERISTIC (Cont.) CS3302A Parameter Analog Input Characteristics Input Signal Frequencies Input Voltage Range (Signal + Vcm) Full Scale Input, Differential x1 x2 - x64 x1 x2 x4 x8 x16 x32 x64 BW VIN VINFS DC (VA-)+0.7 (VA-)+0.7 CS3302A Symbol Min Typ 1, 20 0.5, 40 1 -130 100 40 0.38 Vcm 500 40 - Max 2000 (VA+)-1.25 (VA+)-1.75 Unit Hz V Vp-p Vp-p Vp-p mVp-p mVp-p mVp-p mVp-p TΩ, pF TΩ, pF pA dB dB Vpp V Ω Ω/°C mA nF V Ω µA pF 90 (VA-)+0.5 5 2.5 1.25 625 312.5 156.25 78.125 40 5 (VA+)-0.5 Input Impedance, Differential Input Impedance, Common Mode Input Bias Current Crosstalk, Multiplexed Inputs Common to Differential Mode Rejection Analog Output Characteristics Full Scale Output, Differential Output Voltage Range (Signal + Vcm) Output Impedance Output Impedance Drift Output Current Load Capacitance Guard Output Characteristics Guard Output Voltage Guard Output Impedance Guard Output Current Guard Load Capacitance (Note 14) (Note 14) (Note 4) (Note 4, 13) ZINDIFF ZINCM IIN XT CDMR VOUT VRNG ZOUT ZTC IOUT CL VGUARD ZGOUT IGOUT CGL - +25 100 100 Notes: 13. Ratio of common mode input amplitude vs. differential mode output amplitude for a perfectly matched common mode input signal. Characterized with a 50 Hz, 500 mVpeak common mode sine wave applied to the analog inputs. 14. Output impedance characteristics are approximate and can vary up to +/- 30% depending on process parameters. DS765PP1 7 CS3302A DS765PP1 DIGITAL CHARACTERISTICS CS3302A Parameter Digital Characteristics High-level Input Drive Voltage Low-level Input Drive Voltage Input Leakage Current Digital Input Capacitance Rise Times Fall Times (Note 15) (Note 15) VIH VIL IIN CIN tRISE tFALL 0.6*VD 0.0 +1 9 VD 0.8 +10 100 100 Symbol Min Typ Max CS3302A Unit V V µA pF ns ns Notes: 15. Device is intended to be driven with CMOS logic levels. t rise t fall 0.9 * VD 0.1 * VD Figure 2. Digital Input Rise and Fall Times Input Selection 800 Ω termination INA only INB only INA + INB MUX1 0 1 0 1 MUX0 0 0 1 1 Gain Selection x1 x2 x4 x8 x16 x32 x64 Reserved GAIN2 0 0 0 0 1 1 1 1 GAIN1 0 0 1 1 0 0 1 1 GAIN0 0 1 0 1 0 1 0 1 Table 1. Digital Selection for Gain and Input Mux Control 8 DS765PP1 CS3302A DS765PP1 POWER SUPPLY CHARACTERISTICS CS3302A Parameter Power Supply Current, Normal Mode Analog Power Supply Current Digital Power Supply Current Power Supply Current, Power Down Mode Analog Power Supply Current, PWDN = 1 Digital Power Supply Current, PWDN = 1 Power Supply Rejection Power Supply Rejection Ratio (Note 4, 17) PSRR 95 120 (Note 16) (Note 16) IA ID 9 2 11 8 (Note 16) (Note 16) IA ID 5.0 0.1 5.75 0.2 Symbol Min Typ Max CS3302A Unit mA mA µA µA dB Notes: 16. All outputs unloaded. Analog inputs connected to the internal 800 Ω termination. Digital inputs forced to VD or GND respectively. 17. Power supply rejection characterized with a 50 Hz, 400 mVpp sine wave applied separately to each supply. DS765PP1 9 CS3302A DS765PP1 2. GENERAL DESCRIPTION CS3302A The CS3302A is a high-impedance, low-noise CMOS differential input, differential output amplifier for precision analog signals between DC and 2 kHz. It has multiplexed inputs, rough/fine charge outputs, and programmable gains of x1, x2, x4, x8, x16, x32, and x64. The performance of this amplifier makes it ideal for low-frequency, high-dynamic-range applications requiring low distortion and minimal power consumption. It is optimized for use in acquisition systems designed around the CS5371A/72A single/dual ∆Σ modulators and the CS5376A quad digital filter or the CS5373A ∆Σ modulator and CS5378 digital filter. Figure 3 shows the systemlevel architecture of a 4-channel acquisition system using four CS3302A, two CS5372A, one CS4373A, and one CS5376A. Figure 4 shows the system architecture of a single channel acquisition system using a CS3302A, CS5373A, and CS5378. 2.1 2.1.1 Analog Signals Analog Inputs The amplifier analog inputs are designed for highimpedance differential sensors. Input multiplexing simplifies system connections by providing separate inputs for a sensor and test DAC (INA, INB) as well as an internal termination for noise tests. The MUX0, MUX1 digital pins determine which multiplexed input is connected to the amplifier. 2.1.2 Analog Outputs The amplifier analog outputs are separated into rough charge / fine charge signals to easily connect to the CS5371A/72A/73A inputs. Each differential output Geophone or Hydrophone Sensor M U X CS3301A CS3302A AMP CS5371A CS5372A ∆Σ Modulator System Telemetry Geophone or Hydrophone Sensor M U X CS3301A CS3302A AMP CS5376A µ Controller or Configuration EEPROM Digital Filter Geophone or Hydrophone Sensor M U X CS3301A CS3302A AMP CS5371A CS5372A ∆Σ Modulator Communication Interface Geophone or Hydrophone Sensor M U X CS3301A CS3302A AMP CS4373A Switch Switch MUX MUX Test DAC Figure 3. System Architecture 10 DS765PP1 CS3302A DS765PP1 CS3302A CS5373A Differential Sensor CS3301A CS3302A M U X AMP ∆Σ Modulator CS5378 µController or Configuration EEPROM Digital Filter System Telemetry Test DAC Figure 4. System Architecture requires two series resistors and a differential capacitor to create the modulator anti-alias RC filter. 2.1.3 Differential Signals Analog signals into and out of the CS3302A are differential, consisting of two halves with equal but opposite magnitude varying about a common mode voltage. A full scale 5 Vpp differential signal centered on a -0.15 V common mode can have: SIG+ = -0.15 V + 1.25 V = 1.1 V SIG- = -0.15 V - 1.25 V = -1.4 V SIG+ is +2.5 V relative to SIGFor the reverse case: SIG+ = -0.15 V - 1.25 V = -1.4 V SIG- = -0.15 V + 1.25 V = 1.1 V SIG+ is -2.5 V relative to SIGThe total swing for SIG+ relative to SIG- is (+2.5 V) - (-2.5 V) = 5 Vpp. A similar calculation can be done for SIG- relative to SIG+. Note that a 5 Vpp differential signal centered on a -0.15 V common mode voltage never exceeds 1.1 V and never drops below -1.4 V on either half of the signal. By definition, differential voltages are to be measured with respect to the opposite half, not relative to ground. A multimeter differentially measuring between SIG+ and SIG- in the above example would properly read 1.767 Vrms, or 5 Vpp. 2.1.4 Guard Output The GUARD pin outputs the common mode voltage of the currently selected analog signal input. It can be used to drive the cable shield between a high-impedance sensor and the amplifier inputs. Driving the cable shield with the analog signal common mode voltage minimizes leakage and improves signal integrity from high-impedance sensors. The GUARD output is defined as the midpoint voltage between the + and - halves of the currently selected differential input signal, and will vary as the signal common mode varies. The GUARD output will not drive a significant load, it only provides a shielding voltage. 2.2 2.2.1 Digital Signals Gain Selection The CS3302A supports gain ranges of x1, x2, x4, x8, x16, x32, and x64. They are selected using the GAIN0, GAIN1, and GAIN2 pins as shown in Table 1 on page 8. 11 DS765PP1 CS3302A DS765PP1 2.2.2 Mux Selection CS3302A Power Supplies Analog Power Supplies 2.3 2.3.1 The analog inputs to the amplifier are multiplexed, with external signals applied to the INA+, INA- or INB+, INB- pins. An internal termination is also available for noise tests. Input mux selection is made using the MUX0 and MUX1 pins as shown in Table 1 on page 8. Although a mux selection is provided to enable the INA and INB switches simultaneously, significant current should not be driven through them in this mode. The CS3302A mux switches will maintain good linearity only with minimal signal current. 2.2.3 Power Down Selection The analog power pins of the CS3302A are to be supplied with a total of 5 V between VA+ and VA. This voltage is typically from a bipolar ±2.5 V supply. When using bipolar supplies the analog signal common mode voltage should be biased to 0 V. The analog power supplies are recommended to be bypassed to system ground using 0.1 µF X7R type capacitors. The VA- supply is connected to the CMOS substrate and as such must remain the most negative applied voltage to prevent potential latch-up conditions. It is recommended to clamp the VA- supply to system ground using a reverse biased Schottky diode to prevent possible latch-up conditions related to mismatched supply rail initialization. 2.3.2 Digital Power Supplies A power-down mode is available to shut down the amplifier when not in use. When enabled, all internal circuitry is disabled, the analog inputs and outputs go high-impedance, and the device enters a micro-power state. Power down mode is selected using the PWDN pin, which is active high. The digital power supply across the VD and GND pins is specified for a +3.3 V power supply. The digital power supply should be bypassed to system ground using a 0.01 µF X7R type capacitor. 12 DS765PP1 CS3302A DS765PP1 CS3302A 2.4 Connection Diagram Figure 5 shows a connection diagram for the CS3302A amplifier when used with the CS5372A dual ∆Σ modulator, the CS4373A test DAC and the CS5376A digital filter. The diagram shows differential sensors, a test DAC, and analog outputs with anti-alias capacitors; power supply connections including recommended bypassing; and digital control connections back to the CS5376A GPIO pins. 3 2 GPIO (x3) GPIO (x2) GPIO To CS5376A Digital Control A GAIN VA+ VA+ 0.1 µF MUX PWDN VD VD CS3302A Differential Amplifier 0.1 µF 0.01 µF 0.01 µF VA+ VD VAVA0.1 µF VA+ GND INAGUARD INBINB+ OUTROUTFOUTF+ OUTR+ 680 Ω VD MDATA1 MFLAG1 PWDN1 INA+ 680 Ω INR+ INF+ 0.02 µF C0G 680 Ω 0.02µF C0G Differential Sensor CS4373A Test DAC INFINR680 Ω MCLK MSYNC VREF+ 2.5 V Reference CS5372A ∆Σ M odulator VREF- Differential Sensor 680 Ω 680 Ω 0.02 µF C0G 0.02 µF C0G INRINFINF+ INR+ VD LPWR OFST 680 Ω 680 Ω INA+ VA+ VA+ 0.1 µF INA- GUARD INB- INB+ OUTR- OUTF- OUTF+ OUTR+ VD VA- MDATA2 MFLAG2 PWDN2 GND CS3302A Differential Amplifier VAGND GAIN MUX PWDN 0.01 µF VA0.1µF VA0.1 µF A 2 3 GPIO GPIO (x2) GPIO (x3) To CS5376A Digital Control Figure 5. CS3302A Amplifier Connections DS765PP1 13 CS3302A DS765PP1 3. VA+ VAVD GND INA+, INAINB+, INBGUARD OUTR+, OUTROUTF+, OUTFGAIN0, GAIN1, GAIN2 PWDN MUX0, MUX1 TEST0 TEST1, TEST2 TESTOUT CS3302A PIN DESCRIPTION Pin # I/O Pin Description Pin Name 1 4 16 15, 18 5, 6 8, 7 13 11, 2 10, 3 22, 21, 20 19 24, 23 12 17, 14 9 I I I I I I O O O I I I I I O Positive analog supply voltage. Negative analog supply voltage. Positive digital supply voltage. Ground. Channel A differential analog inputs. Selected via MUX pins. Channel B differential analog inputs. Selected via MUX pins. Guard voltage output. Rough charge differential analog outputs. Fine charge differential analog outputs. Gain range select. See Gain Selection table in Digital Characteristics section. Power down mode enable. Active high. Analog input select. See Input Selection table in Digital Characteristics section. Test mode select, factory use only. Connect to VA- during normal operation. Test mode select, factory use only. Connect to GND during normal operation. Test mode output, factory use only. Do not connect during normal operation. Table 2. Pin Descriptions Positive Analog Power Supply Negative Analog Rough Output Negative Analog Fine Output Negative Analog Power Supply Non-Inverting Input A Inverting Input A Inverting Input B Non-Inverting Input B Test Mode Output Positive Analog Fine Output Positive Analog Rough Output Test Mode Select VA+ OUTROUTFVAINA+ INAINBINB+ TESTOUT OUTF+ OUTR+ TEST0 1 2 3 4 24 23 22 21 MUX0 MUX1 GAIN0 GAIN1 GAIN2 PWDN GND TEST1 VD GND TEST2 GUARD Input Mux Select Input Mux Select Gain Range Select Gain Range Select Gain Range Select Power Down Mode Enable Ground Test Mode Select Positive Digital Power Supply Ground Test Mode Select Guard Voltage Output 5 6 7 20 19 18 8 9 10 11 12 17 16 15 14 13 Figure 6. CS3302A Pin Assignments 14 DS765PP1 CS3302A DS765PP1 4. ORDERING INFORMATION Model Temperature Package CS3302A CS3302A-IS CS3302A-ISZ, lead (Pb) free -40 to +85 °C 24-pin SSOP 5. ENVIRONMENTAL, MANUFACTURING, & HANDLING INFORMATION Model Number Peak Reflow Temp 240 °C 260 °C MSL Rating* 2 3 Max Floor Life 365 Days 7 Days CS3302A-IS CS3302A-ISZ, lead (Pb) free * MSL (Moisture Sensitivity Level) as specified by IPC/JEDEC J-STD-020. DS765PP1 15 CS3302A DS765PP1 6. PACKAGE DIMENSIONS 24 PIN SSOP PACKAGE DRAWING N CS3302A D E11 A2 A1 L E A e b2 SIDE VIEW END VIEW SEATING PLANE 123 TOP VIEW INCHES DIM A A1 A2 b D E E1 e L MIN -0.002 0.064 0.009 0.311 0.291 0.197 0.024 0.025 0° MAX 0.084 0.010 0.074 0.015 0.335 0.323 0.220 0.027 0.040 8° ∝ MILLIMETERS MIN MAX -2.13 0.05 0.25 1.62 1.88 0.22 0.38 7.90 8.50 7.40 8.20 5.00 5.60 0.61 0.69 0.63 1.03 0° 8° NOTE 2,3 1 1 Notes: 1. “D” and “E1” are reference datums and do not included mold flash or protrusions, but do include mold mismatch and are measured at the parting line, mold flash or protrusions shall not exceed 0.20 mm per side. 2. Dimension “b” does not include dambar protrusion/intrusion. Allowable dambar protrusion shall be 0.13 mm total in excess of “b” dimension at maximum material condition. Dambar intrusion shall not reduce dimension “b” by more than 0.07 mm at least material condition. 3. These dimensions apply to the flat section of the lead between 0.10 and 0.25 mm from lead tips. 16 DS765PP1