CS4207-DNZR

CS4207 Low-power, 4-in / 6-out HD Audio CODEC with Headphone Amp DIGITAL to ANALOG FEATURES  DAC1 (Headphone) ANALOG to DIGITAL FEATURES  ADC1 & ADC2 – – – – – – – – 101 dB Dynamic Range (A-wtd) -89 dB THD+N Integrated Negative-voltage Regulator No DC-blocking Capacitor Required 50 mW Power/Channel into 16 Ω 110 dB Dynamic Range (A-wtd) -94 dB THD+N Differential Balanced or Single-ended  Headphone Amplifier - GND Centered – – – –  DAC2 & DAC3 (Line Outs) 105 dB Dynamic Range (A-wtd) -88 dB THD+N Differential Balanced or Single-ended Inputs Analog Programmable Gain Amplifier (PGA) ±12 dB, 1.0 dB Steps, with Zero Cross Transitions and Mute Pre-amplifier with Selectable 0 dB, +10 dB, +20 dB, and +30 dB Gain Settings Programmable, Low-noise MIC Bias Level  MIC Inputs – –  Each DAC Supports 32 kHz to 192 kHz Sample Rates Independently.  Digital Volume Control  Each ADC Supports 8 kHz to 96 kHz Sample Rates Independently  Additional Digital Attenuation Control – – +6.0 dB to -57.5 dB in 0.5 dB Steps Zero Cross and/or Soft Ramp Transitions  Independent Support of D0 and D3 Power States for Each DAC  Fast D3 to D0 Transition – – -13.0 dB to -51.0 dB in 1.0 dB steps Zero Cross and/or Soft Ramp Transitions  Digital Interface for Two Dual Digital Mic Inputs  Independent Support of D0 and D3 Power – Audio Playback in Less Than 50 ms States for Each ADC VD (1.5 V to 1.8 V) VA, VA_REF (3.3 V to 5.0 V) VA_HP (3.3 V to 5.0 V) Chrg Pump Buck +VHP Chrg Pump Invert -VHP Level Translator Vol/Mute HD Audio Interface SRC & Multibit ΔΣ Modulator SRC & Multibit ΔΣ Modulator SRC & Multibit ΔΣ Modulator Digital Filter & SRC Digital Filter & SRC 2-Chnl DAC1 2-Chnl DAC2 2-Chnl DAC3 Headphone Amp - GND Centered Line Out Line Out Left HP Out Right HP Out +Left Line Out + Right Line Out +Left Line Out + Right Line Out - HD Audio Bus VL_HD (1.5 V to 3.3 V) GPIO S/PDIF OUT 2 S/PDIF OUT 1 VL_IF (3.3 V) S/PDIF IN D-Mic Clock D-Mic In Vol/Mute GPIO SPDIF TX2 SPDIF TX1 HD Bus Fs Vol/Mute Level Translator Vol/Boost/ Mute 2-Chnl ADC1 PGA + - Line/Mic In L Line/Mic In R + + - Mic/Line In L +Mic/Line In R Mic Bias SENSE_A 128Fs Clock Multiplier SPDIF RX SRC Vol/Boost/ Mute 2-Chnl ADC2 PGA MIC Bias SPDIF RX Jack Sense http://www.cirrus.com Copyright  Cirrus Logic, Inc. 2009 (All Rights Reserved) APR '09 DS880F1 CS4207 Digital Audio Interface Receiver  Complete EIAJ CP1201, IEC-60958, S/PDIF General Description The CS4207 is a highly integrated multi-channel lowpower HD Audio CODEC featuring 192 kHz DACs, 96 kHz ADCs, 192 kHz S/PDIF Transmitters and Receiver, Microphone pre-amp and bias voltage, and a ground centered Headphone driver. Based on multi-bit, delta-sigma modulation, it allows infinite sample rate adjustment between 32 kHz and 192 kHz. The ADC input path allows control of a number of features. The microphone input path includes a selectable programmable-gain pre-amplifier stage and a low-noise MIC bias voltage supply. A PGA is available for line and microphone inputs and provides analog gain with soft ramp and zero cross transitions. The ADC also features an additional digital volume attenuator with soft ramp transitions. The stereo headphone amplifier is powered from a separate internally generated positive supply, with an integrated charge pump providing a negative supply. This allows a ground-centered analog output with a wide signal swing and eliminates external DC-blocking capacitors. The integrated digital audio interface receiver and transmitters utilize a 24-bit, high-performance, monolithic CMOS stereo asynchronous sample rate converter to clock align the PCM samples to/from the S/PDIF interfaces. Auto detection of non-PCM encoded data disables the sample rate conversion to preserve bit accuracy of the data. In addition to its many features, the CS4207 operates from a low-voltage analog and digital core, making this part ideal for portable systems that require low power consumption in a minimal amount of space. The CS4207 is available in a 48-pin WQFN package in both Automotive (-40°C to +105°C) and Commercial (40°C to +85°C) grades. The CS4207 Customer Demonstration board is also available for device evaluation and implementation suggestions. Please refer to “Ordering Information” on p 142 for complete ordering information. Compatible Receiver  32 kHz to 192 kHz Sample Rate Range  Automatic Detection of Compressed Audio Streams  Integrated Sample Rate Converter – – – – 128 dB Dynamic Range -120 dB THD+N Supports Sample Rates up to 192 kHz 1:1 Input/Output Sample Rate Ratios Digital Audio Interface Transmitters  Two Independent EIAJ CP1201, IEC-60958, S/PDIF Compatible Transmitters  32 kHz to 192 kHz Sample Rate Range System Features  Very Low D3 Power Dissipation of = 44.1 kHz FsADC 03h. Connection List Entry (N+2): Returns 00h for N=00h-03h or N>03h. Connection List Entry (N+1): Returns 12h (Digital Mic In 2) for N=00h-03h. Returns 00h for N>03h. Connection List Entry (N): Returns 0Ch (Line In 1) for N=00h-03h. Returns 00h for N>03h. 7:0 Read Only 0Ch 6.5.8 ADC1 Connection Select Control Get Parameter Command Format: Bits [31:28] CAd = X Bits [27:20] Node ID = 05h Bits [19:8] Verb ID = F01h Bits [7:0] Parameter ID = 00h DS880F1 55 CS4207 Set Parameter Command Format: Bits [31:28] CAd = X Bits [27:20] Node ID = 05h Bits [19:8] Verb ID = 701h Bits [7:0] Parameter ID = xxh Response Format: Bits 31:8 Type Read Only Default 000000h Description Reserved Connection Index Value: For a Get command, this field specifies the current connection index. The field is written by software to indicate the connection index value to be set. 00h: Line In 1 (NID=0Ch) 01h: Digital Mic In 2 (NID=12h) 7:0 Read/Write 00h 6.5.9 ADC2 Connection List Entry Get Parameter Command Format: Bits [31:28] CAd = X Bits [27:20] Node ID = 06h Bits [19:8] Verb ID = F02h Bits [7:0] Parameter ID = N=00h Response Format: Bits 31:24 23:16 15:8 Type Read Only Read Only Read Only Default 00h 00h 0Eh Description Connection List Entry (N+3): Returns 00h for N=00h-03h or N>03h. Connection List Entry (N+2): Returns 00h for N=00h-03h or N>03h. Connection List Entry (N+1): Returns 0Eh (Digital Mic In 1) for N=00h-03h. Returns 00h for N>03h Connection List Entry (N): Returns 0Dh (Mic In 1) for N=00h-03h. Returns 00h for N>03h. 7:0 Read Only 0Dh 6.5.10 ADC2 Connection Select Control Get Parameter Command Format: Bits [31:28] CAd = X Bits [27:20] Node ID = 06h Bits [19:8] Verb ID = F01h Bits [7:0] Parameter ID = 00h Set Parameter Command Format: Bits [31:28] CAd = X Bits [27:20] Node ID = 06h Bits [19:8] Verb ID = 701h Bits [7:0] Parameter ID = xxh Response Format: Bits 31:8 Type Read Only Default 000000h Description Reserved Connection Index Value: For a Get command, this field specifies the current connection index. The field is written by software to indicate the connection index value to be set. 00h: Mic In 1 (NID=0Dh) 01h: Digital Mic In 1 (NID=0Eh) 7:0 Read/Write 00h 56 DS880F1 CS4207 6.5.11 Power States Get Parameter Command Format: Bits [31:28] CAd = X Bits [27:20] ADC1 Node ID=05h ADC2 Node ID=06h Bits [19:8] Verb ID = F05h Bits [7:0] Parameter ID = 00h Set Parameter Command Format: Bits [31:28] CAd = X Bits [27:20] ADC1 Node ID=05h ADC2 Node ID=06h Bits [19:8] Verb ID = 705h Bits [7:0] Parameter ID = 0xh Response Format: Bits 31:11 Type Read Only Default 00000h Reserved Power State Settings Reset(PS-SettingsReset): This bit is set to ‘1’b when, during any type of reset or low power state transition, the settings within this widget that were changed from the defaults, either by software or hardware, have been reset back to their default state. When these settings have not been reset, this is reported as ‘0’b. This bit is always a ‘1’b following a POR condition. For more information, Description 10 Read Only 1b see “Power State Settings Reset (PS-SettingsReset)” on p 27 9 8 7:4 Read Only Read Only Read Only 0b 0b 0011b Power State Clock Stop OK(PS-ClkStopOK): This bit is not supported and will always return ‘0’b when read. Power State Error (PS-Error): This bit is not supported and will always return ‘0’b when read. Power State Actual (PS-Act): This field indicates the actual power state of the referenced node. The default state is D3. Power State Set (PS-Set): Writes to these bits set the Audio Function Group to the Power State as described below: PSS = ’0000’b; D0 - Fully on. PSS = ‘0001’b; D1 - Not Supported PSS = ‘0010’b; D2 - Not Supported PSS = ‘0011’b; D3 - Allows for lowest possible power consumption under software control. See “D3 Lower Power State Support” on page 25 for more information. PSS = ‘0100’b; D4 - Not Supported 3:0 Read/Write 0011b PS-Set is a PowerState field which defines the current power setting of the referenced node. Since this node is of type other than an Audio Function Group node, the actual power state is a function of both this setting and the PowerState setting of the Audio Function Group node under which this node was enumerated (is controlled). PS-Act is a PowerState field which indicates the actual power state of this node. Within the Audio Function Group node, this field will always be equal to the PS-Set field (modulo the time required to execute a DS880F1 57 CS4207 power state transition). Within this type of node, this field will be the lower power consuming state of either a) the PS-Set field of the currently referenced node or b) the PS-Set field of the Audio Function Group node under which the currently referenced node was enumerated (is controlled). 6.5.12 Converter Stream, Channel Get Parameter Command Format: Bits [31:28] CAd = X Bits [27:20] ADC1 Node ID=05h ADC2 Node ID=06h Bits [19:8] Verb ID = F06h Bits [7:0] Parameter ID = 00h Set Parameter Command Format: Bits [31:28] CAd = X Bits [27:20] ADC1 Node ID=05h ADC2 Node ID=06h Bits [19:8] Verb ID = 706h Bits [7:0] Parameter ID = xxh Response Format: Bits 31:8 Type Read Only Default 000000h Reserved Stream Number (SN): This field is written by software to indicate the stream number used by the Input Converter. “0h” is stream 0, “1h” is stream 1, etc. By convention, stream 0 is reserved and unused so that converter whose stream number has been reset to “0h” does not unintentionally decode data not intended for them. Lowest Channel Number (LCN): This field is written by software to indicate the lowest channel used by the Input Converter. The stereo converter will use this LCN value plus 1 for its left and right channel. Description 7:4 Read/Write 0h 3:0 Read/Write 0h 6.5.13 Converter Format Get Parameter Command Format: Bits [31:28] CAd = X Bits [27:20] ADC1 Node ID=05h ADC2 Node ID=06h Bits [19:8] Verb ID = A00h Bits [7:0] Parameter ID = 00h Set Parameter Command Format: Bits [31:28] CAd = X Bits [27:20] ADC1 Node ID=05h ADC2 Node ID=06h Bits [19:8] Verb ID = 2xxh Bits [7:0] Parameter ID = xxh Response Format: Bits [15:0] must be programmed by software with the same value programmed into the Stream Descriptor, so that the data format being transmitted on the link matches what is expected by the consumer of the data. 58 DS880F1 CS4207 If the TYPE is set to Non-PCM, the controller pushes data over the link and is not concerned with formatting. The base rate, data type, and number of Words (MULT) to send each valid frame are specified to control the rate at which the non-PCM data is sent. Bits 31:16 Type Read Only Default 0000h Reserved Stream Type (TYPE): If TYPE is non-zero, the other bits in the format structure have other meanings. 0: PCM 1: Non-PCM Description 15 Read/Write 0b 14 Read/Write 0b Sample Base Rate (BASE): 0 = 48 kHz 1 = 44.1 kHz Sample Base Rate Multiple (MULT): 000 = 48 kHz/44.1 kHz or less 001 = x2 (96 kHz, 88.2 kHz, 32 kHz) 010 = x3 (144 kHz) 011 = x4 (192 kHz, 176.4 kHz) 100-111 = Reserved Sample Base Rate Divisor (DIV): 000 = Divide by 1 (48 kHz, 44.1 kHz) 001 = Divide by 2 (24 kHz, 22.05 kHz) 010 = Divide by 3 (16 kHz, 32 kHz) 011 = Divide by 4 (11.025 kHz) 100 = Divide by 5 (9.6 kHz) 101 = Divide by 6 (8 kHz) 110 = Divide by 7 111 = Divide by 8 (6 kHz) Reserved Bits per Sample (BITS): Number of bits in each sample: 000 = 8 bits. The data will be packed in memory in 8-bit containers on 16-bit boundaries. 001 = 16 bits. The data will be packed in memory in 16-bit containers on 16-bit boundaries. 010 = 20 bits. The data will be packed in memory in 32-bit containers on 32-bit boundaries. 011 = 24 bits. The data will be packed in memory in 32-bit containers on 32-bit boundaries. 100 = 32 bits. The data will be packed in memory in 32-bit containers on 32-bit boundaries. 101-111 = Reserved Number of Channels (CHAN): Number of channels in each frame of the stream: 0000 = 1 0001 = 2 … 1111 = 16 13:11 Read/Write 000b 10:8 Read/Write 000b 7 Read Only 0b 6:4 Read/Write 000b 3:0 Read/Write 0000b DS880F1 59 CS4207 6.5.14 Amplifier Gain/Mute Get Parameter Command Format: Bits [31:28] CAd = X Bits [27:20] ADC1 Node ID=05h ADC2 Node ID=06h Bits [19:8] Verb ID = Bxxh Bits [7:0] Parameter ID = xxh Bits [19:8] = ‘Bxxxx’, where bits [15:0] are defined below: Bits [15:0] 15 14 13 12:4 Value 0b 0b xb 000000000b Description Get Output/Input (GOI): Controls whether the request is for the input amplifier or the output amplifier. When ‘0’, the input amplifier is being requested. When ‘1’, the output amplifier is being requested. ‘0’b Get Left/Right (GLR): This bit controls whether the request is for the left channel amplifier or the right channel amplifier. When ‘1’, the left channel amplifier is being requested. When ‘0’, the right channel amplifier is being requested. Reserved Index (IDX): This field specifies the input index of the amplifier setting to return if the widget has multiple input amplifiers. It is only applicable if “Get Output/Input” is ‘0’ which indicates input amplifier is being requested. This field has no meaning and ignored since the widget does not have multiple input amplifiers. It should be always ‘0’s. 3:0 0000b Response Format: Bits 31:8 Type Read Only Default 000000h Description Always returned “000000h” Amplifier Mute (AM): This bit returns the Mute setting for the amplifier requested. A 1 indicates the amplifier is in the Mute condition. If the amplifier requested does not exist, a ‘0’ will be returned. Default equals Muted. Amplifier Gain (AG): This field returns the Gain setting for the amplifier requested. If the amplifier requested does not exist, all ‘0’s will be returned Default equals 0 dB. 7 Read Only 1b 6:0 Read Only 0110011b Set Parameter Command Format: Bits [31:28] CAd = X Bits [27:20] ADC1 Node ID=05h ADC2 Node ID=06h Bits [19:8] Verb ID = 3xxh Bits [7:0] Parameter ID = xxh Bits [19:8] = ‘3xxxx’, where bits [15:0] are defined below: Bits 15 14 Type Write Only Write Only Default 0b xb Description Set Output Amplifier (SOA): Bit is always ‘0’ since an output amplifier is not present. Set Input Amplifier (SIA): Determines if the value programmed refers to the input amplifier. Set to a 1 for the value to be accepted. 60 DS880F1 CS4207 13 Write Only xb Set Left Amplifier (SLA): Selects the left channel (channel 0). A 1 indicates that the relevant amplifier should accept the value being set. If both bits are set, both amplifiers are set. Set Right Amplifier (SRA): Selects the right channel (channel 1). A 1 indicates that the relevant amplifier should accept the value being set. If both bits are set, both amplifiers are set. Index (IDX): This field is used when programming the input amplifiers on Selector Widgets and Sum Widgets. This field is ignored. Mute (MUTE): When ‘1’, the Mute is active. When ‘0’, the Mute is inactive. Gain (GAIN): Specifies the amplifier gain in dB. 12 Write Only xb 11:8 7 6:0 Write Only Write Only Write Only 0000b xb xxxxxxxb DS880F1 61 CS4207 6.6 6.6.1 S/PDIF Receiver Input Converter Widget (Node ID = 07h) Audio Widget Capabilities Get Parameter Command Format: Bits [31:28] CAd = X Bits [27:20] Node ID = 07h Bits [19:8] Verb ID = F00h Bits [7:0] Parameter ID = 09h Response Format: Bits 31:24 23:20 19:16 15:12 11 10 9 8 7 6 5 Type Read Only Read Only Read Only Read Only Read Only Read Only Read Only Read Only Read Only Read Only Read Only Default 00h 1h 8h 0h 0b 1b 1b 1b 1b 0b 0b Reserved Type (TYP): Audio Input Converter Widget Delay (DLY): Number of sample delays through the widget. Description Reserved L-R Swap (LRS): This widget is not capable of swapping the left and right channels. Power Control (PC): Power State control is supported on this widget. Digital (DIG): Widget is a digital widget. Connection List (CL): A connection list is present on this widget. Unsolicited Capable (UC): Unsolicited Response is supported on this widget. Processing Widget (PW): This widget does not contain “Processing Controls” parameters. Stripe (STRP): Stripping is not supported. Format Override (FO): This bit is a ‘1’ to indicate that the widget contains format information, and the “Supported Formats” and “Supported PCM Bits, Rates” should be queried for the widget’s format capabilities. Amplifier Parameter Override (APO): This widget does not contain amplifier parameters. Output Amplifier Present (OAP): Output amplifier is not present for this widget. Input Amplifier Present (IAP): Input amplifier is not present for this widget. Stereo (ST): A 1 indicates a stereo widget. 4 Read Only 1b 3 2 1 0 Read Only Read Only Read Only Read Only 0b 0b 0b 1b 62 DS880F1 CS4207 6.6.2 Supported PCM Size, Rates Get Parameter Command Format: Bits [31:28] CAd = X Bits [27:20] Node ID = 07h Bits [19:8] Verb ID = F00h Bits [7:0] Parameter ID = 0Ah Response Format: Bits 31:21 20 19 18 17 16 15:12 11 10 9 8 7 6 5 4 3 2 1 0 Type Read Only Read Only Read Only Read Only Read Only Read Only Read Only Read Only Read Only Read Only Read Only Read Only Read Only Read Only Read Only Read Only Read Only Read Only Read Only Default 00000000000b 1b 1b 1b 1b 0b 0h 0b 1b 0b 1b 0b 1b 1b 1b 0b 0b 0b 0b Reserved 32-Bit (32B): 32-bit audio format is supported. 24-Bit (24B): 24-bit audio format is supported. 20-Bit (20B): 20-bit audio format is supported. 16-Bit (16B): 16-bit audio format is supported. 8-Bit (8B): 8-bit audio format is not supported. Description Reserved Rate-12 (R12): 384 kHz (48*8) rate is not supported. Rate-11 (R11):192.0 kHz(48*4)rate is supported. Rate-10 (R10):176.4 kHz(44.1*4)rate is not supported. Rate-9 (R9): 96.0 kHz (48*2) rate is supported. Rate-8 (R8): 88.2 kHz (44.1*2) rate is not supported. Rate-7 (R7): 48.0 kHz rate is supported. Rate-6 (R6): 44.1 kHz rate is supported. Rate-5 (R5): 32.0 kHz (48*2/3) rate is supported. Rate-4 (R4): 22.05 kHz (44.1/2) rate is not supported. Rate-3 (R3): 16.0 kHz (48/3) rate is not supported Rate-2 (R2): 11.025 kHz (44.1/4) rate is not supported. Rate-1 (R1): 8.0 kHz (48/6) rate is not supported. 6.6.3 Supported Stream Formats Get Parameter Command Format: Bits [31:28] CAd = X Bits [27:20] Node ID = 07h Bits [19:8] Verb ID = F00h Bits [7:0] Parameter ID = 0Bh Response Format: Bits 31:3 2 1 0 Type Read Only Read Only Read Only Read Only Default 0 1b 0b 1b Description Reserved AC-3 (AC3): AC-3 data is supported. Float32 (FLT32): Float32 formatted data is not supported on this widget. Pulse Code Modulation (PCM): PCM formatted data is supported on this widget. DS880F1 63 CS4207 6.6.4 Connection List Length Get Parameter Command Format: Bits [31:28] CAd = X Bits [27:20] Node ID = 07h Bits [19:8] Verb ID = F00h Bits [7:0] Parameter ID = 0Eh Response Format: Bits 31:8 7 6:0 Type Read Only Read Only Read Only Default 000000h 0b 0000001b Reserved Long Form (LF): Connection list is short form. Connection List Length (CLL): One hard-wired input is possible for this widget. Description 6.6.5 Supported Power States Get Parameter Command Format: Bits [31:28] CAd = X Bits [27:20] Node ID = 07h Bits [19:8] Verb ID = F00h Bits [7:0] Parameter ID = 0Fh Response Format: Bits 31 Type Read Only Default 1b Description EPSS Supported. Indicates that the converter supports additional capabilities allowing better low power operation. 30 29:5 4 3 Read Only Read Only Read Only Read Only 0b 000000h 0b 1b Reserved Reserved D4 is not Supported D3 is Supported. Since Extended Power States is also supported then the maximum exit time back to fully functional is 10 milliseconds. This is measured from the response to the Set Power State verb that caused the transition from D3 back to fully operational D0 state. D2 is not Supported D1 is not Supported D0 Supported 2 1 0 Read Only Read Only Read Only 0b 0b 1b 6.6.6 Connection List Entry Get Parameter Command Format: Bits [31:28] CAd = X Bits [27:20] Node ID = 07h Bits [19:8] Verb ID = F02h Bits [7:0] Parameter ID = N=00h Response Format: Bits 31:24 23:16 Type Read Only Read Only Default 00h 00h Description Connection List Entry (N+3): Returns 00h for N=00h-03h or N>03h. Connection List Entry (N+2): Returns 00h for N=00h-03h or N>03h. 64 DS880F1 CS4207 15:8 7:0 Read Only Read Only 00h 0Fh Connection List Entry (N+1): Returns 00h for N=00h-03h or N>03h. Connection List Entry (N): Returns 0Fh (S/PDIF RX) for N=00h-03h. Returns 00h for N>03h. 6.6.7 Power States Get Parameter Command Format: Bits [31:28] CAd = X Bits [27:20] Node ID = 07h Bits [19:8] Verb ID = F05h Bits [7:0] Parameter ID = 00h Set Parameter Command Format: Bits [31:28] CAd = X Bits [27:20] Node ID = 07h Bits [19:8] Verb ID = 705h Bits [7:0] Parameter ID = 0xh Response Format: Bits 31:11 Type Read Only Default 00000h Reserved Power State Settings Reset(PS-SettingsReset): This bit is set to ‘1’b when, during any type of reset or low power state transition, the settings within this widget that were changed from the defaults, either by software or hardware, have been reset back to their default state. When these settings have not been reset, this is reported as ‘0’b. This bit is always a ‘1’b following a POR condition. For more information, Description 10 Read Only 1b see “Power State Settings Reset (PS-SettingsReset)” on p 27 9 8 7:4 Read Only Read Only Read Only 0b 0b 0011b Power State Clock Stop OK(PS-ClkStopOK): This bit is not supported and will always return ‘0’b when read. Power State Error (PS-Error): This bit is not supported and will always return ‘0’b when read. Power State Actual (PS-Act): This field indicates the actual power state of the referenced node. The default state is D3. Power State Set (PS-Set): Writes to these bits set the Audio Function Group to the Power State as described below: PSS = ’0000’b; D0 - Fully on. PSS = ‘0001’b; D1 - Not Supported PSS = ‘0010’b; D2 - Not Supported PSS = ‘0011’b; D3 - Allows for lowest possible power consumption under software control. See “D3 Lower Power State Support” on page 25 for more information. PSS = ‘0100’b; D4 - Not Supported 3:0 Read/Write 0011b PS-Set is a PowerState field which defines the current power setting of the referenced node. Since this node is of type other than an Audio Function Group node, the actual power state is a function of both this DS880F1 65 CS4207 setting and the PowerState setting of the Audio Function Group node under which this node was enumerated (is controlled). PS-Act is a PowerState field which indicates the actual power state of this node. Within the Audio Function Group node, this field will always be equal to the PS-Set field (modulo the time required to execute a power state transition). Within this type of node, this field will be the lower power consuming state of either a) the PS-Set field of the currently referenced node or b) the PS-Set field of the Audio Function Group node under which the currently referenced node was enumerated (is controlled). 6.6.8 Converter Stream, Channel Get Parameter Command Format: Bits [31:28] CAd = X Bits [27:20] Node ID = 07h Bits [19:8] Verb ID = F06h Bits [7:0] Parameter ID = 00h Set Parameter Command Format: Bits [31:28] CAd = X Bits [27:20] Node ID = 07h Bits [19:8] Verb ID = 706h Bits [7:0] Parameter ID = xxh Response Format: Bits 31:8 Type Read Only Default 000000h Reserved Stream Number (SN): Indicates the stream number used by the Input Converter. “0h” is stream 0, “1h” is stream 1, etc. By convention, stream 0 is reserved and unused so that converter whose stream number has been reset to “0h” does not unintentionally decode data not intended for them. Lowest Channel Number (LCN): Indicates the lowest channel used by the Input Converter. The stereo converter will use this LCN value plus 1 for its left and right channel. Description 7:4 Read/Write 0h 3:0 Read/Write 0h 6.6.9 Converter Format Get Parameter Command Format: Bits [31:28] CAd = X Bits [27:20] Node ID = 07h Bits [19:8] Verb ID = A00h Bits [7:0] Parameter ID = 00h Set Parameter Command Format: Bits [31:28] CAd = X Bits [27:20] Node ID = 07h Bits [19:8] Verb ID = 2xxh Bits [7:0] Parameter ID = xxh Response Format: Bits [15:0] must be programmed by software with the same value programmed into the Stream Descriptor, so that the data format being transmitted on the link matches what is expected by the consumer of the data. If the TYPE is set to Non-PCM, the controller pushes data over the link and is not concerned with formatting. The base rate, data type, and number of Words (MULT) to send each valid frame are specified to control the rate at which the non-PCM data is sent. 66 DS880F1 CS4207 Bits 31:16 Type Read Only Default 0000h Description Reserved Stream Type (TYPE): If TYPE is non-zero, the other bits in the format structure have other meanings. 0: PCM 1: Non-PCM Sample Base Rate (BASE): 0 = 48 kHz 1 = 44.1 kHz Sample Base Rate Multiple (MULT): 000 = 48 kHz/44.1 kHz or less 001 = x2 (96 kHz, 88.2 kHz, 32 kHz) 010 = x3 (144 kHz) 011 = x4 (192 kHz, 176.4 kHz) 100-111 = Reserved Sample Base Rate Divisor (DIV): 000 = Divide by 1 (48 kHz, 44.1 kHz) 001 = Divide by 2 (24 kHz, 22.05 kHz) 010 = Divide by 3 (16 kHz, 32 kHz) 011 = Divide by 4 (11.025 kHz) 100 = Divide by 5 (9.6 kHz) 101 = Divide by 6 (8 kHz) 110 = Divide by 7 111 = Divide by 8 (6 kHz) Reserved Bits per Sample (BITS): Number of bits in each sample: 000 = 8 bits. The data will be packed in memory in 8-bit containers on 16-bit boundaries. 001 = 16 bits. The data will be packed in memory in 16-bit containers on 16-bit boundaries. 010 = 20 bits. The data will be packed in memory in 32-bit containers on 32-bit boundaries. 011 = 24 bits. The data will be packed in memory in 32-bit containers on 32-bit boundaries. 100 = 32 bits. The data will be packed in memory in 32-bit containers on 32-bit boundaries. 101-111 = Reserved Number of Channels (CHAN): Number of channels in each frame of the stream: 0000 = 1 0001 = 2 … 1111 = 16 15 Read/Write 0b 14 Read/Write 0b 13:11 Read/Write 000b 10:8 Read/Write 000b 7 Read Only 0b 6:4 Read/Write 000b 3:0 Read/Write 0000b DS880F1 67 CS4207 6.6.10 Digital Converter Control Get Parameter Command Format: Bits [31:28] CAd = X Bits [27:20] Node ID = 07h Bits [19:8] Verb ID = F0D/** Bits [7:0] Parameter ID = 00h ** Note: Address F0Eh is not supported. Set Parameter Command Format: Bits [31:28] CAd = X Response Format: Bits [27:20] Node ID = 07h Bits [19:8] Verb ID =70D Verb ID =70E Bits [7:0] Parameter ID =Bits[7:0] Parameter ID =Bits[15:8] The S/PDIF IEC Control (SIC) bits are supported in one of two ways. In the first case referred to as “Codec Formatted SPDIF,” on an input PCM stream of less than 32 bits, the codec strips off the SIC bits before transferring the samples to the system and puts them in the Digital Converter Control for later software access. In the second case, referred to as “Software Formatted (or Raw) SPDIF,” on a 32-bit input stream, the entire stream is transferred into the system without the codec stripping any bits. However, the codec must properly interpret the Sync Preamble bits of the stream and then send the appropriately coded preamble. The IEC60958 specification, Section 4.3, “Preambles,” defines the preambles and the coding to be used. Software will specify the “B,” “M,” or “W” (also known as “X,” “Y,” or “Z”) preambles by encoding the last four bits of the preamble into the Sync Preamble section (bits 0-3) of the frame. The codec must examine the bits specified and encode the proper preamble based on the previous state. The previous state is to be maintained by the codec hardware. Bits 31:16 15 14:8 7 6 5 4 3 Type Read Only Read Only Read Only Read Only Read Only Read Only Read Only Read Only Default 0000h 0b 0000000b 0b 0b 0b 1b 1b Reserved Reserved CC[6:0] (Category Code): Programmed according to IEC standards, or as appropriate. L (Generation Level): Programmed according to IEC standards, or as appropriate. PRO (Professional): 1 indicates Professional use of channel status; 0 indicates Consumer. /AUDIO (Non-Audio): 1 indicates data is nonPCM format; 0 indicates data is PCM. COPY (Copyright): 1 indicates copyright is asserted; 0 indicates copyright is not asserted. PRE (Pre-emphasis): 1 indicates filter preemphasis is 50/15 us; 0 pre-emphasis is none. VCFG (Validity Config.): This bit is only defined for Output Converters and is defined as Reserved, with a Read Only value of 0 for Input Converters. V (Validity): This bit reflects the “Validity flag,” transmitted in each subframe. DigEn (Digital Enable): Enables or disables digital transmission. A 1 indicates that the digital data can pass through the node. A 0 indicates that the digital data is blocked from passing through the node, regardless of the state. Description 2 Read Only 0b 1 Read Only 0b 0 Read/Write 0b 68 DS880F1 CS4207 6.7 S/PDIF Transmitter 1, S/PDIF Transmitter 2 Output Converter Widgets (Node ID = 08h, 14h) Audio Widget Capabilities Get Parameter Command Format: Bits [31:28] CAd = X Bits [27:20] S/P Tx 1 Node ID=08h S/P Tx 2 Node ID=14h 6.7.1 Bits [19:8] Verb ID = F00h Bits [7:0] Parameter ID = 09h Response Format: Bits 31:24 23:20 19:16 15:12 11 10 9 8 7 6 5 Type Read Only Read Only Read Only Read Only Read Only Read Only Read Only Read Only Read Only Read Only Read Only Default 00h 0h 4h 0h 0b 1b 1b 0b 0b 0b 0b Reserved Type (TYP): Audio Output Converter Widget Delay (DLY): Number of sample delays through the widget. Description Reserved L-R Swap (LRS): This widget is not capable of swapping the left and right channels. Power Control (PC): Power State control is supported on this widget. Digital (DIG): Widget is a digital widget. Connection List (CL): A connection list is not present on this widget. Unsolicited Capable (UC): Unsolicited Response is not supported on this widget. Processing Widget (PW): This widget does not contain “Processing Controls” parameters. Stripe (STRP): Stripping is not supported. Format Override (FO): This bit is a ‘1’ to indicate that the widget contains format information, and the “Supported Formats” and “Supported PCM Bits, Rates” should be queried for the widget’s format capabilities. Amplifier Parameter Override (APO): This widget does not contain amplifier parameters. Output Amplifier Present (OAP): Output amplifier is not present for this widget. Input Amplifier Present (IAP): Input amplifier is not present for this widget. Stereo (ST): A 1 indicates a stereo widget. 4 Read Only 1b 3 2 1 0 Read Only Read Only Read Only Read Only 0b 0b 0b 1b DS880F1 69 CS4207 6.7.2 Supported PCM Size, Rates Get Parameter Command Format: Bits [31:28] CAd = X Bits [27:20] S/P Tx 1 Node ID=08h S/P Tx 2 Node ID=14h Bits [19:8] Verb ID = F00h Bits [7:0] Parameter ID = 0Ah Response Format: Bits 31:21 20 19 18 17 16 15:12 11 10 9 8 7 6 5 4 3 2 1 0 Type Read Only Read Only Read Only Read Only Read Only Read Only Read Only Read Only Read Only Read Only Read Only Read Only Read Only Read Only Read Only Read Only Read Only Read Only Read Only Default 00000000000b 1b 1b 1b 1b 0b 0h 0b 1b 1b 1b 1b 1b 1b 1b 0b 0b 0b 0b Reserved 32-Bit (32B): 32-bit audio format is supported. 24-Bit (24B): 24-bit audio format is supported. 20-Bit (20B): 20-bit audio format is supported. 16-Bit (16B): 16-bit audio format is supported. 8-Bit (8B): 8-bit audio format is not supported. Description Reserved Rate-12 (R12): 384 kHz (48*8) rate is not supported. Rate-11 (R11):192.0 kHz(48*4) rate is supported. Rate-10 (R10):176.4 kHz(44.1*4) rate is supported. Rate-9 (R9): 96.0 kHz (48*2) rate is supported. Rate-8 (R8): 88.2 kHz (44.1*2) rate is supported. Rate-7 (R7): 48.0 kHz rate is supported. Rate-6 (R6): 44.1 kHz rate is supported. Rate-5 (R5): 32.0 kHz (48*2/3) rate is supported. Rate-4 (R4): 22.05 kHz (44.1/2) rate is not supported. Rate-3 (R3): 16.0 kHz (48/3) rate is not supported Rate-2 (R2): 11.025 kHz (44.1/4) rate is not supported. Rate-1 (R1): 8.0 kHz (48/6) rate is not supported. 6.7.3 Supported Stream Formats Get Parameter Command Format: Bits [31:28] CAd = X Bits [27:20] S/P Tx 1 Node ID=08h S/P Tx 2 Node ID=14h Bits [19:8] Verb ID = F00h Bits [7:0] Parameter ID = 0Bh Response Format: Bits 31:3 2 1 Type Read Only Read Only Read Only Default 0 1b 0b Reserved AC-3 (AC3): AC-3 data is supported. Float32 (FLT32): Float32 formatted data is not supported on this widget. Description 70 DS880F1 CS4207 0 Read Only 1b Pulse Code Modulation (PCM): PCM formatted data is supported on this widget. 6.7.4 Supported Power States Get Parameter Command Format: Bits [31:28] CAd = X Bits [27:20] S/P Tx 1 Node ID=08h S/P Tx 2 Node ID=14h Bits [19:8] Verb ID = F00h Bits [7:0] Parameter ID = 0Fh Response Format: Bits 31 Type Read Only Default 1b Description EPSS Supported. Indicates that the converter supports additional capabilities allowing better low power operation. Reserved Reserved D4 is not Supported D3 is Supported. Since Extended Power States is also supported then the maximum exit time back to fully functional is 10 milliseconds. This is measured from the response to the Set Power State verb that caused the transition from D3 back to fully operational D0 state. D2 is not Supported D1 is not Supported D0 Supported 30 29:5 4 3 Read Only Read Only Read Only Read Only 0b 000000h 0b 1b 2 1 0 Read Only Read Only Read Only 0b 0b 1b 6.7.5 Power States Get Parameter Command Format: Bits [31:28] CAd = X Bits [27:20] S/P Tx 1 Node ID=08h S/P Tx 2 Node ID=14h Bits [19:8] Verb ID = F05h Bits [7:0] Parameter ID = 00h Set Parameter Command Format: Bits [31:28] CAd = X Bits [27:20] S/P Tx 1 Node ID=08h S/P Tx 2 Node ID=14h Bits [19:8] Verb ID = 705h Bits [7:0] Parameter ID = 0xh Response Format: Bits 31:11 Type Read Only Default 00000h Reserved Description DS880F1 71 CS4207 Power State Settings Reset(PS-SettingsReset): This bit is set to ‘1’b when, during any type of reset or low power state transition, the settings within this widget that were changed from the defaults, either by software or hardware, have been reset back to their default state. When these settings have not been reset, this is reported as ‘0’b. This bit is always a ‘1’b following a POR condition. For more information, 10 Read Only 1b see “Power State Settings Reset (PS-SettingsReset)” on p 27 9 8 7:4 Read Only Read Only Read Only 0b 0b 0011b Power State Clock Stop OK(PS-ClkStopOK): This bit is not supported and will always return ‘0’b when read. Power State Error (PS-Error): This bit is not supported and will always return ‘0’b when read. Power State Actual (PS-Act): This field indicates the actual power state of the referenced node. The default state is D3. Power State Set (PS-Set): Writes to these bits set the Audio Function Group to the Power State as described below: PSS = ’0000’b; D0 - Fully on. PSS = ‘0001’b; D1 - Not Supported PSS = ‘0010’b; D2 - Not Supported PSS = ‘0011’b; D3 - Allows for lowest possible power consumption under software control. See “D3 Lower Power State Support” on page 25 for more information. PSS = ‘0100’b; D4 - Not Supported 3:0 Read/Write 0011b PS-Set is a PowerState field which defines the current power setting of the referenced node. Since this node is of type other than an Audio Function Group node, the actual power state is a function of both this setting and the PowerState setting of the Audio Function Group node under which this node was enumerated (is controlled). PS-Act is a PowerState field which indicates the actual power state of this node. Within the Audio Function Group node, this field will always be equal to the PS-Set field (modulo the time required to execute a power state transition). Within this type of node, this field will be the lower power consuming state of either a) the PS-Set field of the currently referenced node or b) the PS-Set field of the Audio Function Group node under which the currently referenced node was enumerated (is controlled). 6.7.6 Converter Stream, Channel Get Parameter Command Format: Bits [31:28] CAd = X Bits [27:20] S/P Tx 1 Node ID=08h S/P Tx 2 Node ID=14h Bits [19:8] Verb ID = F06h Bits [7:0] Parameter ID = 00h Set Parameter Command Format: Bits [31:28] CAd = X Bits [27:20] S/P Tx 1 Node ID=08h S/P Tx 2 Node ID=14h Bits [19:8] Verb ID = 706h Bits [7:0] Parameter ID = xxh 72 DS880F1 CS4207 Response Format: Bits 31:8 Type Read Only Default 000000h Description Reserved Stream Number (SN): Indicates the stream number used by the Output Converter. “0h” is stream 0, “1h” is stream 1, etc. By convention, stream 0 is reserved and unused so that converter whose stream number has been reset to “0h” does not unintentionally decode data not intended for them. Lowest Channel Number (LCN): Indicates the lowest channel used by the Output Converter. The stereo converter will use this LCN value plus 1 for its left and right channel. 7:4 Read/Write 0h 3:0 Read/Write 0h 6.7.7 Converter Format Get Parameter Command Format: Bits [31:28] CAd = X Bits [27:20] S/P Tx 1 Node ID=08h S/P Tx 2 Node ID=14h Bits [19:8] Verb ID = A00h Bits [7:0] Parameter ID = 00h Set Parameter Command Format: Bits [31:28] CAd = X Bits [27:20] S/P Tx 1 Node ID=08h S/P Tx 2 Node ID=14h Bits [19:8] Verb ID = 2xxh Bits [7:0] Parameter ID = xxh Response Format: Bits [15:0] must be programmed by software with the same value programmed into the Stream Descriptor, so that the data format being transmitted on the link matches what is expected by the consumer of the data. If the TYPE is set to Non-PCM, the controller pushes data over the link and is not concerned with formatting. The base rate, data type, and number of Words (MULT) to send each valid frame are specified to control the rate at which the non-PCM data is sent. Bits 31:16 Type Read Only Default 0000h Reserved Description Stream Type (TYPE): If TYPE is non-zero, the other bits in the format structure have other meanings. 0: PCM 1: Non-PCM Sample Base Rate (BASE): 0 = 48 kHz 1 = 44.1 kHz Sample Base Rate Multiple (MULT): 000 = 48 kHz/44.1 kHz or less 001 = x2 (96 kHz, 88.2 kHz, 32 kHz) 010 = x3 (144 kHz) 011 = x4 (192 kHz, 176.4 kHz) 100-111 = Reserved 15 Read/Write 0b 14 Read/Write 0b 13:11 Read/Write 000b DS880F1 73 CS4207 Sample Base Rate Divisor (DIV): 000 = Divide by 1 (48 kHz, 44.1 kHz) 001 = Divide by 2 (24 kHz, 22.05 kHz) 010 = Divide by 3 (16 kHz, 32 kHz) 011 = Divide by 4 (11.025 kHz) 100 = Divide by 5 (9.6 kHz) 101 = Divide by 6 (8 kHz) 110 = Divide by 7 111 = Divide by 8 (6 kHz) 10:8 Read/Write 000b 7 Read Only 0b Reserved Bits per Sample (BITS): Number of bits in each sample: 000 = 8 bits. The data will be packed in memory in 8-bit containers on 16-bit boundaries. 001 = 16 bits. The data will be packed in memory in 16-bit containers on 16-bit boundaries. 010 = 20 bits. The data will be packed in memory in 32-bit containers on 32-bit boundaries. 011 = 24 bits. The data will be packed in memory in 32-bit containers on 32-bit boundaries. 100 = 32 bits. The data will be packed in memory in 32-bit containers on 32-bit boundaries. 101-111 = Reserved Number of Channels (CHAN): Number of channels in each frame of the stream: 0000 = 1 0001 = 2 … 1111 = 16 6:4 Read/Write 000b 3:0 Read/Write 0000b 74 DS880F1 CS4207 6.7.8 Digital Converter Control Get Parameter Command Format: Bits [31:28] CAd = X Bits [27:20] S/P Tx 1 Node ID=08h S/P Tx 2 Node ID=14h Bits [19:8] Verb ID = F0D/** Bits [7:0] Parameter ID = 00h ** Note: Address F0Eh is not supported. Set Parameter Command Format: Bits [31:28] CAd = X Bits [27:20] S/P Tx 1 Node ID=08h S/P Tx 2 Node ID=14h Bits [19:8] Verb ID =70D Verb ID =70E Bits [7:0] Parameter ID = Bits[7:0] Parameter ID = Bits[15:8] Response Format: The S/PDIF IEC Control (SIC) bits are supported in one of two ways. In the first case referred to as “Codec Formatted SPDIF,” if a PCM bit stream of less than 32 bits is specified in the Converter Format control, then the S/PDIF Control bits, including the “V,” “PRE,” “/AUDIO,” and other such bits are embedded in the stream by the codec using the values (SIC bits) from the Digital Converter Control. In the second case referred to as “Software Formatted (or Raw) SPDIF,” if a 32-bit stream is specified in the Converter Format control, the S/PDIF IEC Control (SIC) bits are assumed to be embedded in the stream by software, and the raw 32-bit stream is transferred on the link with no modification by the codec. However, the codec must properly interpret the Sync Preamble bits of the stream and then send the appropriately coded preamble. The IEC60958 specification, Section 4.3, “Preambles,” defines the preambles and the coding to be used. Software will specify the “B,” “M,” or “W” (also known as “X,” “Y,” or “Z”) preambles by encoding the last four bits of the preamble into the Sync Preamble section (bits 0-3) of the frame. The codec must examine the bits specified and encode the proper preamble based on the previous state. The previous state is to be maintained by the codec hardware. Bits 31:16 15 14:8 7 6 5 4 3 Type Read Only Read Only Read/Write Read/Write Read/Write Read/Write Read/Write Read/Write Default 0000h 0b 0000000b 0b 0b 0b 0b 0b Description Reserved Reserved CC[6:0] (Category Code): Programmed according to IEC standards, or as appropriate. L (Generation Level): Programmed according to IEC standards, or as appropriate. PRO (Professional): 1 indicates Professional use of channel status; 0 indicates Consumer. /AUDIO (Non-Audio): 1 indicates data is nonPCM format; 0 indicates data is PCM. COPY (Copyright): 1 indicates copyright is asserted; 0 indicates copyright is not asserted. PRE (Pre-emphasis): 1 indicates filter preemphasis is 50/15 µs; 0 pre-emphasis is none. DS880F1 75 CS4207 VCFG (Validity Config.): Determines S/PDIF transmitter behavior when data is not being transmitted. When asserted, this bit forces the de-assertion of the S/PDIF “Validity” flag, which is bit 28 transmitted in each S/PDIF subframe. This bit is only defined for Output Converters and is defined as Reserved, with a Read Only value of 0 for Input Converters.  If “V” = 0 and “VCFG”=0, then for each S/PDIF subframe (Left and Right) bit[28] “Validity” flag reflects whether or not an internal codec error has occurred (specifically whether the S/PDIF interface received and transmitted a valid sample from the High Definition Audio Link). If a valid sample (Left or Right) was received and successfully transmitted, the “Validity” flag should be 0 for that subframe. Otherwise, the “Validity” flag for that subframe should be transmitted as “1.”  If “V” = 0 and “VCFG” = 1, then for each S/PDIF subframe (Left and Right), bit[28] “Validity” flag reflects whether or not an internal codec transmission error has occurred. Specifically, an internal codec error should result in the “Validity” flag being set to 1. In the case where the S/PDIF transmitter is not receiving a sample or does not receive a valid sample from the High Definition Audio Controller (Left or Right), the S/PDIF transmitter should set the S/PDIF “Validity” flag to 0 and pad each of the S/PDIF “Audio Sample Word” in question with 0’s for the subframe in question. If a valid sample (Left or Right) was received and successfully transmitted, the “Validity” flag should be 0 for that subframe.  If “V” = 1 and “VCFG” = 0, then each S/PDIF subframe (Left and Right) should have bit[28] “Validity” flag = 1. This tags all S/PDIF subframes as invalid.  “V” = 1 and “VCFG” = 1 state is reserved for future use.  Default state, coming out of reset, for “V” and “VCFG” should be 0 and 0 respectively. V (Validity): This bit affects the “Validity flag,” bit[28] transmitted in each subframe, and enables the S/PDIF transmitter to maintain connection during error or mute conditions. The behavior of the S/PDIF transmitter with respect to this bit depends on the value of the “VCFG” bit. DigEn (Digital Enable): Enables or disables digital transmission. A 1 indicates that the digital data can pass through the node. A 0 indicates that the digital data is blocked from passing through the node, regardless of the state. 2 Read/Write 0b 1 Read/Write 0b 0 Read/Write 0b 76 DS880F1 CS4207 6.8 6.8.1 Headphone Pin Widget (Node ID = 09h) Audio Widget Capabilities Get Parameter Command Format: Bits [31:28] CAd = X Bits [27:20] Node ID = 09h Bits [19:8] Verb ID = F00h Bits [7:0] Parameter ID = 09h Response Format: Bits 31:24 23:20 19:16 15:12 11 10 9 8 7 6 5 4 3 2 1 0 Type Read Only Read Only Read Only Read Only Read Only Read Only Read Only Read Only Read Only Read Only Read Only Read Only Read Only Read Only Read Only Read Only Default 00h 4h 1h 0h 0b 1b 0b 1b 1b 0b 0b 0b 0b 0b 0b 1b Reserved Type (TYP): Pin Complex Widget Delay (DLY): Number of sample delays through the widget. Description Reserved L-R Swap (LRS): This widget is not capable of swapping the left and right channels. Power Control (PC): Power State control is supported on this widget. Digital (DIG): Widget is not a digital widget. Connection List (CL): A connection list is present on this widget. Unsolicited Capable (UC): Unsolicited Response is supported on this widget. Processing Widget (PW): This widget does not contain “Processing Controls” parameters. Stripe (STRP): Stripping is not supported. Format Override (FO): This widget does not contain format information. Amplifier Parameter Override (APO): This widget does not contain amplifier parameters. Output Amplifier Present (OAP): Output amplifier is not present for this widget. Input Amplifier Present (IAP): Input amplifier is not present for this widget. Stereo (ST): A 1 indicates a stereo widget. 6.8.2 Pin Capabilities Get Parameter Command Format: Bits [31:28] CAd = X Bits [27:20] Node ID = 09h Bits [19:8] Verb ID = F00h Bits [7:0] Parameter ID = 0Ch Response Format: Bits 31:17 16 15:8 Type Read Only Read Only Read Only Default 0 0b 00h Reserved EAPD Capable (EAPDC): EAPD not supported. VREF Control (VREFC): VREF generation is not supported by this widget. Description DS880F1 77 CS4207 7 6 5 4 3 2 1 0 Read Only Read Only Read Only Read Only Read Only Read Only Read Only Read Only 0h 0b 0b 1b 1b 1b 0b 0b HDMI Capable (HDMIC): Does not support HDMI. Balanced I/O Pins (BIOP): This widget does not have balanced I/O pins. Input Capable (INC): Is not input capable. Output Capable (OUTC): This bit is ‘1’ to indicate that the widget is output capable. Headphone Drive Capable (HDC): Widget is capable of driving headphones directly. Presence Detect Capable (PDC): A ‘1’ indicates the widget is capable of performing presence detect. Trigger Required (TR): Trigger is not required for an impedance measurement. Impedance Sense Capable (ISC): This bit is ‘0’ to indicate that the widget does not support impedance sense on the attached peripheral. 6.8.3 Connection List Length Get Parameter Command Format: Bits [31:28] CAd = X Bits [27:20] Node ID = 09h Bits [19:8] Verb ID = F00h Bits [7:0] Parameter ID = 0Eh Response Format: Bits 31:8 7 6:0 Type Read Only Read Only Read Only Default 000000h 0b 0000001b Reserved Long Form (LF): Connection list is short form. Connection List Length (CLL): One hard-wired input for this widget. Description 6.8.4 Supported Power States Get Parameter Command Format: Bits [31:28] CAd = X Bits [27:20] Node ID = 09h Bits [19:8] Verb ID = F00h Bits [7:0] Parameter ID = 0Fh Response Format: Bits 31 Type Read Only Default 1b Description EPSS Supported. Indicates that this pin wid- get supports additional capabilities allowing better low power operation. 30 29:5 4 3 Read Only Read Only Read Only Read Only 0b 000000h 0b 1b Reserved Reserved D4 is not Supported D3 is Supported. Since Extended Power States is also supported, the pin widget will maintain the ability to generate an Unsolicited Response (if this function is enabled) while in the D3 state. 78 DS880F1 CS4207 2 1 0 Read Only Read Only Read Only 0b 0b 1b D2 is not Supported D1 is not Supported D0 Supported 6.8.5 Connection List Entry Get Parameter Command Format: Bits [31:28] CAd = X Bits [27:20] Node ID = 09h Bits [19:8] Verb ID = F02h Bits [7:0] Parameter ID = N=00h Response Format: Bits 31:24 23:16 15:8 7:0 Type Read Only Read Only Read Only Read Only Default 00h 00h 00h 02h Description Connection List Entry (N+3): Returns 00h for N=00h-03h or N>03h. Connection List Entry (N+2): Returns 00h for N=00h-03h or N>03h. Connection List Entry (N+1): Returns 00h for N=00h-03h or N>03h. Connection List Entry (N): Returns 02h (DAC1) for N=00h-03h. Returns 00h for N>03h. 6.8.6 Power States Get Parameter Command Format: Bits [31:28] CAd = X Bits [27:20] Node ID = 09h Bits [19:8] Verb ID = F05h Bits [7:0] Parameter ID = 00h Set Parameter Command Format: Bits [31:28] CAd = X Bits [27:20] Node ID = 09h Bits [19:8] Verb ID = 705h Bits [7:0] Parameter ID = 0xh Response Format: Bits 31:11 Type Read Only Default 00000h Reserved Power State Settings Reset(PS-SettingsReset): This bit is set to ‘1’b when, during any type of reset or low power state transition, the settings within this widget that were changed from the defaults, either by software or hardware, have been reset back to their default state. When these settings have not been reset, this is reported as ‘0’b. This bit is always a ‘1’b following a POR condition. For more information, Description 10 Read Only 1b see “Power State Settings Reset (PS-SettingsReset)” on p 27 9 Read Only 0b Power State Clock Stop OK(PS-ClkStopOK): This bit is not supported and will always return ‘0’b when read. DS880F1 79 CS4207 8 7:4 Read Only Read Only 0b 0011b Power State Error (PS-Error): This bit is not supported and will always return ‘0’b when read. Power State Actual (PS-Act): This field indicates the actual power state of the referenced node. The default state is D3. Power State Set (PS-Set): Writes to these bits set the Audio Function Group to the Power State as described below: PSS = ’0000’b; D0 - Fully on. PSS = ‘0001’b; D1 - Not Supported PSS = ‘0010’b; D2 - Not Supported PSS = ‘0011’b; D3 - Allows for lowest possible power consumption under software control. See “D3 Lower Power State Support” on page 25 for more information. PSS = ‘0100’b; D4 - Not Supported 3:0 Read/Write 0011b PS-Set is a PowerState field which defines the current power setting of the referenced node. Since this node is of type other than an Audio Function Group node, the actual power state is a function of both this setting and the PowerState setting of the Audio Function Group node under which this node was enumerated (is controlled). PS-Act is a PowerState field which indicates the actual power state of this node. Within the Audio Function Group node, this field will always be equal to the PS-Set field (modulo the time required to execute a power state transition). Within this type of node, this field will be the lower power consuming state of either a) the PS-Set field of the currently referenced node or b) the PS-Set field of the Audio Function Group node under which the currently referenced node was enumerated (is controlled). 6.8.7 Pin Widget Control Get Parameter Command Format: Bits [31:28] CAd = X Bits [27:20] Node ID = 09h Bits [19:8] Verb ID = F07h Bits [7:0] Parameter ID = 00h Set Parameter Command Format: Bits [31:28] CAd = X Response Format: Bits 31:8 Type Read Only Default 0000h Reserved H-Phone Enable (HPE): This bit has no affect on the output path. Per HD Audio spec, a ‘1’ enables a low impedance amplifier associated with the output. When ‘0’, this bit disables a low impedance amplifier associated with the output. Output Enable (OUTE): This bit has no affect on the output path. Per HD Audio spec, a ‘1’ enables the output path of the Pin Widget. When ‘0’, the output path of the Pin Widget is shut off. Input Enable (INE): Set to ‘0’ since there is no input path associated with the pin widget. Bits [27:20] Node ID = 09h Bits [19:8] Verb ID = 707h Bits [7:0] Parameter ID = xxh Description 7 Read/Write 0b 6 Read/Write 0b 5 4:3 Read Only Read Only 0b 00b Reserved 80 DS880F1 CS4207 VREF Enable (VREFE): This field selects one of the possible states for the VREF signal(s). The Pin Widget does not support VREF generation as indicated in the Pin Capabilities. As such, this field will always be “000b” to select Hi-Z state. 2:0 Read Only 000b 6.8.8 Unsolicited Response Control Get Parameter Command Format: Bits [31:28] CAd = X Bits [27:20] Node ID = 09h Bits [19:8] Verb ID = F08h Bits [7:0] Parameter ID = 00h Set Parameter Command Format: Bits [31:28] CAd = X Response Format Bits [27:20] Node ID = 09h Bits [19:8] Verb ID = 708h Bits [7:0] Parameter ID = xxh[ Bits [31:0] are sticky and will not be reset by a Link Reset or a Function Group Reset: Bits 31:8 7 6 Type Read Only Read/Write Read Only Default 000000h 0b 0b Reserved Enable: Controls the actual generation of Unsolicited Responses. 1 is enable; 0 is disable. Description Reserved Tag: Is a 6 bit value assigned and used by software to determine what codec node generated the unsolicited response. The value programmed into the Tag field is returned in the top 6 bits (31:26) of every Unsolicited Response generated by this node. 5:0 Read/Write 000000b Unsolicited Response Format : Bits [31:26] Tag Bits [27:0] Response 6.8.9 Pin Sense Get Parameter Command Format: Bits [31:28] CAd = X Bits [27:20] Node ID = 09h Bits [19:8] Verb ID = F09h Bits [7:0] Parameter ID = 00h Set Parameter Command Format: Bits [31:28] CAd = X Get Response Format: Bits 31 Type Read Only Default 0b Description Presence Detect (PDET): A ‘1’ indicates that something is plugged into the jack associated with the Pin Widget. A ‘0’ indicates that nothing is plugged in. Bits [27:20] Node ID = 09h Bits [19:8] Verb ID = 709h Bits [7:0] Parameter ID = xxh DS880F1 81 CS4207 30:0 Read Only 0 Impedance Sense (IMPS): Not valid since the widget is not capable of impedance sensing. Set Parameter ID [7:0] Format: Bits 7:1 0 Type Write Only Write Only Default 0000000b 0b Reserved Right Channel (RCHAN): The write to this bit is ignored since the widget is not capable of impedance sensing. Description 82 DS880F1 CS4207 6.8.10 Configuration Default The Configuration Default register is used by software as an aid in determining the configuration of jacks and devices attached to the codec. At the time the codec is first powered on, this register is internally loaded with default values indicating the typical system use of this particular pin/jack. After this initial loading, it is completely codec opaque, and its state, including any software writes into the register, must be preserved across reset events such as LINK Reset or Codec Reset (the Function Reset Verb). Its state need not be preserved across power level changes. Get Parameter Command Format: Bits [31:28] CAd = X Bits [27:20] Node ID = 09h Bits [19:8] Verb ID = F1Ch Bits [7:0] Parameter ID = 00h Set Parameter Command Format: Bits [31:28] CAd = X Bits [27:20] Node ID = 09h Bits [19:8] Verb ID = 71Ch Verb ID = 71Dh Verb ID = 71Eh Verb ID = 71Fh Bits [7:0] Parameter ID = xxh[7:0] Parameter ID = xxh[15:8] Parameter ID = xxh[23:16] Parameter ID = xxh[31:24] Response Format Bits [31:0] are sticky and will not be reset by a Link Reset or a Codec Reset: Bits 31:30 Type Read/Write Default 00b Description Port Connectivity (PCON): The external connectivity of this Pin Widget is a jack. Location (LOC): This field indicates the physical location of the jack or device to which the pin complex is connected. Set to External Front Panel. Default Device (DD): Indicates the intended use of the jack is for headphone. Connection Type (CTYP): Indicates the type of physical connection is an 1/8” jack. Color (COL): This field indicates the color of the physical jack for use by software. The color selected is green. Miscellaneous (MISC): No PDC override. Default Association (DA): This field is used by software to group Pin Complex (and therefore jacks) together into functional blocks to support multichannel operation. All jacks with the same association number may be assumed to be grouped together. A value of all ‘0’s is reserved. A value of all ‘1’s in this field indicates that the Association has the lowest priority. Sequence (SEQ): This field indicates the order of the jacks in the association group. 29:24 Read/Write 000010b 23:20 19:16 15:12 11:8 Read/Write Read/Write Read/Write Read/Write 2h 1h 4h 0h 7:4 Read/Write Fh 3:0 Read/Write 0h DS880F1 83 CS4207 6.9 6.9.1 Line Out 1 Pin Widget (Node ID = 0Ah) Audio Widget Capabilities Get Parameter Command Format: Bits [31:28] CAd = X Bits [27:20] Node ID = 0Ah Bits [19:8] Verb ID = F00h Bits [7:0] Parameter ID = 09h Response Format: Bits 31:24 23:20 19:16 15:12 11 10 9 8 7 6 5 4 3 2 1 0 Type Read Only Read Only Read Only Read Only Read Only Read Only Read Only Read Only Read Only Read Only Read Only Read Only Read Only Read Only Read Only Read Only Default 00h 4h 1h 0h 0b 1b 0b 1b 1b 0b 0b 0b 0b 0b 0b 1b Reserved Type (TYP): Pin Complex Widget Delay (DLY): Number of sample delays through the widget. Description Reserved L-R Swap (LRS): This widget is not capable of swapping the left and right channels. Power Control (PC): Power State control is supported on this widget. Digital (DIG): Widget is not a digital widget. Connection List (CL): A connection list is present on this widget. Unsolicited Capable (UC): Unsolicited Response is supported on this widget. Processing Widget (PW): This widget does not contain “Processing Controls” parameters. Stripe (STRP): Stripping is not supported. Format Override (FO): This widget does not contain format information. Amplifier Parameter Override (APO): This widget does not contain amplifier parameters. Output Amplifier Present (OAP): Output amplifier is not present for this widget. Input Amplifier Present (IAP): Input amplifier is not present for this widget. Stereo (ST): A 1 indicates a stereo widget. 84 DS880F1 CS4207 6.9.2 Pin Capabilities Get Parameter Command Format: Bits [31:28] CAd = X Bits [27:20] Node ID = 0Ah Bits [19:8] Verb ID = F00h Bits [7:0] Parameter ID = 0Ch Response Format: Bits 31:17 16 15:8 7 6 5 4 3 2 1 0 Type Read Only Read Only Read Only Read Only Read Only Read Only Read Only Read Only Read Only Read Only Read Only Default 0 0b 00h 0h 1b 0b 1b 0b 1b 0b 0b Reserved EAPD Capable (EAPDC): Indicates the widget does not support the EAPD pin. VREF Control (VREFC): VREF generation is not supported by this widget. HDMI Capable (HDMIC): This widget is not capable of supporting HDMI. Balanced I/O Pins (BIOP): This widget has balanced I/O pins. Input Capable (INC): The widget is not input capable. Output Capable (OUTC): This bit is ‘1’ to indicate that the widget is output capable. Headphone Drive Capable (HDC): Widget is not capable of driving headphones directly. Presence Detect Capable (PDC): This bit is ‘1’ to indicate that the widget is capable of performing presence detect. Trigger Required (TR): Trigger is not required for an impedance measurement. Impedance Sense Capable (ISC): This bit is ‘0’ to indicate that the widget does not support impedance sense on the attached peripheral. Description 6.9.3 Connection List Length Get Parameter Command Format: Bits [31:28] CAd = X Bits [27:20] Node ID = 0Ah Bits [19:8] Verb ID = F00h Bits [7:0] Parameter ID = 0Eh Response Format: Bits 31:8 7 6:0 Type Read Only Read Only Read Only Default 000000h 0b 0000001b Reserved Long Form (LF): Connection list is short form. Connection List Length (CLL): One hard-wired input for this widget. Description DS880F1 85 CS4207 6.9.4 Supported Power States Get Parameter Command Format: Bits [31:28] CAd = X Bits [27:20] Node ID = 0Ah Bits [19:8] Verb ID = F00h Bits [7:0] Parameter ID = 0Fh Response Format: Bits 31 Type Read Only Default 1b Description EPSS Supported. Indicates that this pin widget supports additional capabilities allowing better low power operation. Reserved Reserved D4 is not Supported D3 is Supported. Since Extended Power States is also supported, the pin widget will maintain the ability to generate an Unsolicited Response (if this function is enabled) while in the D3 state. D2 is not Supported D1 is not Supported D0 Supported 30 29:5 4 3 Read Only Read Only Read Only Read Only 0b 000000h 0b 1b 2 1 0 Read Only Read Only Read Only 0b 0b 1b 6.9.5 Connection List Entry Get Parameter Command Format: Bits [31:28] CAd = X Bits [27:20] Node ID = 0Ah Bits [19:8] Verb ID = F02h Bits [7:0] Parameter ID = N=00h Response Format: Bits 31:24 23:16 15:8 7:0 Type Read Only Read Only Read Only Read Only Default 00h 00h 00h 03h Description Connection List Entry (N+3): Returns 00h for N=00h-03h or N>03h. Connection List Entry (N+2): Returns 00h for N=00h-03h or N>03h. Connection List Entry (N+1): Returns 00h for N=00h-03h or N>03h. Connection List Entry (N): Returns 03h (DAC2) for N=00h-03h. Returns 00h for N>03h. 6.9.6 Power States Get Parameter Command Format: Bits [31:28] CAd = X Bits [27:20] Node ID = 0Ah Bits [19:8] Verb ID = F05h Bits [7:0] Parameter ID = 00h Set Parameter Command Format: Bits [31:28] CAd = X Bits [27:20] Node ID = 0Ah Bits [19:8] Verb ID = 705h Bits [7:0] Parameter ID = 0xh 86 DS880F1 CS4207 Response Format: Bits 31:11 Type Read Only Default 00000h Reserved Power State Settings Reset(PS-SettingsReset): This bit is set to ‘1’b when, during any type of reset or low power state transition, the settings within this widget that were changed from the defaults, either by software or hardware, have been reset back to their default state. When these settings have not been reset, this is reported as ‘0’b. This bit is always a ‘1’b following a POR condition. For more information, Description 10 Read Only 1b see “Power State Settings Reset (PS-SettingsReset)” on p 27 9 8 7:4 Read Only Read Only Read Only 0b 0b 0011b Power State Clock Stop OK(PS-ClkStopOK): This bit is not supported and will always return ‘0’b when read. Power State Error (PS-Error): This bit is not supported and will always return ‘0’b when read. Power State Actual (PS-Act): This field indicates the actual power state of the referenced node. The default state is D3. Power State Set (PS-Set): Writes to these bits set the Audio Function Group to the Power State as described below: PSS = ’0000’b; D0 - Fully on. PSS = ‘0001’b; D1 - Not Supported PSS = ‘0010’b; D2 - Not Supported PSS = ‘0011’b; D3 - Allows for lowest possible power consumption under software control. See “D3 Lower Power State Support” on page 25 for more information. PSS = ‘0100’b; D4 - Not Supported 3:0 Read/Write 0011b PS-Set is a PowerState field which defines the current power setting of the referenced node. Since this node is of type other than an Audio Function Group node, the actual power state is a function of both this setting and the PowerState setting of the Audio Function Group node under which this node was enumerated (is controlled). PS-Act is a PowerState field which indicates the actual power state of this node. Within the Audio Function Group node, this field will always be equal to the PS-Set field (modulo the time required to execute a power state transition). Within this type of node, this field will be the lower power consuming state of either a) the PS-Set field of the currently referenced node or b) the PS-Set field of the Audio Function Group node under which the currently referenced node was enumerated (is controlled). 6.9.7 Pin Widget Control Get Parameter Command Format: Bits [31:28] CAd = X Bits [27:20] Node ID = 0Ah Bits [19:8] Verb ID = F07h Bits [7:0] Parameter ID = 00h Set Parameter Command Format: Bits [31:28] Bits [27:20] Bits [19:8] Bits [7:0] DS880F1 87 CS4207 CAd = X Response Format: Bits 31:8 7 Type Read Only Read Only Default 0000h 0b Reserved H-Phone Enable (HPE): Set to ‘0’ since there is no low impedance amplifier associated with this pin widget. Output Enable (OUTE): This bit has no affect on the output path. Per HD Audio spec, a ‘1’ enables the output path of the Pin Widget. When ‘0’, the output path of the Pin Widget is shut off. Input Enable (INE): Set to ‘0’ since there is no input path associated with the pin widget. Node ID = 0Ah Verb ID = 707h Parameter ID = xxh Description 6 Read/Write 0b 5 4:3 2:0 Read Only Read Only Read Only 0b 00b 000b Reserved VREF Enable (VREFE): The Pin Widget does not support VREF generation as indicated in the Pin Capabilities. As such, this field should always be “000b” to select the Hi-Z state. 6.9.8 Unsolicited Response Control Get Parameter Command Format: Bits [31:28] CAd = X Bits [27:20] Node ID = 0Ah Bits [19:8] Verb ID = F08h Bits [7:0] Parameter ID = 00h Set Parameter Command Format: Bits [31:28] CAd = X Response Format Bits [27:20] Node ID = 0Ah Bits [19:8] Verb ID = 708h Bits [7:0] Parameter ID = xxh[ Bits [31:0] are sticky and will not be reset by a Link Reset or a Function Group Reset: Bits 31:8 7 6 Type Read Only Read/Write Read Only Default 000000h 0b 0b Reserved Enable: Controls the actual generation of Unsolicited Responses. 1 is enable; 0 is disable. Description Reserved Tag: Is a 6 bit value assigned and used by software to determine what codec node generated the unsolicited response. The value programmed into the Tag field is returned in the top 6 bits (31:26) of every Unsolicited Response generated by this node. 5:0 Read/Write 000000b Unsolicited Response Format : Bits [31:26] Tag Bits [27:0] Response 88 DS880F1 CS4207 6.9.9 Pin Sense Get Parameter Command Format: Bits [31:28] CAd = X Bits [27:20] Node ID = 0Ah Bits [19:8] Verb ID = F09h Bits [7:0] Parameter ID = 00h Set Parameter Command Format: Bits [31:28] CAd = X Get Response Format: Bits 31 Type Read Only Default 0b Description Presence Detect (PDET): A ‘1’ indicates that there is “something” plugged into the jack associated with the Pin Widget. A ‘0’ indicates that nothing is plugged in. Impedance Sense (IMPS): Not valid since the widget is not capable of impedance sensing. Bits [27:20] Node ID = 0Ah Bits [19:8] Verb ID = 709h Bits [7:0] Parameter ID = xxh 30:0 Read Only 0 Set Parameter ID [7:0] Format: Bits 7:1 0 Type Write Only Write Only Default 0000000b 0b Reserved Right Channel (RCHAN): The write to this bit is ignored since the widget is not capable of impedance sensing. Description 6.9.10 EAPD/BTL Enable Get Parameter Command Format: Bits [31:28] CAd = X Bits [27:20] Node ID = 0Ah Bits [19:8] Verb ID = F0Ch Bits [7:0] Parameter ID = 00h Set Parameter Command Format: Bits [31:28] CAd = X Get Response Format: Bits 31:3 2 1 Type Read Only Read Only Read Only Default 0 0b 0b Reserved L-R Swap: Not valid since the widget is not capable of left/right swapping. EAPD: EAPD is not supported by this pin widget. BTL: controls the output configuration of a Pin Widget which has indicated support for balanced I/O (bit 6, Pin Capabilities Parameter). When this bit is 0, the output drivers are configured in normal, single-ended mode; when this bit is 1, they are configured in balanced mode. Bits [27:20] Node ID = 0Ah Bits [19:8] Verb ID = 70Ch Bits [7:0] Parameter ID = xxh Description 0 Read/Write 0b DS880F1 89 CS4207 6.9.11 Configuration Default The Configuration Default register is used by software as an aid in determining the configuration of jacks and devices attached to the codec. At the time the codec is first powered on, this register is internally loaded with default values indicating the typical system use of this particular pin/jack. After this initial loading, it is completely codec opaque, and its state, including any software writes into the register, must be preserved across reset events such as LINK Reset or Codec Reset (the Function Reset Verb). Its state need not be preserved across power level changes. Get Parameter Command Format: Bits [31:28] CAd = X Bits [27:20] Node ID = 0Ah Bits [19:8] Verb ID = F1Ch Bits [7:0] Parameter ID = 00h Set Parameter Command Format: Bits [31:28] CAd = X Bits [27:20] Node ID = 0Ah Bits [19:8] Verb ID = 71Ch Verb ID = 71Dh Verb ID = 71Eh Verb ID = 71Fh Bits [7:0] Parameter ID = xxh[7:0] Parameter ID = xxh[15:8] Parameter ID = xxh[23:16] Parameter ID = xxh[31:24] Response Format Bits [31:0] are sticky and will not be reset by a Link Reset or a Codec Reset: Bits 31:30 Type Read/Write Default 00b Description Port Connectivity (PCON): The external connectivity of this Pin Widget is a jack. Location (LOC): This field indicates the physical location of the jack or device to which the pin complex is connected. Set to External Rear Panel. Default Device (DD): Indicates the intended use of the jack is for Line Outs. Connection Type (CTYP): Indicates the type of physical connection is an 1/8” jack. Color (COL): This field indicates the color of the physical jack for use by software. The color selected is green. Miscellaneous (MISC): No PDC override. Default Association (DA): This field is used by software to group Pin Complex (and therefore jacks) together into functional blocks to support multichannel operation. All jacks with the same association number may be assumed to be grouped together. A value of all ‘0’s is reserved. A value of all ‘1’s in this field indicates that the Association has the lowest priority. Sequence (SEQ): This field indicates the order of the jacks in the association group. 29:24 Read/Write 000001b 23:20 19:16 15:12 11:8 Read/Write Read/Write Read/Write Read/Write 0h 1h 4h 0h 7:4 Read/Write Fh 3:0 Read/Write 0h 90 DS880F1 CS4207 6.10 Line Out 2 Pin Widget (Node ID = 0Bh) 6.10.1 Audio Widget Capabilities Get Parameter Command Format: Bits [31:28] CAd = X Bits [27:20] Node ID = 0Bh Bits [19:8] Verb ID = F00h Bits [7:0] Parameter ID = 09h Response Format: Bits 31:24 23:20 19:16 15:12 11 10 9 8 7 6 5 4 3 2 1 0 Type Read Only Read Only Read Only Read Only Read Only Read Only Read Only Read Only Read Only Read Only Read Only Read Only Read Only Read Only Read Only Read Only Default 00h 4h 1h 0h 0b 0b 0b 1b 0b 0b 0b 0b 0b 0b 0b 1b Reserved Type (TYP): Pin Complex Widget Delay (DLY): Number of sample delays through the widget. Description Reserved L-R Swap (LRS): This widget is not capable of swapping the left and right channels. Power Control (PC): Power State control is not supported on this widget. Digital (DIG): Widget is not a digital widget. Connection List (CL): A connection list is present on this widget. Unsolicited Capable (UC): Unsolicited Response is not supported on this widget. Processing Widget (PW): This widget does not contain “Processing Controls” parameters. Stripe (STRP): Stripping is not supported. Format Override (FO): This widget does not contain format information. Amplifier Parameter Override (APO): This widget does not contain amplifier parameters. Output Amplifier Present (OAP): Output amplifier is not present for this widget. Input Amplifier Present (IAP): Input amplifier is not present for this widget. Stereo (ST): A 1 indicates a stereo widget. DS880F1 91 CS4207 6.10.2 Pin Capabilities Get Parameter Command Format: Bits [31:28] CAd = X Bits [27:20] Node ID = 0Bh Bits [19:8] Verb ID = F00h Bits [7:0] Parameter ID = 0Ch Response Format: Bits 31:17 16 15:8 7 6 5 4 3 Type Read Only Read Only Read Only Read Only Read Only Read Only Read Only Read Only Default 0 0b 00h 0h 1b 0b 1b 0b Reserved EAPD Capable (EAPDC): Indicates the widget does support the EAPD pin. VREF Control (VREFC): VREF generation is not supported by this widget. HDMI Capable (HDMIC): This widget is not capable of supporting HDMI. Balanced I/O Pins (BIOP): This widget has balanced I/O pins. Input Capable (INC): The widget is not input capable. Output Capable (OUTC): This bit is ‘1’ to indicate that the widget is output capable. Headphone Drive Capable (HDC): Widget is not capable of driving headphones directly. Presence Detect Capable (PDC): This bit is ‘0’ to indicate that the widget is not capable of performing presence detect to determine whether there is anything plugged in. Trigger Required (TR): Trigger is not required for an impedance measurement. Impedance Sense Capable (ISC): This bit is ‘0’ to indicate that the widget does not support impedance sense on the attached peripheral. Description 2 Read Only 0b 1 0 Read Only Read Only 0b 0b 6.10.3 Connection List Length Get Parameter Command Format: Bits [31:28] CAd = X Bits [27:20] Node ID = 0Bh Bits [19:8] Verb ID = F00h Bits [7:0] Parameter ID = 0Eh Response Format: Bits 31:8 7 6:0 Type Read Only Read Only Read Only Default 000000h 0b 0000001b Reserved Long Form (LF): Connection list is short form. Connection List Length (CLL): One hard-wired input for this widget. Description 6.10.4 Connection List Entry Get Parameter Command Format: Bits [31:28] Bits [27:20] Bits [19:8] Bits [7:0] 92 DS880F1 CS4207 CAd = X Node ID = 0Bh Verb ID = F02h Parameter ID = N=00h Response Format: Bits 31:24 23:16 15:8 7:0 Type Read Only Read Only Read Only Read Only Default 00h 00h 00h 04h Description Connection List Entry (N+3): Returns 00h for N=00h-03h or N>03h. Connection List Entry (N+2): Returns 00h for N=00h-03h or N>03h. Connection List Entry (N+1): Returns 00h for N=00h-03h or N>03h. Connection List Entry (N): Returns 04h (DAC3) for N=00h-03h. Returns 00h for N>03h. 6.10.5 Pin Widget Control Get Parameter Command Format: Bits [31:28] CAd = X Bits [27:20] Node ID = 0Bh Bits [19:8] Verb ID = F07h Bits [7:0] Parameter ID = 00h Set Parameter Command Format: Bits [31:28] CAd = X Response Format: Bits 31:8 7 Type Read Only Read Only Default 0000h 0b Reserved H-Phone Enable (HPE): Set to ‘0’ since there is no low impedance amplifier associated with this pin widget. Output Enable (OUTE): This bit has no affect on the output path. Per HD Audio spec, a ‘1’ enables the output path of the Pin Widget. When ‘0’, the output path of the Pin Widget is shut off. Input Enable (INE): Set to ‘0’ since there is no input path associated with the pin widget. Bits [27:20] Node ID = 0Bh Bits [19:8] Verb ID = 707h Bits [7:0] Parameter ID = xxh Description 6 Read/Write 0b 5 4:3 2:0 Read Only Read Only Read Only 0b 00b 000b Reserved VREF Enable (VREFE): The Pin Widget does not support VREF generation as indicated in the Pin Capabilities. As such, this field should always be “000b” to select the Hi-Z state. DS880F1 93 CS4207 6.10.6 EAPD/BTL Enable Get Parameter Command Format: Bits [31:28] CAd = X Bits [27:20] Node ID = 0Bh Bits [19:8] Verb ID = F0Ch Bits [7:0] Parameter ID = 00h Set Parameter Command Format: Bits [31:28] CAd = X Get Response Format: Bits 31:3 2 1 Type Read Only Read Only Read Only Default 0 0b 0b Reserved L-R Swap: Not valid since the widget is not capable of left/right swapping. EAPD: EAPD is not supported by this pin widget. BTL: controls the output configuration of a Pin Widget which has indicated support for balanced I/O (bit 6, Pin Capabilities Parameter). When this bit is 0, the output drivers are configured in normal, single-ended mode; when this bit is 1, they are configured in balanced mode. Bits [27:20] Node ID = 0Bh Bits [19:8] Verb ID = 70Ch Bits [7:0] Parameter ID = xxh Description 0 Read/Write 0b 94 DS880F1 CS4207 6.10.7 Configuration Default The Configuration Default register is used by software as an aid in determining the configuration of jacks and devices attached to the codec. At the time the codec is first powered on, this register is internally loaded with default values indicating the typical system use of this particular pin/jack. After this initial loading, it is completely codec opaque, and its state, including any software writes into the register, must be preserved across reset events such as LINK Reset or Codec Reset (the Function Reset Verb). Its state need not be preserved across power level changes. Get Parameter Command Format: Bits [31:28] CAd = X Bits [27:20] Node ID = 0Bh Bits [19:8] Verb ID = F1Ch Bits [7:0] Parameter ID = 00h Set Parameter Command Format: Bits [31:28] CAd = X Bits [27:20] Node ID = 0Bh Bits [19:8] Verb ID = 71Ch Verb ID = 71Dh Verb ID = 71Eh Verb ID = 71Fh Bits [7:0] Parameter ID = xxh[7:0] Parameter ID = xxh[15:8] Parameter ID = xxh[23:16] Parameter ID = xxh[31:24] Response Format Bits [31:0] are sticky and will not be reset by a Link Reset or a Codec Reset: Bits 31:30 Type Read/Write Default 10b Description Port Connectivity (PCON): The internal connectivity of this Pin Widget is fixed. Location (LOC): This field indicates the physical location of the jack or device to which the pin complex is connected. Set to internal and not available. Default Device (DD): Indicates the intended use of the connection is for speakers. Connection Type (CTYP): Indicates the type of physical connection is other analog. Color (COL): This field indicates the color of the physical jack for use by software. The color selected is unknown. Miscellaneous (MISC): No PDC override. Default Association (DA): This field is used by software to group Pin Complex (and therefore jacks) together into functional blocks to support multichannel operation. All jacks with the same association number may be assumed to be grouped together. A value of all ‘0’s is reserved. A value of all ‘1’s in this field indicates that the Association has the lowest priority. Sequence (SEQ): This field indicates the order of the jacks in the association group. 29:24 Read/Write 010000b 23:20 19:16 15:12 11:8 Read/Write Read/Write Read/Write Read/Write 1h 7h 0h 0h 7:4 Read/Write Fh 3:0 Read/Write 0h DS880F1 95 CS4207 6.11 6.11.1 Line In 1/Mic In 2, Mic In 1/Line In 2 Pin Widgets (Node ID = 0Ch, 0Dh) Audio Widget Capabilities Get Parameter Command Format: Bits [31:28] CAd = X Bits [27:20] Line In 1 Node ID=0Ch Mic In 1 Node ID=0Dh Bits [19:8] Verb ID = F00h Bits [7:0] Parameter ID = 09h Response Format: Bits 31:24 23:20 19:16 15:12 11 10 9 8 7 6 5 4 3 2 1 0 Type Read Only Read Only Read Only Read Only Read Only Read Only Read Only Read Only Read Only Read Only Read Only Read Only Read Only Read Only Read Only Read Only Default 00h 4h 1h 0h 0b 1b 0b 0b 1b 0b 0b 0b 1b 0b 1b 1b Reserved Type (TYP): Pin Complex Widget Delay (DLY): Number of sample delays through the widget. Description Reserved L-R Swap (LRS): This widget is not capable of swapping the left and right channels. Power Control (PC): Power State control is supported on this widget. Digital (DIG): Widget is not a digital widget. Connection List (CL): A connection list is not present on this widget. Unsolicited Capable (UC): Unsolicited Response is supported on this widget. Processing Widget (PW): This widget does not contain “Processing Controls” parameters. Stripe (STRP): Stripping is not supported. Format Override (FO): This widget does not contain format information. Amplifier Parameter Override (APO): This widget contains its own amplifier parameters. Output Amplifier Present (OAP): Output amplifier is not present for this widget. Input Amplifier Present (IAP): Input amplifier is present for this widget. Stereo (ST): A 1 indicates a stereo widget. 96 DS880F1 CS4207 6.11.2 Line In 1/Mic In 2 Pin Capabilities Get Parameter Command Format: Bits [31:28] CAd = X Bits [27:20] Node ID = 0Ch Bits [19:8] Verb ID = F00h Bits [7:0] Parameter ID = 0Ch Response Format: Bits 31:17 16 15:8 7 6 5 4 3 Type Read Only Read Only Read Only Read Only Read Only Read Only Read Only Read Only Default 0 0b 00h 0h 0b 1b 0b 0b Reserved EAPD Capable (EAPDC): EAPD not supported. VREF Control (VREFC): VREF generation is not supported by this widget. HDMI Capable (HDMIC): HDMI not supported. Balanced I/O Pins (BIOP): This widget does not have balanced I/O pins. Input Capable (INC): Widget is input capable. Output Capable (OUTC): Widget is not output capable. Headphone Drive Capable (HDC): Widget is not capable of driving headphones directly. Presence Detect Capable (PDC): This bit is ‘1’ to indicate that the widget is capable of performing presence detect to determine whether there is anything plugged in. Trigger Required (TR): Trigger is not required for an impedance measurement. Impedance Sense Capable (ISC): This bit is ‘0’ to indicate that the widget does not support impedance sense on the attached peripheral. Description 2 Read Only 1b 1 0 Read Only Read Only 0b 0b 6.11.3 Mic In 1/Line In 2 Pin Capabilities Get Parameter Command Format: Bits [31:28] CAd = X Bits [27:20] Node ID = 0Dh Bits [19:8] Verb ID = F00h Bits [7:0] Parameter ID = 0Ch Response Format: Bits 31:17 16 15:8 7 6 5 4 Type Read Only Read Only Read Only Read Only Read Only Read Only Read Only Default 0 0b 17h 0h 1b 1b 0b Reserved EAPD Capable (EAPDC): EAPD not supported. VREF Control (VREFC): VREF generation is supported by this widget. Ground/80%/50%/Hi-Z are supported. 100% is not supported. HDMI Capable (HDMIC): HDMI not supported. Balanced I/O Pins (BIOP): This widget has balanced I/O pins. Input Capable (INC): Widget is input capable. Output Capable (OUTC): Widget is not output capable. Description DS880F1 97 CS4207 3 Read Only 0b Headphone Drive Capable (HDC): Widget is not capable of driving headphones directly. Presence Detect Capable (PDC): This bit is ‘1’ to indicate that the widget is capable of performing presence detect to determine whether there is anything plugged in. Trigger Required (TR): Trigger is not required for an impedance measurement. Impedance Sense Capable (ISC): This bit is ‘0’ to indicate that the widget does not support impedance sense on the attached peripheral. 2 Read Only 1b 1 0 Read Only Read Only 0b 0b 6.11.4 Input Amplifier Capabilities Get Parameter Command Format: Bits [31:28] CAd = X Bits [27:20] Line In 1 Node ID=0Ch Mic In 1 Node ID=0Dh Bits [19:8] Verb ID = F00h Bits [7:0] Parameter ID = 0Dh Response Format: Bits 31 30:23 22:16 15 14:8 7 6:0 Type Read Only Read Only Read Only Read Only Read Only Read Only Read Only Default 0b 00000000b 0100111b 0b 0000011b 0b 0000000b Reserved Step Size (SS): Indicates that the size of each amplifier’s step gain is 10dB Description Mute Capable (MC): Does not support mute. Reserved Number of Steps (NOS): There are 4 gain steps; 0dB, +10dB, +20dB, and +30dB. Reserved Offset (OFST): Indicates that if “0000000b” is programmed into the Amplified Gain Control, it would result in a gain of 0dB. 6.11.5 Supported Power States Get Parameter Command Format: Bits [31:28] CAd = X Bits [27:20] Line In 1 Node ID=0Ch Mic In 1 Node ID=0Dh Bits [19:8] Verb ID = F00h Bits [7:0] Parameter ID = 0Fh Response Format: Bits 31 Type Read Only Default 1b Description EPSS Supported. Indicates that this pin wid- get supports additional capabilities allowing better low power operation. 30 29:5 4 Read Only Read Only Read Only 0b 000000h 0b Reserved Reserved D4 is not Supported 98 DS880F1 CS4207 3 Read Only 1b D3 is Supported. Since Extended Power States is also supported, the pin widget will maintain the ability to generate an Unsolicited Response (if this function is enabled) while in the D3 state. D2 is not Supported D1 is not Supported D0 Supported 2 1 0 Read Only Read Only Read Only 0b 0b 1b 6.11.6 Power States Get Parameter Command Format: Bits [31:28] CAd = X Bits [27:20] Line In 1 Node ID=0Ch Mic In 1 Node ID=0Dh Bits [19:8] Verb ID = F05h Bits [7:0] Parameter ID = 00h Set Parameter Command Format: Bits [31:28] CAd = X Bits [27:20] Line In 1 Node ID=0Ch Mic In 1 Node ID=0Dh Bits [19:8] Verb ID = 705h Bits [7:0] Parameter ID = 0xh Response Format: Bits 31:11 Type Read Only Default 00000h Reserved Power State Settings Reset(PS-SettingsReset): This bit is set to ‘1’b when, during any type of reset or low power state transition, the settings within this widget that were changed from the defaults, either by software or hardware, have been reset back to their default state. When these settings have not been reset, this is reported as ‘0’b. This bit is always a ‘1’b following a POR condition. For more information, Description 10 Read Only 1b see “Power State Settings Reset (PS-SettingsReset)” on p 27 9 8 7:4 Read Only Read Only Read Only 0b 0b 0011b Power State Clock Stop OK(PS-ClkStopOK): This bit is not supported and will always return ‘0’b when read. Power State Error (PS-Error): This bit is not supported and will always return ‘0’b when read. Power State Actual (PS-Act): This field indicates the actual power state of the referenced node. The default state is D3. DS880F1 99 CS4207 Power State Set (PS-Set): Writes to these bits set the Audio Function Group to the Power State as described below: PSS = ’0000’b; D0 - Fully on. PSS = ‘0001’b; D1 - Not Supported PSS = ‘0010’b; D2 - Not Supported PSS = ‘0011’b; D3 - Allows for lowest possible power consumption under software control. See “D3 Lower Power State Support” on page 25 for more information. PSS = ‘0100’b; D4 - Not Supported 3:0 Read/Write 0011b PS-Set is a PowerState field which defines the current power setting of the referenced node. Since this node is of type other than an Audio Function Group node, the actual power state is a function of both this setting and the PowerState setting of the Audio Function Group node under which this node was enumerated (is controlled). PS-Act is a PowerState field which indicates the actual power state of this node. Within the Audio Function Group node, this field will always be equal to the PS-Set field (modulo the time required to execute a power state transition). Within this type of node, this field will be the lower power consuming state of either a) the PS-Set field of the currently referenced node or b) the PS-Set field of the Audio Function Group node under which the currently referenced node was enumerated (is controlled). 6.11.7 Line In 1/Mic In 2 Pin Widget Control Get Parameter Command Format: Bits [31:28] CAd = X Bits [27:20] Node ID = 0Ch Bits [19:8] Verb ID = F07h Bits [7:0] Parameter ID = 00h Set Parameter Command Format: Bits [31:28] CAd = X Response Format: Bits 31:8 7 6 Type Read Only Read Only Read Only Default 0000h 0b 0b Description Reserved H-Phone Enable (HPE): Not supported on this widget. Output Enable (OUTE): Not supported on this widget. Input Enable (INE): This bit has no affect on the input path. Per HD Audio Spec, when ‘1’, this bit enables the input path of the Pin Widget. When ‘0’, the input path of the Pin Widget is shut off. Reserved VREF Enable (VREFE): Not supported on this widget. Bits [27:20] Node ID = 0Ch Bits [19:8] Verb ID = 707h Bits [7:0] Parameter ID = xxh 5 4:3 2:0 Read/Write Read Only Read Only 0b 00b 000b 100 DS880F1 CS4207 6.11.8 Mic In 1/Line In 2 Pin Widget Control Get Parameter Command Format: Bits [31:28] CAd = X Bits [27:20] Node ID = 0Dh Bits [19:8] Verb ID = F07h Bits [7:0] Parameter ID = 00h Set Parameter Command Format: Bits [31:28] CAd = X Response Format: Bits 31:8 7 6 Type Read Only Read Only Read/Write Default 0000h 0b 0b Reserved H-Phone Enable (HPE): Not supported on this widget. Output Enable (OUTE): Not supported on this widget. Used by WHQL test to set VREFE = HiZ mode. Input Enable (INE): This bit has no affect on the input path. Per HD Audio Spec., when ‘1’, this bit enables the input path of the Pin Widget. When set to ‘0’, the input path of the Pin Widget will continue to operate. Bits [27:20] Node ID = 0Dh Bits [19:8] Verb ID = 707h Bits [7:0] Parameter ID = xxh Description 5 Read/Write 0b 4:3 Read Only 00b Reserved VREF Enable (VREFE): This field selects one of the possible states for the VREF signal(s). The pin associated with this function is MICBIAS. If the value written to this control does not correspond to a supported value (‘000’b, ‘001’b, ‘010’b or ‘100’b), the VREFE bits must retain the previous value. ‘000’b = Hi-Z ‘001’b = 0.5*VA ‘010’b = GND ‘100’b = 0.8*VA 2:0 Read/Write 000b 6.11.9 Unsolicited Response Control Get Parameter Command Format: Bits [31:28] CAd = X Bits [27:20] Line In 1 Node ID=0Ch Mic In 1 Node ID=0Dh Bits [19:8] Verb ID = F08h Bits [7:0] Parameter ID = 00h Set Parameter Command Format: Bits [31:28] CAd = X Bits [27:20] Line In 1 Node ID=0Ch Mic In 1 Node ID=0Dh Bits [19:8] Verb ID = 708h Bits [7:0] Parameter ID = xxh[ Response Format Bits [31:0] are sticky and will not be reset by a Link Reset or a Codec Reset: Bits 31:8 Type Read Only Default 000000h Description Reserved DS880F1 101 CS4207 7 6 Read/Write Read Only 0b 0b Enable: Controls the actual generation of Unsolicited Responses. 1 is enable; 0 is disable. Reserved Tag: Is a 6 bit value assigned and used by software to determine what codec node generated the unsolicited response. The value programmed into the Tag field is returned in the top 6 bits (31:26) of every Unsolicited Response generated by this node. 5:0 Read/Write 000000b Unsolicited Response Format : Bits [31:26] Tag Bits [27:0] Response 6.11.10 Pin Sense Get Parameter Command Format: Bits [31:28] CAd = X Bits [27:20] Line In 1 Node ID=0Ch Mic In 1 Node ID=0Dh Bits [19:8] Verb ID = F09h Bits [7:0] Parameter ID = 00h Set Parameter Command Format: Bits [31:28] CAd = X Bits [27:20] Line In 1 Node ID=0Ch Mic In 1 Node ID=0Dh Bits [19:8] Verb ID = 709h Bits [7:0] Parameter ID = xxh Get Response Format: Bits 31 Type Read Only Default 0b Description Presence Detect (PDET): A ‘1’ indicates that there is “something” plugged into the jack associated with the Pin Widget. A ‘0’ indicates that nothing is plugged in. Impedance Sense (IMPS): Not valid since the widget is not capable of impedance sensing. 30:0 Read Only 0 Set Parameter ID [7:0] Format: Bits 7:1 0 Type Write Only Write Only Default 0000000b 0b Reserved Right Channel (RCHAN): The write to this bit is ignored since the widget is not capable of impedance sensing. Description 102 DS880F1 CS4207 6.11.11 Mic In 1/Line In 2 EAPD/BTL Enable Get Parameter Command Format: Bits [31:28] CAd = X Bits [27:20] Node ID = 0Dh Bits [19:8] Verb ID = F0Ch Bits [7:0] Parameter ID = 00h Set Parameter Command Format: Bits [31:28] CAd = X Get Response Format: Bits 31:3 2 1 Type Read Only Read Only Read Only Default 0 0b 0b Reserved L-R Swap: Not valid since the widget is not capable of left/right swapping. EAPD: Not supported on this widget. BTL: controls the input configuration of a Pin Widget which has indicated support for balanced I/O (bit 6, Pin Capabilities Parameter). When this bit is 0, the inputs are configured in single-ended or pseudo-differential mode; when this bit is 1, they are configured in balanced (fully differential) mode. Note: This bit is OR’ed with the ADC2 Gain bit in the ADC Configuration (CIR = 0002h) Register of the Vendor Processing Widget (Node ID = 11h). Bits [27:20] Node ID = 0Dh Bits [19:8] Verb ID = 70Ch Bits [7:0] Parameter ID = xxh Description 0 Read/Write 0b 6.11.12 Line In 1/Mic In 2 Configuration Default The Configuration Default register is used by software as an aid in determining the configuration of jacks and devices attached to the codec. At the time the codec is first powered on, this register is internally loaded with default values indicating the typical system use of this particular pin/jack. After this initial loading, it is completely codec opaque, and its state, including any software writes into the register, must be preserved across reset events such as LINK Reset or Codec Reset (the Function Reset Verb). Its state need not be preserved across power level changes. Get Parameter Command Format: Bits [31:28] CAd = X Bits [27:20] Node ID = 0Ch Bits [19:8] Verb ID = F1Ch Bits [7:0] Parameter ID = 00h Set Parameter Command Format: Bits [31:28] CAd = X Bits [27:20] Node ID = 0Ch Bits [19:8] Verb ID = 71Ch Verb ID = 71Dh Verb ID = 71Eh Verb ID = 71Fh Bits [7:0] Parameter ID = xxh[7:0] Parameter ID = xxh[15:8] Parameter ID = xxh[23:16] Parameter ID = xxh[31:24] Response Format Bits [31:0] are sticky and will not be reset by a Link Reset or a Codec Reset: Bits Type Default Description DS880F1 103 CS4207 31:30 29:24 23:20 19:16 15:12 11:8 Read/Write Read/Write Read/Write Read/Write Read/Write Read/Write 00b 000001b 8h 1h 3h 0h Port Connectivity (PCON): The external connectivity of this Pin Widget is a jack. Location (LOC): This field indicates the physical location of the jack to which the pin complex is connected. Set to external rear-panel. Default Device (DD): Indicates the intended use of the connection is for line in. Connection Type (CTYP): Indicates the type of physical connection is 1/8” jack. Color (COL): This field indicates the color of the physical jack for use by software. The color selected is blue. Miscellaneous (MISC): No PDC override. Default Association (DA): This field is used by software to group Pin Complex (and therefore jacks) together into functional blocks to support multichannel operation. All jacks with the same association number may be assumed to be grouped together. A value of all ‘0’s is reserved. A value of all ‘1’s in this field indicates that the Association has the lowest priority. Sequence (SEQ): This field indicates the order of the jacks in the association group. 7:4 Read/Write 5h 3:0 Read/Write 1h 6.11.13 Mic In 1/Line In 2 Configuration Default The Configuration Default register is used by software as an aid in determining the configuration of jacks and devices attached to the codec. At the time the codec is first powered on, this register is internally loaded with default values indicating the typical system use of this particular pin/jack. After this initial loading, it is completely codec opaque, and its state, including any software writes into the register, must be preserved across reset events such as LINK Reset or Codec Reset (the Function Reset Verb). Its state need not be preserved across power level changes. Get Parameter Command Format: Bits [31:28] CAd = X Bits [27:20] Node ID = 0Dh Bits [19:8] Verb ID = F1Ch Bits [7:0] Parameter ID = 00h Set Parameter Command Format: Bits [31:28] CAd = X Bits [27:20] Node ID = 0Dh Bits [19:8] Verb ID = 71Ch Verb ID = 71Dh Verb ID = 71Eh Verb ID = 71Fh Bits [7:0] Parameter ID = xxh[7:0] Parameter ID = xxh[15:8] Parameter ID = xxh[23:16] Parameter ID = xxh[31:24] Response Format Bits [31:0] are sticky and will not be reset by a Link Reset or a Codec Reset: Bits 31:30 29:24 Type Read/Write Read/Write Default 00b 000001b Description Port Connectivity (PCON): The external connectivity of this Pin Widget is a jack. Location (LOC): This field indicates the physical location of the jack to which the pin complex is connected. Set to external rear-panel. 104 DS880F1 CS4207 23:20 19:16 15:12 11:8 Read/Write Read/Write Read/Write Read/Write Ah 1h 9h 0h Default Device (DD): Indicates the intended use of the connection is for Mic in. Connection Type (CTYP): Indicates the type of physical connection is 1/8” jack. Color (COL): This field indicates the color of the physical jack for use by software. The color selected is pink. Miscellaneous (MISC): No PDC override. Default Association (DA): This field is used by software to group Pin Complex (and therefore jacks) together into functional blocks to support multichannel operation. All jacks with the same association number may be assumed to be grouped together. A value of all ‘0’s is reserved. A value of all ‘1’s in this field indicates that the Association has the lowest priority. Sequence (SEQ): This field indicates the order of the jacks in the association group. 7:4 Read/Write 3h 3:0 Read/Write 1h 6.11.14 Amplifier Gain/Mute Get Parameter Command Format: Bits [31:28] CAd = X Bits [27:20] Line In 1 Node ID=0Ch Mic In 1 Node ID=0Dh Bits [19:8] Verb ID = Bxxh Bits [7:0] Parameter ID = xxh Bits [19:8] = ‘Bxxxx’, where bits [15:0] are defined below: Bits [15:0] 15 14 13 12:4 3:0 Value 0b 0b xb 000000000b 0000b Description Get Output/Input (GOI): This bit controls whether the request is for the input amplifier or the output amplifier. When ‘1’, the output amplifier is being requested. When ‘0’, the input amplifier is being requested. ‘0’b Get Left/Right (GLR): This bit controls whether the request is for the left channel amplifier or the right channel amplifier. When ‘1’, the left channel amplifier is being requested. When ‘0’, the right channel amplifier is being requested. Reserved Index (IDX): This field specifies the input index of the amplifier setting to return if the widget has multiple input amplifiers. This field has no meaning and ignored since the widget does not have multiple input amplifiers. It should be always ‘0’s. Response Format: Bits 31:8 7 Type Read Only Read Only Default 000000h 0b Description Always returned “000000h” Amplifier Mute (AM): Mute is not supported by this widget. Amplifier Gain (AG): This field returns the Gain setting for the amplifier requested. If the amplifier requested does not exist, all ‘0’s will be returned. Default equals 0 dB. 6:0 Read Only 0000000b DS880F1 105 CS4207 Set Parameter Command Format: Bits [31:28] CAd = X Bits [27:20] Line In 1 Node ID=0Ch Mic In 1 Node ID=0Dh Bits [19:8] Verb ID = 3xxh Bits [7:0] Parameter ID = xxh Bits [19:8] = ‘3xxxx’, where bits [15:0] are defined below: Bits Type Default Description Set Output Amplifier (SOA): This bit determines whether the value programmed refers to the output amplifier. This bit should always be ‘0’ since an output amplifier is not present on this widget. Set Input Amplifier (SIA): This bit determines whether the value programmed refers to the input amplifier. Set to a 1 for the value to be accepted. Set Left Amplifier (SLA): Selects the left channel (channel 0). A 1 indicates that the relevant amplifier should accept the value being set. If both bits are set, both amplifiers are set. Set Right Amplifier (SRA): Selects the right channel (channel 1). A 1 indicates that the relevant amplifier should accept the value being set. If both bits are set, both amplifiers are set. Index (IDX): This field is used when programming the input amplifiers on Selector Widgets and Sum Widgets. This field is ignored. Mute (MUTE): When ‘0’, the Mute is inactive. This field is ignored. Gain (GAIN): Specifies the amplifier gain in dB. xxxxx00b = 0dB xxxxx01b = +10dB xxxxx10b = +20dB xxxxx11b = +30dB Bits(6:2) are not used and are ignored. 15 Write Only 0b 14 Write Only xb 13 Write Only xb 12 Write Only xb 11:8 7 Write Only Write Only 0000b 0b 6:0 Write Only xxxxxxxb 106 DS880F1 CS4207 6.12 Digital Mic In 1, Digital Mic In 2 Pin Widgets (Node ID = 0Eh, 12h) 6.12.1 Audio Widget Capabilities Get Parameter Command Format: Bits [31:28] CAd = X Bits [27:20] DigMic 1 Node ID=0Eh DigMic 2 Node ID=12h Bits [19:8] Verb ID = F00h Bits [7:0] Parameter ID = 09h Response Format: Bits 31:24 23:20 19:16 15:12 11 10 9 8 7 6 5 4 3 2 1 0 Type Read Only Read Only Read Only Read Only Read Only Read Only Read Only Read Only Read Only Read Only Read Only Read Only Read Only Read Only Read Only Read Only Default 00h 4h 1h 0h 0b 0b 0b 0b 0b 0b 0b 0b 1b 0b 1b 1b Reserved Type (TYP): Pin Complex Widget Delay (DLY): Number of sample delays through the widget. Description Reserved L-R Swap (LRS): This widget is not capable of swapping the left and right channels. Power Control (PC): Power State control is not supported on this widget. Digital (DIG): Widget is not a digital widget. Connection List (CL): A connection list is not present on this widget. Unsolicited Capable (UC): Unsolicited Response is not supported on this widget. Processing Widget (PW): This widget does not contain “Processing Controls” parameters. Stripe (STRP): Stripping is not supported. Format Override (FO): This widget does not contain format information. Amplifier Parameter Override (APO): This widget contains its own amplifier parameters. Output Amplifier Present (OAP): Output amplifier is not present for this widget. Input Amplifier Present (IAP): Input amplifier is present for this widget. Stereo (ST): A 1 indicates a stereo widget. DS880F1 107 CS4207 6.12.2 Pin Capabilities Get Parameter Command Format: Bits [31:28] CAd = X Bits [27:20] DigMic 1 Node ID=0Eh DigMic 2 Node ID=12h Bits [19:8] Verb ID = F00h Bits [7:0] Parameter ID = 0Ch Response Format: Bits 31:17 16 15:8 7 6 5 4 3 2 1 0 Type Read Only Read Only Read Only Read Only Read Only Read Only Read Only Read Only Read Only Read Only Read Only Default 0 0b 00h 0b 0b 1b 0b 0b 0b 0b 0b Reserved EAPD Capable (EAPDC): EAPD not supported. VREF Control (VREFC): VREF not supported. HDMI Capable (HDMIC): HDMI is not supported Balanced I/O Pins (BIOP): This widget does not have balanced I/O pins. Input Capable (INC): Input capable. Output Capable (OUTC): Not output capable. Headphone Drive Capable (HDC): Widget is not capable of driving headphones directly. Presence Detect Capable (PDC): This bit is ‘0’ to indicate that the widget is not capable of performing presence detect. Trigger Required (TR): Trigger is not required for an impedance measurement. Impedance Sense Capable (ISC): This bit is ‘0’ to indicate that the widget does not support impedance sense on the attached peripheral. Description 6.12.3 Input Amplifier Capabilities Get Parameter Command Format: Bits [31:28] CAd = X Bits [27:20] DigMic 1 Node ID=0Eh DigMic 2 Node ID=12h Bits [19:8] Verb ID = F00h Bits [7:0] Parameter ID = 0Dh Response Format: Bits 31 30:23 22:16 15 14:8 7 6:0 Type Read Only Read Only Read Only Read Only Read Only Read Only Read Only Default 0b 00000000b 0100111b 0b 0000010b 0b 0000000b Reserved Step Size (SS): Indicates that the size of each amplifier’s step gain is 10dB Description Mute Capable (MC): Does not support mute. Reserved Number of Steps (NOS): There are 3 gain steps; 0dB, +10dB and +20dB. Reserved Offset (OFST): Indicates that if “0000000b” is programmed into the Amplified Gain Control, it would result in a gain of 0dB. 108 DS880F1 CS4207 6.12.4 Pin Widget Control Get Parameter Command Format: Bits [31:28] CAd = X Bits [27:20] DigMic 1 Node ID=0Eh DigMic 2 Node ID=12h Bits [19:8] Verb ID = F07h Bits [7:0] Parameter ID = 00h Set Parameter Command Format: Bits [31:28] CAd = X Bits [27:20] DigMic 1 Node ID=0Eh DigMic 2 Node ID=12h Bits [19:8] Verb ID = 707h Bits [7:0] Parameter ID = xxh Response Format: Bits 31:8 7 6 5 4:3 2:0 Type Read Only Read Only Read Only Read/Write Read Only Read Only Default 0000h 0b 0b 0b 00b 000b Reserved H-Phone Enable (HPE): Not supported. Output Enable (OUTE): Not supported. Input Enable (INE): This bit, when set to ‘1’, enables the data path for the corresponding DMIC. When set to ‘0’, the data path is disabled and the corresponding ADC output is muted. Description Reserved VREF Enable (VREFE): VREF is not supported on this widget. Will always read back ‘000’ 6.12.5 Digital Mic In 1 Configuration Default The Configuration Default register is used by software as an aid in determining the configuration of jacks and devices attached to the codec. At the time the codec is first powered on, this register is internally loaded with default values indicating the typical system use of this particular pin/jack. After this initial loading, it is completely codec opaque, and its state, including any software writes into the register, must be preserved across reset events such as LINK Reset or Codec Reset (the Function Reset Verb). Its state need not be preserved across power level changes. Get Parameter Command Format: Bits [31:28] CAd = X Bits [27:20] Node ID = 0Eh Bits [19:8] Verb ID = F1Ch Bits [7:0] Parameter ID = 00h Set Parameter Command Format: Bits [31:28] CAd = X Bits [27:20] Node ID = 0Eh Bits [19:8] Verb ID = 71Ch Verb ID = 71Dh Verb ID = 71Eh Verb ID = 71Fh Bits [7:0] Parameter ID = xxh[7:0] Parameter ID = xxh[15:8] Parameter ID = xxh[23:16] Parameter ID = xxh[31:24] Response Format Bits [31:0] are sticky and will not be reset by a Link Reset or a Codec Reset: Bits 31:30 Type Read/Write Default 10b Description Port Connectivity (PCON): A fixed function device is attached. DS880F1 109 CS4207 29:24 23:20 19:16 15:12 11:8 Read/Write Read/Write Read/Write Read/Write Read/Write 110111b Dh 6h 0h 0h Location (LOC): This field indicates the physical location of the device to which the pin complex is connected. Set to internal + mobile lid inside. Default Device (DD): Indicates the intended use of the connection is for Digital In. Connection Type (CTYP): Indicates the type of physical connection is Other Digital. Color (COL): This field indicates the color of the physical jack for use by software. The color selected is unknown. Miscellaneous (MISC): No PDC override. Default Association (DA): This field is used by software to group Pin Complex (and therefore jacks) together into functional blocks to support multichannel operation. All jacks with the same association number may be assumed to be grouped together. A value of all ‘0’s is reserved. A value of all ‘1’s in this field indicates that the Association has the lowest priority. Sequence (SEQ): This field indicates the order of the jacks in the association group. 7:4 Read/Write 3h 3:0 Read/Write Eh 6.12.6 Digital Mic In 2 Configuration Default The Configuration Default register is used by software as an aid in determining the configuration of jacks and devices attached to the codec. At the time the codec is first powered on, this register is internally loaded with default values indicating the typical system use of this particular pin/jack. After this initial loading, it is completely codec opaque, and its state, including any software writes into the register, must be preserved across reset events such as LINK Reset or Codec Reset (the Function Reset Verb). Its state need not be preserved across power level changes. Get Parameter Command Format: Bits [31:28] CAd = X Bits [27:20] Node ID = 12h Bits [19:8] Verb ID = F1Ch Bits [7:0] Parameter ID = 00h Set Parameter Command Format: Bits [31:28] CAd = X Bits [27:20] Node ID = 12h Bits [19:8] Verb ID = 71Ch Verb ID = 71Dh Verb ID = 71Eh Verb ID = 71Fh Bits [7:0] Parameter ID = xxh[7:0] Parameter ID = xxh[15:8] Parameter ID = xxh[23:16] Parameter ID = xxh[31:24] Response Format Bits [31:0] are sticky and will not be reset by a Link Reset or a Codec Reset: Bits 31:30 29:24 23:20 Type Read/Write Read/Write Read/Write Default 10b 110111b Dh Description Port Connectivity (PCON): A fixed function device is attached. Location (LOC): This field indicates the physical location of the device to which the pin complex is connected. Set to internal + mobile lid inside. Default Device (DD): Indicates the intended use of the connection is for Digital In. 110 DS880F1 CS4207 19:16 15:12 11:8 Read/Write Read/Write Read/Write 6h 0h 0h Connection Type (CTYP): Indicates the type of physical connection is Other Digital. Color (COL): This field indicates the color of the physical jack for use by software. The color selected is unknown. Miscellaneous (MISC): No PDC override. Default Association (DA): This field is used by software to group Pin Complex (and therefore jacks) together into functional blocks to support multichannel operation. All jacks with the same association number may be assumed to be grouped together. A value of all ‘0’s is reserved. A value of all ‘1’s in this field indicates that the Association has the lowest priority. Sequence (SEQ): This field indicates the order of the jacks in the association group. 7:4 Read/Write 5h 3:0 Read/Write Eh 6.12.7 Amplifier Gain/Mute Get Parameter Command Format: Bits [31:28] CAd = X Bits [27:20] DigMic 1 Node ID=0Eh DigMic 2 Node ID=12h Bits [19:8] Verb ID = Bxxh Bits [7:0] Parameter ID = xxh Bits [19:8] = ‘Bxxxx’, where bits [15:0] are defined below: Bits [15:0] 15 14 13 12:4 3:0 Value 0b 0b xb 000000000b 0000b Description Get Output/Input (GOI): This bit controls whether the request is for the input amplifier or the output amplifier. When ‘1’, the output amplifier is being requested. When ‘0’, the input amplifier is being requested. ‘0’b Get Left/Right (GLR): This bit controls whether the request is for the left channel amplifier or the right channel amplifier. When ‘1’, the left channel amplifier is being requested. When ‘0’, the right channel amplifier is being requested. Reserved Index (IDX): This field specifies the input index of the amplifier setting to return if the widget has multiple input amplifiers. This field has no meaning and ignored since the widget does not have multiple input amplifiers. It should be always ‘0’s. Response Format: Bits 31:8 7 Type Read Only Read Only Default 000000h 0b Description Always returned “000000h” Amplifier Mute (AM): Mute is not supported by this widget. Amplifier Gain (AG): This field returns the Gain setting for the amplifier requested. If the amplifier requested does not exist, all ‘0’s will be returned. Default equals 0 dB. 6:0 Read Only 0000000b Set Parameter Command Format: Bits [31:28] Bits [27:20] Bits [19:8] Bits [7:0] DS880F1 111 CS4207 CAd = X DigMic 1 Node ID=0Eh DigMic 2 Node ID=12h Verb ID = 3xxh Parameter ID = xxh Bits [19:8] = ‘3xxxx’, where bits [15:0] are defined below: Bits 15 Type Write Only Default 0b Description Set Output Amplifier (SOA): This bit determines whether the value programmed refers to the output amplifier. This bit should always be ‘0’ since an output amplifier is not present. Set Input Amplifier (SIA): This bit determines whether the value programmed refers to the input amplifier. Set to 1 for the value to be accepted. Set Left Amplifier (SLA): Selects the left channel (channel 0). A 1 indicates that the relevant amplifier should accept the value being set. If both bits are set, both amplifiers are set. Set Right Amplifier (SRA): Selects the right channel (channel 1). A 1 indicates that the relevant amplifier should accept the value being set. If both bits are set, both amplifiers are set. Index (IDX): This field is used when programming the input amplifiers on Selector Widgets and Sum Widgets. This field is ignored. Mute (MUTE): When ‘0’, the Mute is inactive. This field is ignored. Gain (GAIN): Specifies the amplifier gain in dB. xxxxx00b = 0dB xxxxx01b = +10dB xxxxx10b = +20dB xxxxx11b = not used Bits(6:2) are not used and are ignored. 14 Write Only xb 13 Write Only xb 12 Write Only xb 11:8 7 Write Only Write Only 0000b 0b 6:0 Write Only xxxxxxxb 112 DS880F1 CS4207 6.13 S/PDIF Receiver Input Pin Widget (Node ID = 0Fh) 6.13.1 Audio Widget Capabilities Get Parameter Command Format: Bits [31:28] CAd = X Bits [27:20] Node ID = 0Fh Bits [19:8] Verb ID = F00h Bits [7:0] Parameter ID = 09h Response Format: Bits 31:24 23:20 19:16 15:12 11 10 9 8 7 6 5 4 3 2 1 0 Type Read Only Read Only Read Only Read Only Read Only Read Only Read Only Read Only Read Only Read Only Read Only Read Only Read Only Read Only Read Only Read Only Default 00h 4h 1h 0h 0b 1b 1b 0b 1b 0b 0b 0b 0b 0b 0b 1b Reserved Type (TYP): Pin Complex Widget Delay (DLY): Number of sample delays through the widget. Description Reserved L-R Swap (LRS): This widget is not capable of swapping the left and right channels. Power Control (PC): Power State control is supported on this widget. Digital (DIG): Widget is a digital widget. Connection List (CL): A connection list is not present on this widget. Unsolicited Capable (UC): Unsolicited Response is supported on this widget. Processing Widget (PW): This widget does not contain “Processing Controls” parameters. Stripe (STRP): Stripping is not supported. Format Override (FO): This widget does not contain format information. Amplifier Parameter Override (APO): This widget does not contain amplifier parameters. Output Amplifier Present (OAP): Output amplifier is not present for this widget. Input Amplifier Present (IAP): Input amplifier is not present for this widget. Stereo (ST): A 1 indicates a stereo widget. DS880F1 113 CS4207 6.13.2 Pin Capabilities Get Parameter Command Format: Bits [31:28] CAd = X Bits [27:20] Node ID = 0Fh Bits [19:8] Verb ID = F00h Bits [7:0] Parameter ID = 0Ch Response Format: Bits 31:17 16 15:8 7 6 5 4 3 2 1 0 Type Read Only Read Only Read Only Read Only Read Only Read Only Read Only Read Only Read Only Read Only Read Only Default 0 0b 00h 0h 0b 1b 0b 0b 1b 0b 0b Reserved EAPD Capable (EAPDC): EAPD not supported. VREF Control (VREFC): VREF not supported. HDMI Capable (HDMIC): HDMI not supported. Balanced I/O Pins (BIOP): This widget does not have balanced I/O pins. Input Capable (INC): Widget is input capable. Output Capable (OUTC): Is not output capable. Headphone Drive Capable (HDC): Widget is not capable of driving headphones directly. Presence Detect Capable (PDC): This bit is ‘1’ to indicate that the widget is capable of performing presence detect. Trigger Required (TR): Trigger is not required for an impedance measurement. Impedance Sense Capable (ISC): A ‘0’ indicates that the widget does not support impedance sense on the attached peripheral. Description 6.13.3 Supported Power States Get Parameter Command Format: Bits [31:28] CAd = X Bits [27:20] Node ID = 0Fh Bits [19:8] Verb ID = F00h Bits [7:0] Parameter ID = 0Fh Response Format: Bits 31 Type Read Only Default 1b Description EPSS Supported. Indicates that this pin wid- get supports additional capabilities allowing better low power operation. 30 29:5 4 3 Read Only Read Only Read Only Read Only 0b 000000h 0b 1b Reserved Reserved D4 is not Supported D3 is Supported. Since Extended Power States is also supported, the pin widget will maintain the ability to generate an Unsolicited Response (if this function is enabled) while in the D3 state. D2 is not Supported D1 is not Supported D0 Supported 2 1 0 Read Only Read Only Read Only 0b 0b 1b 114 DS880F1 CS4207 6.13.4 Power States Get Parameter Command Format: Bits [31:28] CAd = X Bits [27:20] Node ID = 0Fh Bits [19:8] Verb ID = F05h Bits [7:0] Parameter ID = 00h Set Parameter Command Format: Bits [31:28] CAd = X Bits [27:20] Node ID = 0Fh Bits [19:8] Verb ID = 705h Bits [7:0] Parameter ID = 0xh Response Format: Bits 31:11 Type Read Only Default 00000h Reserved Power State Settings Reset (PS-SettingsReset): This bit is set to ‘1’b when, during any type of reset or low power state transition, the settings within this widget that were changed from the defaults, either by software or hardware, have been reset back to their default state. When these settings have not been reset, this is reported as ‘0’b. This bit is always a ‘1’b following a POR condition. For more information, Description 10 Read Only 1b see “Power State Settings Reset (PS-SettingsReset)” on p 27 9 8 7:4 Read Only Read Only Read Only 0b 0b 0011b Power State Clock Stop OK(PS-ClkStopOK): This bit is not supported and will always return ‘0’b when read. Power State Error (PS-Error): This bit is not supported and will always return ‘0’b when read. Power State Actual (PS-Act): This field indicates the actual power state of the referenced node. The default state is D3. Power State Set (PS-Set): Writes to these bits set the Audio Function Group to the Power State as described below: PSS = ’0000’b; D0 - Fully on. PSS = ‘0001’b; D1 - Not Supported PSS = ‘0010’b; D2 - Not Supported PSS = ‘0011’b; D3 - Allows for lowest possible power consumption under software control. See “D3 Lower Power State Support” on page 25 for more information. PSS = ‘0100’b; D4 - Not Supported 3:0 Read/Write 0011b PS-Set is a PowerState field which defines the current power setting of the referenced node. Since this node is of type other than an Audio Function Group node, the actual power state is a function of both this setting and the PowerState setting of the Audio Function Group node under which this node was enumerated (is controlled). PS-Act is a PowerState field which indicates the actual power state of this node. Within the Audio Function Group node, this field will always be equal to the PS-Set field (modulo the time required to execute a power state transition). Within this type of node, this field will be the lower power consuming state of either DS880F1 115 CS4207 a) the PS-Set field of the currently referenced node or b) the PS-Set field of the Audio Function Group node under which the currently referenced node was enumerated (is controlled). 6.13.5 Pin Widget Control Get Parameter Command Format: Bits [31:28] CAd = X Bits [27:20] Node ID = 0Fh Bits [19:8] Verb ID = F07h Bits [7:0] Parameter ID = 00h Set Parameter Command Format: Bits [31:28] CAd = X Response Format: Bits 31:8 7 6 Type Read Only Read Only Read Only Default 0000h 0b 0b Reserved H-Phone Enable (HPE): Not supported on this widget. Output Enable (OUTE): Not supported on this widget. Input Enable (INE): This bit has no affect on the input path. Per HD Audio Spec., when ‘1’, this bit enables the input path of the Pin Widget. When ‘0’, the input path of the Pin Widget is shut off. Bits [27:20] Node ID = 0Fh Bits [19:8] Verb ID = 707h Bits [7:0] Parameter ID = xxh Description 5 4:3 2:0 Read/Write Read Only Read Only 0b 00b 000b Reserved VREF Enable (VREFE): VREF is not supported on this widget. These bits are ignored and always report ‘000’. 6.13.6 Unsolicited Response Control Get Parameter Command Format: Bits [31:28] CAd = X Bits [27:20] Node ID = 0Fh Bits [19:8] Verb ID = F08h Bits [7:0] Parameter ID = 00h Set Parameter Command Format: Bits [31:28] CAd = X Response Format Bits [27:20] Node ID = 0Fh Bits [19:8] Verb ID = 708h Bits [7:0] Parameter ID = xxh[ Bits [31:0] are sticky and will not be reset by a Link Reset or a Function Group Reset: Bits 31:8 Type Read Only Default 000000h Reserved Description 116 DS880F1 CS4207 7 Read/Write 0b Enable: Determines if a change in receiver lock status will generate an Unsolicited Response (0 = No, 1 = Yes). If enabled, and the lock status changes from “LOCK” to “UNLOCK” or “UNLOCK” to “LOCK”, an unsolicited response will be sent. The default value after cold or register reset for this register (0b) specifying no unsolicited response. 6 5:0 Read Only Read/Write 0b 000000b Reserved Tag: Is a 6-bit value assigned and used by software to determine what codec node generated the unsolicited response. The value programmed into the Tag field is returned in the top 6 bits (31:26) of every Unsolicited Response generated by this node. Unsolicited Response Format : Bits [31:26] Tag Bits [27:0] Response 6.13.7 Pin Sense Get Parameter Command Format: Bits [31:28] CAd = X Bits [27:20] Node ID = 0Fh Bits [19:8] Verb ID = F09h Bits [7:0] Parameter ID = 00h Set Parameter Command Format: Bits [31:28] CAd = X Get Response Format: Bits 31 Type Read Only Default 0b Description Presence Detect (PDET): A ‘1’ indicates that there is “something” plugged into the jack associated with the Pin Widget. A ‘0’ indicates that nothing is plugged in. Impedance Sense (IMPS): Not valid since the widget is not capable of impedance sensing. Bits [27:20] Node ID = 0Fh Bits [19:8] Verb ID = 709h Bits [7:0] Parameter ID = xxh 30:0 Read Only 0 Set Parameter ID [7:0] Format: Bits 7:1 0 Type Write Only Write Only Default 0000000b 0b Reserved Right Channel (RCHAN): The write to this bit is ignored since the widget is not capable of impedance sensing. Description DS880F1 117 CS4207 6.13.8 Configuration Default The Configuration Default register is used by software as an aid in determining the configuration of jacks and devices attached to the codec. At the time the codec is first powered on, this register is internally loaded with default values indicating the typical system use of this particular pin/jack. After this initial loading, it is completely codec opaque, and its state, including any software writes into the register, must be preserved across reset events such as LINK Reset or Codec Reset (the Function Reset Verb). Its state need not be preserved across power level changes. Get Parameter Command Format: Bits [31:28] CAd = X Bits [27:20] Node ID = 0Fh Bits [19:8] Verb ID = F1Ch Bits [7:0] Parameter ID = 00h Set Parameter Command Format: Bits [31:28] CAd = X Bits [27:20] Node ID = 0Fh Bits [19:8] Verb ID = 71Ch Verb ID = 71Dh Verb ID = 71Eh Verb ID = 71Fh Bits [7:0] Parameter ID = xxh[7:0] Parameter ID = xxh[15:8] Parameter ID = xxh[23:16] Parameter ID = xxh[31:24] Response Format Bits [31:0] are sticky and will not be reset by a Link Reset or a Codec Reset: Bits 31:30 29:24 23:20 19:16 15:12 11:8 Type Read/Write Read/Write Read/Write Read/Write Read/Write Read/Write Default 00b 000010b Ch 4h Eh 0h Description Port Connectivity (PCON): The external connectivity of this Pin Widget is a jack. Location (LOC): This field indicates the physical location of the jack to which the pin complex is connected. Set to external front-panel. Default Device (DD): Indicates the intended use of the connection is for S/PDIF in. Connection Type (CTYP): Indicates the type of physical connection is RCA jack. Color (COL): This field indicates the color of the physical jack for use by software. The color selected is white. Miscellaneous (MISC): No PDC override. Default Association (DA): This field is used by software to group Pin Complex (and therefore jacks) together into functional blocks to support multichannel operation. All jacks with the same association number may be assumed to be grouped together. A value of all ‘0’s is reserved. A value of all ‘1’s in this field indicates that the Association has the lowest priority. Sequence (SEQ): This field indicates the order of the jacks in the association group. 7:4 Read/Write Fh 3:0 Read/Write 0h 118 DS880F1 CS4207 6.14 S/PDIF Transmitter 1, S/PDIF Transmitter 2 Output Pin Widgets (Node ID = 10h, 15h) 6.14.1 Audio Widget Capabilities Get Parameter Command Format: Bits [31:28] CAd = X Bits [27:20] S/P Tx 1 Node ID=10h S/P Tx 2 Node ID=15h Bits [19:8] Verb ID = F00h Bits [7:0] Parameter ID = 09h Response Format: Bits 31:24 23:20 19:16 15:12 11 10 9 8 7 6 5 4 3 2 1 0 Type Read Only Read Only Read Only Read Only Read Only Read Only Read Only Read Only Read Only Read Only Read Only Read Only Read Only Read Only Read Only Read Only Default 00h 4h 1h 0h 0b 0b 1b 1b 0b 0b 0b 0b 0b 0b 0b 1b Reserved Type (TYP): Pin Complex Widget Delay (DLY): Number of sample delays through the widget. Description Reserved L-R Swap (LRS): This widget is not capable of swapping the left and right channels. Power Control (PC): Power State control is not supported on this widget. Digital (DIG): Widget is a digital widget. Connection List (CL): A connection list is present on this widget. Unsolicited Capable (UC): Unsolicited Response is not supported on this widget. Processing Widget (PW): This widget does not contain “Processing Controls” parameters. Stripe (STRP): Stripping is not supported. Format Override (FO): This widget does not contain format information. Amplifier Parameter Override (APO): This widget does not contain amplifier parameters. Output Amplifier Present (OAP): Output amplifier is not present for this widget. Input Amplifier Present (IAP): Input amplifier is not present for this widget. Stereo (ST): A 1 indicates a stereo widget. DS880F1 119 CS4207 6.14.2 Pin Capabilities Get Parameter Command Format: Bits [31:28] CAd = X Bits [27:20] S/P Tx 1 Node ID=10h S/P Tx 2 Node ID=15h Bits [19:8] Verb ID = F00h Bits [7:0] Parameter ID = 0Ch Response Format: Bits 31:17 16 15:8 7 6 5 4 3 Type Read Only Read Only Read Only Read Only Read Only Read Only Read Only Read Only Default 0 0b 00h 0h 0b 0b 1b 0b Reserved EAPD Capable (EAPDC): EAPD not supported. VREF Control (VREFC): VREF not supported. HDMI Capable (HDMIC): HDMI not supported. Balanced I/O Pins (BIOP): This widget does not have balanced I/O pins. Input Capable (INC): Widget is not input capable. Output Capable (OUTC): This bit is ‘1’ to indicate that the widget is output capable. Headphone Drive Capable (HDC): Widget is not capable of driving headphones directly. Presence Detect Capable (PDC): This bit is ‘0’ to indicate that the widget is not capable of performing presence detect to determine whether there is anything plugged in. Trigger Required (TR): Trigger is not required for an impedance measurement. Impedance Sense Capable (ISC): This bit is ‘0’ to indicate that the widget does not support impedance sense on the attached peripheral. Description 2 Read Only 0b 1 0 Read Only Read Only 0b 0b 6.14.3 Connection List Length Get Parameter Command Format: Bits [31:28] CAd = X Bits [27:20] S/P Tx 1 Node ID=10h S/P Tx 2 Node ID=15h Bits [19:8] Verb ID = F00h Bits [7:0] Parameter ID = 0Eh Response Format: Bits 31:8 7 6:0 Type Read Only Read Only Read Only Default 000000h 0b 0000001b Reserved Long Form (LF): Connection list is short form. Connection List Length (CLL): One hard-wired input for this widget. Description 120 DS880F1 CS4207 6.14.4 S/PDIF Transmitter 1 Connection List Entry Get Parameter Command Format: Bits [31:28] CAd = X Bits [27:20] Node ID = 10h Bits [19:8] Verb ID = F02h Bits [7:0] Parameter ID = N=00h Response Format: Bits 31:24 23:16 15:8 7:0 Type Read Only Read Only Read Only Read Only Default 00h 00h 00h 08h Description Connection List Entry (N+3): Returns 00h for N=00h-03h or N>03h. Connection List Entry (N+2): Returns 00h for N=00h-03h or N>03h. Connection List Entry (N+1): Returns 00h for N=00h-03h or N>03h. Connection List Entry (N): Returns 08h (S/PDIF Out 1) for N=00h-03h. Returns 00h for N>03h. 6.14.5 S/PDIF Transmitter 2 Connection List Entry Get Parameter Command Format: Bits [31:28] CAd = X Bits [27:20] Node ID = 15h Bits [19:8] Verb ID = F02h Bits [7:0] Parameter ID = N=00h Response Format: Bits 31:24 23:16 15:8 7:0 Type Read Only Read Only Read Only Read Only Default 00h 00h 00h 14h Description Connection List Entry (N+3): Returns 00h for N=00h-03h or N>03h. Connection List Entry (N+2): Returns 00h for N=00h-03h or N>03h. Connection List Entry (N+1): Returns 00h for N=00h-03h or N>03h. Connection List Entry (N): Returns 14h (S/PDIF Out 2) for N=00h-03h. Returns 00h for N>03h. DS880F1 121 CS4207 6.14.6 Pin Widget Control Get Parameter Command Format: Bits [31:28] CAd = X Bits [27:20] S/P Tx 1 Node ID=10h S/P Tx 2 Node ID=15h Bits [19:8] Verb ID = F07h Bits [7:0] Parameter ID = 00h Set Parameter Command Format: Bits [31:28] CAd = X Bits [27:20] S/P Tx 1 Node ID=10h S/P Tx 2 Node ID=15h Bits [19:8] Verb ID = 707h Bits [7:0] Parameter ID = xxh Response Format: Bits 31:8 7 6 Type Read Only Read Only Read/Write Default 0000h 0b 0b Reserved H-Phone Enable (HPE): Not supported. Output Enable (OUTE): This bit has no affect on the output path. Per HD Audio Spec., when ‘1’, this bit enables the output path of the Pin Widget. When ‘0’, the output path is shut off. Input Enable (INE): Set to ‘0’ since there is no input path associated with the pin widget. Description 5 4:3 2:0 Read Only Read Only Read Only 0b 00b 000b Reserved VREF Enable (VREFE): The Pin Widget does not support VREF generation as indicated in the Pin Capabilities. As such, this field should always be “000b” to select the Hi-Z state. 122 DS880F1 CS4207 6.14.7 S/PDIF Transmitter 1 Configuration Default The Configuration Default register is used by software as an aid in determining the configuration of jacks and devices attached to the codec. At the time the codec is first powered on, this register is internally loaded with default values indicating the typical system use of this particular pin/jack. After this initial loading, it is completely codec opaque, and its state, including any software writes into the register, must be preserved across reset events such as LINK Reset or Codec Reset (the Function Reset Verb). Its state need not be preserved across power level changes. Get Parameter Command Format: Bits [31:28] CAd = X Bits [27:20] Node ID = 10h Bits [19:8] Verb ID = F1Ch Bits [7:0] Parameter ID = 00h Set Parameter Command Format: Bits [31:28] CAd = X Bits [27:20] Node ID = 10h Bits [19:8] Verb ID = 71Ch Verb ID = 71Dh Verb ID = 71Eh Verb ID = 71Fh Bits [7:0] Parameter ID = xxh[7:0] Parameter ID = xxh[15:8] Parameter ID = xxh[23:16] Parameter ID = xxh[31:24] Response Format Bits [31:0] are sticky and will not be reset by a Link Reset or a Codec Reset: Bits 31:30 Type Read/Write Default 00b Description Port Connectivity (PCON): The external connectivity of this Pin Widget is a jack. Location (LOC): This field indicates the physical location of the jack or device to which the pin complex is connected. Set to External Rear Panel. Default Device (DD): Indicates the intended use of the jack is for S/PDIF Out. Connection Type (CTYP): Indicates the type of physical connection is an RCA jack. Color (COL): This field indicates the color of the physical jack for use by software. The color selected is Orange. Miscellaneous (MISC): No PDC override. Default Association (DA): This field is used by software to group Pin Complex (and therefore jacks) together into functional blocks to support multichannel operation. All jacks with the same association number may be assumed to be grouped together. A value of all ‘0’s is reserved. A value of all ‘1’s in this field indicates that the Association has the lowest priority. Sequence (SEQ): This field indicates the order of the jacks in the association group. 29:24 Read/Write 000001b 23:20 19:16 15:12 11:8 Read/Write Read/Write Read/Write Read/Write 4h 4h 6h 0h 7:4 Read/Write Fh 3:0 Read/Write 0h DS880F1 123 CS4207 6.14.8 S/PDIF Transmitter 2 Configuration Default The Configuration Default register is used by software as an aid in determining the configuration of jacks and devices attached to the codec. At the time the codec is first powered on, this register is internally loaded with default values indicating the typical system use of this particular pin/jack. After this initial loading, it is completely codec opaque, and its state, including any software writes into the register, must be preserved across reset events such as LINK Reset or Codec Reset (the Function Reset Verb). Its state need not be preserved across power level changes. Get Parameter Command Format: Bits [31:28] CAd = X Bits [27:20] Node ID = 15h Bits [19:8] Verb ID = F1Ch Bits [7:0] Parameter ID = 00h Set Parameter Command Format: Bits [31:28] CAd = X Bits [27:20] Node ID = 15h Bits [19:8] Verb ID = 71Ch Verb ID = 71Dh Verb ID = 71Eh Verb ID = 71Fh Bits [7:0] Parameter ID = xxh[7:0] Parameter ID = xxh[15:8] Parameter ID = xxh[23:16] Parameter ID = xxh[31:24] Response Format Bits [31:0] are sticky and will not be reset by a Link Reset or a Codec Reset: Bits 31:30 Type Read/Write Default 00b Description Port Connectivity (PCON): The external connectivity of this Pin Widget is a jack. Location (LOC): This field indicates the physical location of the jack or device to which the pin complex is connected. Set to External Rear Panel. Default Device (DD): Indicates the intended use of the jack is for S/PDIF Out. Connection Type (CTYP): Indicates the type of physical connection is an optical TOSLINK jack. Color (COL): This field indicates the color of the physical jack for use by software. The color selected is Black. Miscellaneous (MISC): No PDC override. Default Association (DA): This field is used by software to group Pin Complex (and therefore jacks) together into functional blocks to support multichannel operation. All jacks with the same association number may be assumed to be grouped together. A value of all ‘0’s is reserved. A value of all ‘1’s in this field indicates that the Association has the lowest priority. Sequence (SEQ): This field indicates the order of the jacks in the association group. 29:24 Read/Write 000001b 23:20 19:16 15:12 11:8 Read/Write Read/Write Read/Write Read/Write 4h 5h 1h 0h 7:4 Read/Write Fh 3:0 Read/Write 0h 124 DS880F1 CS4207 6.15 Vendor Processing Widget (Node ID = 11h) 6.15.1 Audio Widget Capabilities Get Parameter Command Format: Bits [31:28] CAd = X Bits [27:20] Node ID = 11h Bits [19:8] Verb ID = F00h Bits [7:0] Parameter ID = 09h Response Format: Bits 31:24 23:20 19:16 15:12 11 10 9 8 7 6 5 4 3 2 1 0 Type Read Only Read Only Read Only Read Only Read Only Read Only Read Only Read Only Read Only Read Only Read Only Read Only Read Only Read Only Read Only Read Only Default 00h Fh 0h 0h 0b 0b 0b 0b 0b 1b 0b 0b 0b 0b 0b 0b Reserved Type (TYP): Vendor Defined Widget Delay (DLY): Number of sample delays through the widget. Description Reserved L-R Swap (LRS): This widget is not capable of swapping the left and right channels. Power Control (PC): Power State control is not supported on this widget. Digital (DIG): Widget is not a digital widget. Connection List (CL): Connection list is not present. Unsolicited Capable (UC): Not supported. Processing Widget (PW): Widget does contain “Processing Controls” parameters. Stripe (STRP): Stripping is not supported. Format Override (FO): Set to ‘0’ to indicate that the widget does not contain format information. Amplifier Parameter Override (APO): This widget does not contain amplifier parameters. Output Amplifier Present (OAP): Not present. Input Amplifier Present (IAP): Input amplifier is not present for this widget. Stereo (ST): A 0 indicates not supported. 6.15.2 Processing Capabilities Get Parameter Command Format: Bits [31:28] CAd = X Bits [27:20] Node ID = 11h Bits [19:8] Verb ID = F00h Bits [7:0] Parameter ID = 10h Response Format: Bits 31:16 15:8 7:1 0 Type Read Only Read Only Read Only Read Only Default 0000h 16h 0000000b 0b Reserved NumCoeff: Number of coefficients. There are a total of 22 registers. Description Reserved Benign: This processing widget is not linear and time invariant. DS880F1 125 CS4207 6.15.3 Processing State Get Parameter Command Format: Bits [31:28] CAd = X Bits [27:20] Node ID = 11h Bits [19:8] Verb ID = F03h Bits [7:0] Parameter ID = 00h Set Parameter Command Format: Bits [31:28] CAd = X Bits [27:20] Node ID = 11h Bits [19:8] Verb ID = 703h Bits [7:0] Parameter ID = xxh Response Format: Bits 31:8 Type Read Only Default 000000h Reserved HDA Defined Processing State: Writes to these bits set the Widget to the processing state as described below: ’00’h; Processing Off. ’01’h; Processing On. ’02’h; Processing Benign. Benign state is not supported. Will be treated as “Processing Off”. ’03’h - ‘7F’h; - Reserved Description 7:0 Read/Write 00h 6.15.4 Coefficient Index The Coefficient Index is a zero-based index into the processing coefficient list which will be either read or written using the Processing Coefficient control. When the coefficient has been read or written to, the Coefficient Index will automatically increment by one so that the next Set Processing Coefficient verb will load the coefficient into the next slot. The auto-increment feature can be disabled by setting the Disable Coefficient Index Auto-Increment bit in the DAC Configuration Index Register (CIR=0003h). The auto-increment feature will “wrap around” at a Coefficient Index value of 1Fh, that is an index of 1Fh will be autoincremented to an index of 00h. If Coefficient Index is set to be greater than the number of “slots” in the processing coefficient list, unpredictable behavior will result if an attempt is made to Get or Set the processing coefficient. Get Parameter Command Format: Bits [31:28] CAd = X Bits [27:20] Node ID = 11h Bits [19:16] Verb ID = Dh Bits [15:0] Parameter ID = 0000h Set Parameter Command Format: Bits [31:28] CAd = X Bits [27:20] Node ID = 11h Bits [19:16] Verb ID = 5h Bits [15:0] Parameter ID = xxxxh Response Format: Bits 31:16 15:0 Type Read Only Read/Write Default 0000h 0000h Reserved Index n: Coefficient Index value. Description 126 DS880F1 CS4207 6.15.5 Processing Coefficient Processing Coefficient loads the value n into the widget’s coefficient array at the index determined by the Coefficient Index control. When the coefficient has been read or written to, the Coefficient Index will automatically increment by one so that the next Set Processing Coefficient verb will load the coefficient into the next slot. Get Parameter Command Format: Bits [31:28] CAd = X Bits [27:20] Node ID = 11h Bits [19:16] Verb ID = Ch Bits [15:0] Parameter ID = 0000h Set Parameter Command Format: Bits [31:28] CAd = X Bits [27:20] Node ID = 11h Bits [19:16] Verb ID = 4h Bits [15:0] Parameter ID = xxxxh Response Format: Bits 31:16 15:0 Type Read Only Read/Write Default 0000h 0000h Reserved Value n: The value n of the 16 bit coefficient to set. Description 6.15.6 Coefficient Registers Processing Coefficient loads the 16-bit value n into the widget’s coefficient array at the index determined by the Coefficient Index control. When the coefficient has been loaded, the Coefficient Index will automatically increment by one so that the next Set Processing Coefficient verb will load the coefficient into the next slot. Coefficient Index Register Summary: Coefficient Index Register (CIR) 0000h 0001h 0002h 0003h 0004h 0005h-0007h Description S/PDIF RX/TX Interface Status S/PDIF RX/TX Interface Control ADC Configuration DAC Configuration Beep Configuration Reserved DS880F1 127 CS4207 6.15.6.1 S/PDIF RX/TX Interface Status (CIR = 0000h) Bits 15:10 9 Type Read Only Read Only Default 0 0b Reserved 192 kHz Recovered Sample Rate - Measured audio sample rate of incoming S/PDIF data. A ‘1’b indicates a 192 kHz sample rate. 96 kHz Recovered Sample Rate - Measured audio sample rate of incoming S/PDIF data. A ‘1’b indicates a 96 kHz sample rate. 48 kHz Recovered Sample Rate - Measured audio sample rate of incoming S/PDIF data. A ‘1’b indicates a 48 kHz sample rate. 44.1 kHz Recovered Sample Rate - Measured audio sample rate of incoming S/PDIF data.A ‘1’b indicates a 44.1 kHz sample rate. 32 kHz Recovered Sample Rate - Measured audio sample rate of incoming S/PDIF data. A ‘1’b indicates a 32 kHz sample rate. CCRC - Channel Status Block Cyclic Redundancy Check bit. Updated on CS block boundaries, valid only in Pro mode.This bit will go Description 8 Read Only 0b 7 Read Only 0b 6 Read Only 0b 5 Read Only 0b 4 Read Only 0b high on occurrence of the error, and will stay high until the register is read. Reading the register resets this bit to 0, unless the error condition is still true. 0 - No error. 1 - Error. BIP - Bi-phase error bit. Updated on sub-frame boundaries.This bit will go high on occur- 3 Read Only 0b rence of the error, and will stay high until the register is read. Reading the register resets this bit to 0, unless the error condition is still true. 0 - No error. 1 - Bi-phase error. This indicates an error in the received bi-phase coding. PAR - Parity bit. Updated on sub-frame boundaries. This bit will go high on occurrence of 2 Read Only 0b the error, and will stay high until the register is read. Reading the register resets this bit to 0, unless the error condition is still true. 0 - No error. 1 - Parity error. SPUL - S/PDIF Receiver Unlock Indicator 1 - The receiver is unlocked or has transition-ed from lock to unlock since the last read. 0 - The receiver is locked and has not transitioned from lock to unlock since the last read. SPL - S/PDIF Receiver Lock Indicator 1 - The receiver is locked or has transition-ed from unlock to lock since the last read. 0 - The receiver is unlocked and has not transition-ed from unlock to lock since the last read. 1 Read Only 0b 0 Read Only 0b 128 DS880F1 CS4207 6.15.6.2 S/PDIF RX/TX Interface Control (CIR = 0001h) Bits 15 14 Type Read Only Read/Write Default 0b 0b Reserved TX 2 Enable: Routes S/PDIF Transmitter 2 to the GPIO1/DMIC_SDA2/SPDIF_OUT2 pin. 0 - The pin functions as GPIO1 or DMIC_SDA2, according to DMIC2 Enable. 1 - The pin functions as SPDIF_OUT2, regardless of DMIC2 Enable. Description 13 12 Read/Write Read/Write 0b 0b Reserved TX 2 Raw Data Mode: Enables AES3 Direct Mode. In this mode, a direct copy of the received NRZ data from the HD Audio bus is sent to S/PDIF transmitter 2. 0 - Normal S/PDIF TX 2 Data Mode. 1 - Enable Raw S/PDIF TX 2 Data Mode. RX To TX 2 Loopthru: This bit is used to enable an internal loop through from the S/PDIF RX to S/PDIF TX 2. The path is a straight digital mux from input to output. No re-clocking is performed. 0 - Do not loop S/PDIF RX to S/PDIF TX 2. 1 - Enable S/PDIF RX to S/PDIF TX 2 loopthru. RX A/B Chnl Status Select: Specifies the channel from which to extract the channel status bits. ‘0’b - Select channel A status. ‘1’b - Select channel B status. 11 Read/Write 0b 10 9:8 7 Read/Write Read/Write Read/Write 0b 00b 0b Reserved TX 1 Raw Data Mode: Enables AES3 Direct Mode. In this mode, a direct copy of the received NRZ data from the HD Audio bus is sent to S/PDIF transmitter 1. 0 - Normal S/PDIF TX 1 Data Mode. 1 - Enable Raw S/PDIF TX 1 Data Mode. RX Raw Data Mode: Enables AES3 Direct Mode. In this mode, a direct copy of the received NRZ data from the S/PDIF receiver including the C, U, and V bits are transmitted to the HD Audio bus. The time slot occupied by the Z bit is used to indicate the location of the block start. 0 - Normal S/PDIF RX Data Mode. 1 - Enable Raw S/PDIF RX Data Mode. RX To TX 1 Loopthru: This bit is used to enable an internal loop through from the S/PDIF RX to S/PDIF TX 1. The path is a straight digital mux from input to output. No re-clocking is performed. 0 - Do not loop S/PDIF RX to S/PDIF TX 1. 1 - Enable S/PDIF RX to S/PDIF TX 1 loopthru. 6 Read/Write 0b 5 Read/Write 0b DS880F1 129 CS4207 HOLD[1:0] – Determines how received AES3 audio sample is affected when an receive error occurs. The errors that affect hold behavior are parity, bi-phase and confidence. HOLD has no effect in raw_spdif mode. 00 - hold last audio sample. 01 - replace the current audio sample with all zeros (mute). 10 - do not change the received audio sample. 11 - reserved TRUNC – Determines if the audio word length is set according to the incoming channel status data as decoded by the AUX[3:0] bits. The resulting word length in bits is 24 minus AUX[3:0]. The TRUNC function is valid only on PCM audio data. 0 – Incoming data is not truncated. 1 – Incoming data is truncated according to the length specified in the channel status data. TRUNC has no effect on output data if detected as being non-audio. SRC_MUTE – When SRC_MUTE is set to ‘1’, the SRC will soft-mute when it loses lock and soft unmute when it regains lock. 0 - Soft mute disabled 1 - Soft mute enabled 4:3 Read/Write 01b 2 Read/Write 0b 1 Read/Write 0b 0 Read/Write 0b Reserved 6.15.6.3 ADC Configuration (CIR = 0002h) Bits 15 Type Read/Write Default 0b Description URG (Unsolicited Response Gating): This bit allows unsolicited responses to be gated. 0 - Normal propagation of unsolicited responses. 1 - Unsolicited responses are gated if AFG is in D3. ADC2 Gain: This bit adjusts the gain of the Mic In 1/Line In 2 path for the given input topology. 0 - 6 dB gain added (pseudo-differential and single-ended mode). 1 - no gain added (fully differential mode). Note: This bit is OR’ed with the BTL bit in the 14 Read/Write 0b Mic In 1/Line In 2 EAPD/BTL Enable Control. 13 Read/Write 0b ADC1 Gain: This bit adjusts the gain of the Line In 1/Mic In 2 path for the given input topology. 0 - 6 dB gain added (pseudo-differential and single-ended mode). 1 - no gain added (not supported - test only). 130 DS880F1 CS4207 12:11 Read/Write 00b ADC2 Channel Mode[1:0]: Controls the channel mapping from the ADC2 output to the HDA bus. ‘00’b - ADC2 left channel is mapped to HDA left channel and ADC2 right channel is mapped HDA right channel (normal mode). ‘01’b - ADC2 left channel is mapped to both HDA left and right channels. ADC2 right channel is discarded (mono mode). ‘10’b - ADC2 right channel is mapped to both HDA left and right channels. ADC2 left channel is discarded (alternate mono mode). ‘11’b - ADC2 left channel is mapped to HDA right channel and ADC2 right channel is mapped to HDA left channel (channel swap mode). ADC1 Channel Mode[1:0]: Controls the channel mapping from the ADC1 output to the HDA bus. ‘00’b - ADC1 left channel is mapped to HDA left channel and ADC1 right channel is mapped HDA right channel (normal mode). ‘01’b - ADC1 left channel is mapped to both HDA left and right channels. ADC1 right channel is discarded (mono mode). ‘10’b - ADC1 right channel is mapped to both HDA left and right channels. ADC1 left channel is discarded (alternate mono mode). ‘11’b - ADC1 left channel is mapped to HDA right channel and ADC1 right channel is mapped to HDA left channel (channel swap mode). 10:9 Read/Write 00b 8:6 5 Read/Write Read/Write 000b 0b Reserved ADC2 PGA Mode: Sets the topology for the Mic In 1/Line In 2 PGA. 0 - Fully differential or pseudo-differential mode. 1 - Single-ended mode. ADC1 PGA Mode: Sets the topology for the Line In 1/Mic In 2 PGA. 0 - Pseudo-differential mode. 1 - Single-ended mode. ADC2 SZCMode[1:0]: Same function as ADC1. See below. 4 Read/Write 0b 3:2 Read/Write 10b DS880F1 131 CS4207 ADC1 SZCMode[1:0]: Sets the mode by which analog PGA and digital volume, and muting changes will be implemented. ‘00’b - Immediate Change: When immediate change is selected, all level changes will take effect immediately in one step ‘01’b - Digital Immediate and Analog Zero Cross: Dictates that signal level changes, both muting and gain/attenuation, will occur immediately for digital volume changes between -13dB and 51dB and on a signal zero crossing for the Analog PGA volume changes from +12db to -12dB to minimize audible artifacts. The requested level change will occur after a timeout period (approx. ???? ms) if the signal does not encounter a zero crossing. Zero cross is independently monitored and implemented for each channel. ‘10’b - Digital Soft Ramp and Analog Soft Ramp: Allows level changes, both muting and gain/attenuation, to be implemented by incrementally ramping, if the level is between -13dB and -51dB at a rate of 1/8 dB per audio sample period using the digital volume control. For settings between +12dB and -12dB, level changes are to be implemented by incrementally ramping, at a rate of 1 dB per 8 audio sample periods using the analog PGA. If the analog PGA is being used for +10dB “boost” function or the Digital Mic is being used, then the digital soft ramp gain range will be from +12dB to -51dB and analog soft ramp will not be used. Soft ramp is independently monitored and implemented for each channel. ‘11’b - Digital Soft Ramp and Analog Zero Cross: Allows level changes, both muting and gain/attenuation, to be implemented by incrementally ramping, if the level is between -13dB and -51dB at a rate of 1/8 dB per audio sample period using the digital volume control. For settings between +12dB and -12dB, level changes are to be implemented on a signal zero crossing using the Analog PGA. The requested level change will occur after a timeout period (approx. ???? ms) if the signal does not encounter a zero crossing. If the analog PGA is being used for +10dB “boost” function or the Digital Mic is being used, then the digital soft ramp gain range will be from +12dB to -51dB and analog soft ramp will not be used. Soft ramp and zero cross are independently monitored and implemented for each channel. 1:0 Read/Write 10b 132 DS880F1 CS4207 6.15.6.4 DAC Configuration (CIR = 0003h) Bits 15:13 Type Read/Write Default 000b Reserved Enable DACs High Pass Filter: When set to ‘1’b, will enable a high pass filter to remove any DC component. ‘0’b - Disable HPF. ‘1’b - Enable HPF. Power Down Internal References (PDREF): When set to ‘1’b, will ramp the internal voltage references down. This should be used prior to removing operating voltages from the codec. ‘0’b - Normal Operation. ‘1’b - Power down internal references. Disable Coefficient Index Auto-Increment: Specifies if the Coefficient Index value will be automatically incremented following a read or write operation. Auto increment is supported by Vista OS. ‘0’b - auto increment coefficient index following a read or write. ‘1’b - do not auto increment coefficient index following a read or write. Description 12 Read/Write 1b 11 Read/Write 0b 10 Read/Write 0b 9:7 Read/Write 000b Reserved Mute DAC Outputs on FIFO Error: Specifies to force a Mute condition if an under-run or over-run condition occurs on the HD Audio FIFO memory. The transition to Mute will occur as per the settings of each of the DACx SZCMode bit settings. ‘0’b - Disable Mute DAC Outputs on FIFO Error. ‘1’b - Enable Mute DAC Outputs on FIFO Error. DAC3 SZCMode[1:0]: Same function as DAC1. See below. DAC2 SZCMode[1:0]: Same function as DAC1. See below. 6 Read/Write 1b 5:4 3:2 Read/Write Read/Write 10b 10b DS880F1 133 CS4207 DAC1 SZCMode[1:0]: Sets the soft ramp and zero crossing detection modes by which volume and muting changes will be implemented. ‘00’b - Immediate Change: When immediate change is selected, all level changes will take effect immediately in one step ‘01’b - Zero Cross: Dictates that signal level changes, both muting and gain/attenuation, will occur on a signal zero crossing to minimize audible artifacts. The requested level change will occur after a timeout period (approximately???? ms) if the signal does not encounter a zero crossing. The zero cross function is independently monitored and implemented for each channel. ‘10’b - Soft Ramp: Allows level changes, both muting and gain/attenuation, to be implemented by incrementally ramping, in 1/8 dB steps, from the current level to the new level at a rate of 1/8 dB per audio sample period. ‘11’b - Soft Ramp on Zero Cross: Dictates that signal level changes, both muting and gain/attenuation, will occur in 1/8 dB steps and be implemented on a signal zero crossing. The 1/8 dB level change will occur after a timeout period (approximately??? ms) if the signal does not encounter a zero crossing. The soft ramp on zero cross function is independently monitored and implemented for each channel. 1:0 Read/Write 10b 6.15.6.5 Beep Configuration (CIR = 0004h) Bits 15:5 4 Type Read Only Read/Write Default 0 0b Reserved DMIC2 Enable: Specifies whether GPIO1 or Digital Mic Interface 2 is enabled. ‘0’b - GPIO1 enabled, Digital Mic 2 disabled. ‘1’b - Digital Mic 2 enabled, GPIO1 disabled. DMIC1 Enable: Specifies whether GPIO0 or Digital Mic Interface 1 is enabled. ‘0’b - GPIO0 enabled, Digital Mic 1 disabled. ‘1’b - Digital Mic 1 enabled, GPIO0 disabled. DAC3 Beep Enable: This bit allows the output from the beep generator to be passed to DAC3. DAC2 Beep Enable: This bit allows the output from the beep generator to be passed to DAC2. DAC1 Beep Enable: This bit allows the output from the beep generator to be passed to DAC1. Description 3 Read/Write 0b 2 1 0 Read/Write Read/Write Read/Write 1b 1b 1b 134 DS880F1 CS4207 6.16 Beep Generator Widget (Node ID = 13h) 6.16.1 Audio Widget Capabilities Get Parameter Command Format: Bits [31:28] CAd = X Bits [27:20] Node ID = 13h Bits [19:8] Verb ID = F00h Bits [7:0] Parameter ID = 09h Response Format: Bits 31:24 23:20 19:16 15:12 11 10 9 8 7 6 5 4 3 2 1 0 Type Read Only Read Only Read Only Read Only Read Only Read Only Read Only Read Only Read Only Read Only Read Only Read Only Read Only Read Only Read Only Read Only Default 00h 7h 0h 0h 0b 0b 0b 0b 0b 0b 0b 0b 0b 0b 0b 0b Reserved Type (TYP): Beep Generator Widget Delay (DLY): Number of sample delays through the widget. Description Reserved L-R Swap (LRS): This widget is not capable of swapping the left and right channels. Power Control (PC): Power State control is not supported on this widget. Digital (DIG): Widget is not a digital widget. Connection List (CL): A connection list is not present on this widget. Unsolicited Capable (UC): Unsolicited Response is not supported on this widget. Processing Widget (PW): This widget does not contain “Processing Controls” parameters. Stripe (STRP): Stripping is not supported. Format Override (FO): This widget does not contain format information. Amplifier Parameter Override (APO): This widget does not contain amplifier parameters. Output Amplifier Present (OAP): Not present. Input Amplifier Present (IAP): Input amplifier is not present for this widget. Stereo (ST): Not supported. DS880F1 135 CS4207 6.16.2 Beep Generation Control Get Parameter Command Format: Bits [31:28] CAd = X Bits [27:20] Node ID = 13h Bits [19:8] Verb ID = F0Ah Bits [7:0] Parameter ID = 00h Set Parameter Command Format: Bits [31:28] CAd = X Response Format: Bits 31:8 7:0 Type Read Only Read/Write Default 0000h 00h Reserved Divider: When set to 0, beep generation is turned off. When set to any other value, beep generation is turned on and the frequency of the beep equals 12 kHz divided by this value. Bits [27:20] Node ID = 13h Bits [19:8] Verb ID = 70Ah Bits [7:0] Parameter ID = xxh Description 136 DS880F1 CS4207 7. APPLICATIONS 7.1 7.1.1 HD Audio Interface Multi-Channel Streams The CS4207 codec supports multi-channel streams (streams with sample blocks containing more than two samples), on both inbound and outbound frames. Each of the 5 output converter widgets (DAC1/2/3, S/PDIF TX 1/2) can be associated with an individual stream, or multiple widgets can be grouped to share the same stream. A mix of shared and individual streams is also supported. Furthermore, the order in which channels are assigned to each widget is not constrained by design. However, the following limitations exist and must be avoided: • • a stream cannot contain channels that are not associated with any widget (unused channels), unless those channels appear last within the stream packet, after all other channels the same channel cannot be associated with more than one widget The same capabilities and limitations exist for the 3 input converter widgets (ADC1/2, S/PDIF RX). The following table gives some examples of valid and invalid stream formats: Stream Format {A,B} {C,D} {E,F} {G,H} {I,J} {A, B, C, D, E, F, G, H, I, J} {A, B, C, D} {E, F} {A, B} {C, D} {A, B, C, D, E, F, G, H, I, J} {A, B, C, D} {A, B, C, D, E, F, G, H, I, J} {A, B, C, D, E, F, G, H, I, J} {A, B, C, D} DAC1 A, B A, B A, B G, H A, B A, B A, B DAC2 C, D C, D C, D E, F E, F C, D C, D DAC3 SPDO1 SPDO2 E, F E, F E, F C, D A, B G, H E, F G, H G, H I, J C, D I, J G, H A, B I, J I, J A, B C, D comment indiv. streams, in-order assignment shared stream, in-order assignment mixed shared and indiv. streams indiv. streams, out of order assignment shared stream, out of order assignment invalid: leading unused ch. (A, B) invalid: intermittent unused ch. (C, D) ok: trailing unused ch. (I, J) invalid: ch. assigned to mult. widgets The curly brackets { } delineate each stream packet. The letters within curly brackets designate each channel within that stream packet. For instance the sequence “{A, B, C, D} {E, F}” denotes two streams one stream consisting of 4 channels A-D and one stream consisting of 2 channels E-F. 7.2 7.2.1 Analog Outputs Analog Supply Removal In order to reduce audible artifacts, the analog reference is always powered up, even if the AFG has been transition-ed into D3 state. For maximum power savings during D3, it may be desirable to completely remove the analog supplies on the system level. Doing so would cause an uncontrolled discharge of the internal reference and hence audible artifacts, and must therefore be preceded with a controlled reference ramp-down, which is initiated by setting the PDREF bit in the DAC Configuration (CIR = 0003h) register of the Vendor Processing Widget (Node ID = 11h). 7.3 Digital Mic Inputs For each ADC, the data from the digital mic input pin widgets are multiplexed with the data from the analog line/mic input pin widgets, and only one pin widget can be selected at any given time. Furthermore, the data pins for the DMIC interface (DMIC_SDA1/2) are multiplexed with the GPIO0/1 pins and default to GPIO. In order to successfully setup the data path for a digital microphone, the following steps have to be followed: DS880F1 137 CS4207 • • • • • clear the TX 2 Enable bit in the S/PDIF RX/TX Interface Control (CIR = 0001h) register of the Vendor Processing Widget (Node ID = 11h) (only required for DMIC2) set the DMIC1 Enable and/or DMIC2 Enable bit in the Beep Configuration (CIR = 0004h) register of the Vendor Processing Widget (Node ID = 11h) set the INE bit in the Pin Widget Control of the Digital Mic In 1 Pin Widget (Node ID = 0Eh) and/or the Digital Mic In 2 Pin Widget (Node ID = 12h) for DMIC1 set the Connection Index in the ADC2 Connection Select Control of the ADC2 Input Converter Widget (Node ID = 06h) to a value of 01h for DMIC2 set the Connection Index in the ADC1 Connection Select Control of the ADC1 Input Converter Widget (Node ID = 05h) to a value of 01h The clock signal for the DMIC interface (DMIC_SCL) will be enabled if at least one of the DMIC data paths has been configured as described above. 138 DS880F1 CS4207 8. ANALOG OUTPUT AND FILTERING The Cirrus Application Note titled Design Notes for a 2-Pole Filter with Differential Input, available as AN48 at www.cirrus.com, discusses the second-order Butterworth filter and differential-to-single-ended converter that was implemented on the CS4207 evaluation board. Figure 9 illustrates this implementation. If only single-ended outputs from the CS4207 are required, the passive output filter shown in Figure 10 can be used. 3300 pF CS4207 C0G 2.26 kΩ 1000 pF 1.5 kΩ + 2200 pF C0G 1.05 kΩ 220 pF C0G 220 Ω LINEOUTx LINEOUTx + 22 μF 4.53 kΩ Analog Output 22 μF 2.05 kΩ 6800 pF 698 Ω AGND C0G Figure 9. Differential to Single-Ended Output Filter CS4207 LINEOUTx + 4.7 µF + 562 Ω 2700 pF Analog Output 47.5 kΩ AGND Figure 10. Passive Single-Ended Output Filter 9. PCB LAYOUT CONSIDERATIONS 9.1 Power Supply, Grounding As with any high-resolution converter, the CS4207 requires careful attention to power supply and grounding arrangements if its potential performance is to be realized. Figure 1 on page 11 and Figure 2 on page 12 show the recommended power arrangements, with VA connected to a clean supply. VD, which powers the digital circuitry, may be run from the system logic supply. To achieve full analog performance, it is strongly recommended that the following rules be followed: • • place the cap between VBIAS and VA_REF as close to the codec as possible to minimize trace impedance keep the traces for VA and VA_REF separate as much as possible and only connect them at the supply Extensive use of power and ground planes, ground plane fill in unused areas and surface mount decoupling capacitors are recommended. Decoupling capacitors should be as close to the pins of the CS4207 as possible. The low value ceramic capacitor should be closest to the pin and should be mounted on the same side of the board as the CS4207 to minimize inductance effects. All signals, especially clocks, should be DS880F1 139 CS4207 kept away from the FILT+ and VCOM pins in order to avoid unwanted coupling into the modulators. The CDB4207 evaluation board demonstrates the optimum layout and power supply arrangements. 9.2 QFN Thermal Pad The CS4207 is available in a compact QFN package. The underside of the QFN package reveals a large metal pad that serves as a thermal relief to provide for maximum heat dissipation. This pad must mate with an equally dimensioned copper pad on the PCB and must be electrically connected to ground. A series of vias should be used to connect this copper pad to one or more larger ground planes on other PCB layers. In split ground systems, it is recommended that this thermal pad be connected to AGND for best performance. The CS4207 evaluation board demonstrates the optimum thermal pad and via configuration. 10.PARAMETER DEFINITIONS Dynamic Range The ratio of the rms value of the signal to the rms sum of all other spectral components over the specified bandwidth. Dynamic Range is a signal-to-noise ratio measurement over the specified band width made with a -60 dBFS signal. 60 dB is added to resulting measurement to refer the measurement to full-scale. This technique ensures that the distortion components are below the noise level and do not affect the measurement. This measurement technique has been accepted by the Audio Engineering Society, AES17-1991, and the Electronic Industries Association of Japan, EIAJ CP-307. Expressed in decibels. Total Harmonic Distortion + Noise The ratio of the rms value of the signal to the rms sum of all other spectral components over the specified band width (typically 10 Hz to 20 kHz), including distortion components. Expressed in decibels. Measured at -1 and -20 dBFS as suggested in AES17-1991 Annex A. Frequency Response A measure of the amplitude response variation from 10 Hz to 20 kHz relative to the amplitude response at 1 kHz. Units in decibels. Interchannel Isolation A measure of crosstalk between the left and right channel pairs. Measured for each channel at the converter's output with no signal to the input under test and a full-scale signal applied to the other channel. Units in decibels. Interchannel Gain Mismatch The gain difference between left and right channel pairs. Units in decibels. Gain Error The deviation from the nominal full-scale analog output for a full-scale digital input. Gain Drift The change in gain value with temperature. Units in ppm/°C. Offset Error The deviation of the mid-scale transition (111...111 to 000...000) from the ideal. Units in mV. 140 DS880F1 CS4207 11.PACKAGE DIMENSIONS 48LD QFN (6 X 6 mm BODY) PACKAGE DRAWING D D2 L E e E2 1 b TOP VIEW A A1 A3 BTM VIEW SEATING PLANE SIDE VIEW Notes: 1) Controlling dimensions are in mm. 2) Dimensioning and tolerancing conform to ASME Y14.5m-1994 3) Dimension b applies to the metallized terminal and is measured between 0.15mm and 0.30mm from the terminal tip. 4) Reference JEDEC MO-229 DIM A A1 A3 b D D2 E E2 e L MIN 0.70 0.00 0.15 4.25 4.25 0.35 NOM 0.75 0.20 BSC 0.20 6.00 BSC 4.40 6.00 BSC 4.40 0.40 BSC 0.45 MAX 0.80 0.05 0.25 4.50 4.50 0.55 THERMAL CHARACTERISTICS Parameter Junction to Ambient Thermal Impedance 2 Layer Board 4 Layer Board Symbol θJA Min - Typ tbd tbd Max - Units °C/Watt DS880F1 141 CS4207 12.ORDERING INFORMATION Product CS4207 Description Package Pb-Free Yes Grade Temp Range Container Rail Order # CS4207-CNZ/C1 CS4207 CDB4207 Low Power, 4-In/6-Out HD Audio CODEC with 48L-QFN Headphone Amp Low Power, 4-In/6-Out HD Audio CODEC with 48L-QFN Headphone Amp CS4207 Evaluation Board Commercial -40°C to +85°C Tape & Reel CS4207-CNZR/C1 Rail CS4207-DNZ CS4207-DNZR CDB4207 Yes - Automotive -40°C to +105°C - Tape & Reel - 13.REFERENCES 1. Intel Corporation, High Definition Audio Specification, Revision 1.0, April 15, 2004. http://download.intel.com/standards/hdaudio/pdf/HDAudio_03.pdf 142 DS880F1 CS4207 14.REVISION HISTORY Revision A1 B4 Initial Release First Customer Release Changes • Updated “Typical Connection Diagrams” on page 11 to reflect addition of VA_REF pin • Updated “Characteristic and Specifications” on page 13 • Changed MISC[0] default to ‘0’ in “Configuration Default” on page 95, “Digital Mic In 1 Configuration Default” on page 109, “Digital Mic In 2 Configuration Default” on page 110, “S/PDIF Transmitter 1 Configuration Default” on page 123, and “S/PDIF Transmitter 2 Configuration Default” on page 124. PP1 • Corrected IEN bit description in “Pin Widget Control” on page 109 • Clarified URG bit description in “ADC Configuration (CIR = 0002h)” on page 130 • Added “HD Audio Interface” on page 137 • Added “Digital Mic Inputs” on page 137 • Updated “Analog Output and Filtering” on page 139 • Updated “Characteristic and Specifications” on page 13 (DAC1/HPOUT) PP3 • Consistent terminology of Line Out 1 and Line Out 2 throughout the document F1 • Production Release DS880F1 143 CS4207 Contacting Cirrus Logic Support For all product questions and inquiries, contact a Cirrus Logic Sales Representative. To find one nearest you, go to www.cirrus.com. IMPORTANT NOTICE Cirrus Logic, Inc. and its subsidiaries (“Cirrus”) believe that the information contained in this document is accurate and reliable. However, the information is subject to change without notice and is provided “AS IS” without warranty of any kind (express or implied). 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Cirrus owns the copyrights associated with the information contained herein and gives consent for copies to be made of the information only for use within your organization with respect to Cirrus integrated circuits or other products of Cirrus. This consent does not extend to other copying such as copying for general distribution, advertising or promotional purposes, or for creating any work for resale. CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL APPLICATIONS”). CIRRUS PRODUCTS ARE NOT DESIGNED, AUTHORIZED OR WARRANTED FOR USE IN PRODUCTS SURGICALLY IMPLANTED INTO THE BODY, AUTOMOTIVE SAFETY OR SECURITY DEVICES, LIFE SUPPORT PRODUCTS OR OTHER CRITICAL APPLICATIONS. INCLUSION OF CIRRUS PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO BE FULLY AT THE CUSTOMER’S RISK AND CIRRUS DISCLAIMS AND MAKES NO WARRANTY, EXPRESS, STATUTORY OR IMPLIED, INCLUDING THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR PARTICULAR PURPOSE, WITH REGARD TO ANY CIRRUS PRODUCT THAT IS USED IN SUCH A MANNER. IF THE CUSTOMER OR CUSTOMER’S CUSTOMER USES OR PERMITS THE USE OF CIRRUS PRODUCTS IN CRITICAL APPLICATIONS, CUSTOMER AGREES, BY SUCH USE, TO FULLY INDEMNIFY CIRRUS, ITS OFFICERS, DIRECTORS, EMPLOYEES, DISTRIBUTORS AND OTHER AGENTS FROM ANY AND ALL LIABILITY, INCLUDING ATTORNEYS’ FEES AND COSTS, THAT MAY RESULT FROM OR ARISE IN CONNECTION WITH THESE USES. Cirrus Logic, Cirrus, and the Cirrus Logic logo designs are trademarks of Cirrus Logic, Inc. All other brand and product names in this document may be trademarks or service marks of their respective owners. AC-3 is a registered trademark of Dolby Laboratories, Inc. 144 DS880F1