PB51

rom P r o d u c t IIn n o v a t i o n FF r o m nnova PB51 PB51 Power Booster Amplifier FEATURES • WIDE SUPPLY RANGE — ±15V to ±150V • HIGH OUTPUT CURRENT — 1.5A Continuous (PB51), 2.0A Continuous (PB51A) • VOLTAGE AND CURRENT GAIN • HIGH SLEW — 50V/µs Minimum (PB51) 75V/µs Minimum (PB51A) • PROGRAMMABLE OUTPUT CURRENT LIMIT • HIGH POWER BANDWIDTH — 320 kHz Minimum • LOW QUIESCENT CURRENT — 12mA Typical • EVALUATION KIT — EK29 12-PIN SIP PACKAGE STYLE DP Formed leads available. See package styles ED & EE APPLICATIONS • HIGH VOLTAGE INSTRUMENTATION • ELECTROSTATIC TRANSDUCERS & DEFLECTION • PROGRAMMABLE POWER SUPPLIES UP TO 280V P-P EQUIVALENT SCHEMATIC 8 +VS Q2 Q1 Q3 DESCRIPTION The PB51 is a high voltage, high current amplifier designed to provide voltage and current gain for a small signal, general purpose op amp. Including the power booster within the feedback loop of the driver amplifier results in a composite amplifier with the accuracy of the driver and the extended output voltage range and current capability of the booster. The PB51 can also be used without a driver in some applications, requiring only an external current limit resistor to function properly. The output stage utilizes complementary MOSFETs, providing symmetrical output impedance and eliminating second breakdown limitations imposed by Bipolar Transistors. Internal feedback and gainset resistors are provided for a pin-strapable gain of 3. Additional gain can be achieved with a single external resistor. Compensation is not required for most driver/gain configurations, but can be accomplished with a single external capacitor. Enormous flexibility is provided through the choice of driver amplifier, current limit, supply voltage, voltage gain, and compensation. This hybrid circuit utilizes a beryllia (BeO) substrate, thick film resistors, ceramic capacitors and semiconductor chips to maximize reliability, minimize size and give top performance. Ultrasonically bonded aluminum wires provide reliable interconnections at all operating temperatures. The 12-pin Power SIP package is electrically isolated. IN 1 Q4 Q6 GAIN 6 Q5 12 OUT 3.1K Q7 COM 2 Q11 Q8 Q9 Q10 9 ILIM CC 5 11 –VS EXTERNAL CONNECTIONS 1 2 3 4 5 6 7 8 9 10 11 12 TYPICAL APPLICATION CF RF IN COM +Vs IN COM PB51 –Vs OUT CC RG RL RCL OUT NC NC CC RG NC +VS NC RCL -VS VIN RI +15V OP AMP –15V PB51U http://www.cirrus.com Copyright © Cirrus Logic, Inc. 2009 (All Rights Reserved) JUN 2009 1 APEX − PB51UREVE PB51 P r o d u c t I n n o v a t i o nF r o m ABSOLUTE MAXIMUM RATINGS SUPPLY VOLTAGE, +VS to –VS OUTPUT CURRENT, within SOA POWER DISSIPATION, internal at TC = 25°C1 INPUT VOLTAGE, referred to COM TEMPERATURE, pin solder—10s max. TEMPERATURE, junction1 TEMPERATURE RANGE, storage OPERATING TEMPERATURE RANGE, case PB51 TYP ±.75 –4.5 50 3 10 ±10 ±15 10 60 VS –8 VS –7 VS –5 100 2200 2 320 100 1 ±60 11 12 14 1.2 1.6 30 25 ±150 18 1.3 1.8 85 300V 2.0A 83W ±15V 260°C 175°C –40 to +85°C –25 to +85°C PB51A TYP * * * * * * * * * SPECIFICATIONS PARAMETER INPUT OFFSET VOLTAGE, initial OFFSET VOLTAGE, vs. temperature INPUT IMPEDANCE, DC INPUT CAPACITANCE CLOSED LOOP GAIN RANGE GAIN ACCURACY, internal Rg, Rf GAIN ACCURACY, external Rf PHASE SHIFT OUTPUT VOLTAGE SWING VOLTAGE SWING VOLTAGE SWING CURRENT, continuous SLEW RATE CAPACITIVE LOAD SETTLING TIME to .1% POWER BANDWIDTH SMALL SIGNAL BANDWIDTH SMALL SIGNAL BANDWIDTH POWER SUPPLY VOLTAGE, ±VS4 CURRENT, quiescent TEST CONDITIONS2 MIN MAX ±1.75 –7 MIN MAX ±1.0 * * * * UNITS V mV/°C k pF V/V % % ° ° V V V A V/µs pF µs kHz kHz MHz Full temperature range3 25 3 AV = 3 AV = 10 f = 10kHz, AVCL = 10, CC = 22pF f = 200kHz, AVCL = 10, CC = 22pF Io = 1.5A (PB58), 2A (PB58A) Io = 1A Io = .1A Full temperature range Full temperature range RL = 100, 2V step VC = 100 Vpp CC = 22pF, AV = 25, Vcc = ±100 CC = 22pF, AV = 3, Vcc = ±30 Full temperature range VS = ±15 VS = ±60 VS = ±150 Full temp. range, f > 60Hz Full temp. range, f < 60Hz Full temperature range Meets full range specifications VS–11 VS–10 VS–8 1.5 50 160 * 25 ±15 ±25 * VS–15 VS–11 * * * * 2.0 75 * * * 240 * * * * * * * * * * * * * * * * * ±156 V mA mA mA °C/W °C/W °C/W °C THERMAL RESISTANCE, AC junction to case5 RESISTANCE, DC junction to case RESISTANCE, junction to air TEMPERATURE RANGE, case –25 * NOTES: * The specification of PB51A is identical to the specification for PB51 in applicable column to the left. 1. Long term operation at the maximum junction temperature will result in reduced product life. Derate internal power dissipation to achieve high MTTF (Mean Time to Failure). 2. The power supply voltage specified under typical (TYP) applies, TC = 25°C unless otherwise noted. 3. Guaranteed by design but not tested. 4. +VS and –VS denote the positive and negative supply rail respectively. 5. Rating applies if the output current alternates between both output transistors at a rate faster than 60Hz. 6. +VS/–VS must be at least 15V above/below COM. CAUTION The PB51 is constructed from MOSFET transistors. ESD handling procedures must be observed. The internal substrate contains beryllia (BeO). Do not break the seal. If accidentally broken, do not crush, machine, or subject to temperatures in excess of 850°C to avoid generating toxic fumes. 2 PB51U P r o d u c t I n n o v a t i o nF r o m PB51 CURRENT LIMIT 2 VOLTAGE DROP FROM SUPPLY, VS - VO (V) 14 12 10 8 6 VO VO + INTERNAL POWER DISSIPATION, P(W) 100 80 60 40 20 0 –25 POWER DERATING OUTPUT VOLTAGE SWING CURRENT LIMIT, ILIM (A) 1.5 R CL = .4 7Ω 1 RC = L .68Ω .5 RCL = 1.5Ω 0 25 50 75 100 125 CASE TEMPERATURE, TC (°C) 0 CLOSED LOOP GAIN, A (dB) OPEN LOOP PHASE, Ф (°) 0 –25 25 0 50 75 100 125 CASE TEMPERATURE, TC (°C) 4 .01 .05 1 1.5 OUTPUT CURRENT, IO (A) 2 80 OPEN LOOP GAIN, A (dB) SMALL SIGNAL RESPONSE 30 SMALL SIGNAL RESPONSE 0 CLOSED LOOP PHASE, Ф (°) AVCL = 25 SMALL SIGNAL RESPONSE AVCL = 3 AVCL = 10 AVCL = 25 –90 60 –45 20 AVCL = 10 10 AVCL = 3 0 CC = 22pF 100K 1M 10K FREQUENCY, F (Hz) 10M –45 40 –90 20 –135 –135 CC = 22pF –180 1K 10K 100K 1M FREQUENCY, F (Hz) 10M 0 100 1K 10K 100K 1M FREQUENCY, F (Hz) –180 10M –10 1K QUIESCENT CURRENT 20 INPUT OFFSET VOLTAGE, VOS (V) QUIESCENT CURRENT, IQ (mA) .5 INPUT OFFSET VOLTAGE 400 SLEW RATE VS. TEMP. 15 Vs = 15 0V 0 SLEW RATE, SR (V/μs) 300 10 0 Vs = 10 V +S 200 -SLEW -.5 LE W Vs = 30 5 V -1 100 0 –25 50 75 100 125 0 25 CASE TEMPERATURE, TC (°C) -1.5 –25 0 25 50 75 100 125 CASE TEMPERATURE, TC (°C) 0 –25 0 25 50 75 100 125 CASE TEMPERATURE, TC (°C) 300 OUTPUT VOLTAGE, VQ (VP-P) 200 100 50 40 30 20 10 100K POWER RESPONSE OUTPUT VOLTAGE, VQ (V) 80 60 40 20 0 -20 -40 -60 -80 1 PULSE RESPONSE .1 HARMONIC DISTORTION DRIVER = TL070 VS = 60V VO = 95VP-P DISTORTION, THD (%) R L =3 .03 5Ω .003 1M 300K 3M FREQUENCY, F (Hz) 10M 2 3 4 5 TIME, t (µs) 6 7 8 .001 300 1K 3K 10K FREQUENCY, F (Hz) R L = 30K .01 PB51U 1K Ω 3 PB51 GENERAL P r o d u c t I n n o v a t i o nF r o m STABILITY Stability can be maximized by observing the following guidelines: 1. Operate the booster in the lowest practical gain. 2. Operate the driver amplifier in the highest practical effective gain. 3. Keep gain-bandwidth product of the driver lower than the closed loop bandwidth of the booster. 4. Minimize phase shift within the loop. A good compromise for (1) and (2) is to set booster gain from 3 to 10 with total (composite) gain at least a factor of 3 times booster gain. Guideline (3) implies compensating the driver as required in low composite gain configurations. Phase shift within the loop (4) is minimized through use of booster and loop compensation capacitors Cc and Cf when required. Typical values are 5pF to 33pF. Stability is the most difficult to achieve in a configuration where driver effective gain is unity (ie; total gain = booster gain). For this situation, Table 1 gives compensation values for optimum square wave response with the op amp drivers listed. DRIVER 0m s Please read Application Note 1 "General Operating Considerations" which covers stability, supplies, heat sinking, mounting, current limit, SOA interpretation, and specification interpretation. Visit www.Cirrus.com for design tools that help automate tasks such as calculations for stability, internal power dissipation, current limit; heat sink selection; Cirrus’s complete Application Notes library; Technical Seminar Workbook; and Evaluation Kits. CURRENT LIMIT For proper operation, the current limit resistor (RCL) must be connected as shown in the external connection diagram. The minimum value is 0.33 with a maximum practical value of 47. For optimum reliability the resistor value should be set as high as possible. The value is calculated as follows: +IL=.65/RCL+ .010, -IL = .65/RCL. SAFE OPERATING AREA OUTPUT CURRENT FROM +VS or –VS (A) 3 2 1 .5 .4 .3 .2 .1 ste ad ste tat SOA t= ad C ys ad C ste ys = tat 10 eT ys = 12 eT C tat eT 5° 85 C = °C 25 °C OP07 741 LF155 LF156 TL070 CCH 22p 22p 18p 4.7p 4.7p 15p CF 22p 10p 10p 10p 10p CC FPBW 4kHz 20kHz 60kHz 80kHz 80kHz SR 1.5 7 >60 >60 >60 For: RF = 33K, RI = 3.3K, RG = 22K TABLE 1. TYPICAL VALUES FOR CASE WHERE OP AMP EFFECTIVE GAIN = 1. CF RF +15V CCH OP AMP –15V +Vs IN COM PB51 OUT COMP 10 20 30 40 50 100 200 300 SUPPLY TO OUTPUT DIFFERENTIAL VOLTAGE, VS –VO (V) RI NOTE: The output stage is protected against transient flyback. However, for protection against sustained, high energy flyback, external fast-recovery diodes should be used. RCL COMPOSITE AMPLIFIER CONSIDERATIONS Cascading two amplifiers within a feedback loop has many advantages, but also requires careful consideration of several amplifier and system parameters. The most important of these are gain, stability, slew rate, and output swing of the driver. Operating the booster amplifier in higher gains results in a higher slew rate and lower output swing requirement for the driver, but makes stability more difficult to achieve. VIN CC RL –Vs GAIN R G FIGURE 2. NON-INVERTING COMPOSITE AMPLIFIER. SLEW RATE The slew rate of the composite amplifier is equal to the slew rate of the driver times the booster gain, with a maximum value equal to the booster slew rate. GAIN SET RG = [(Av-1) • 3.1K] - 6.2K R + 6.2K Av = G +1 3.1K OUTPUT SWING The maximum output voltage swing required from the driver op amp is equal to the maximum output swing from the booster divided by the booster gain. The Vos of the booster must also be supplied by the driver, and should be subtracted from the available swing range of the driver. Note also that effects of Vos drift and booster gain accuracy should be considered when calculating maximum available driver swing. The booster’s closed-loop gain is given by the equation above. The composite amplifier’s closed loop gain is determined by the feedback network, that is: –Rf/Ri (inverting) or 1+Rf/Ri (noninverting). The driver amplifier’s “effective gain” is equal to the composite gain divided by the booster gain. Example: Inverting configuration (figure 1) with R i = 2K, R f = 60K, R g = 0 : Av (booster) = (6.2K/3.1K) + 1 = 3 Av (composite) = 60K/2K = – 30 Av (driver) = – 30/3 = –10 4 PB51U