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WM8325
Processor Power Management Subsystem
DESCRIPTION
FEATURES
The WM8325 is an integrated power-management subsystem
which provides a cost-effective, flexible, single-chip solution for
power management. It is specifically targeted at the
requirements of a range of low-power portable consumer
products, but is suitable to any application with a multimedia
processor. The WM8325 is designed to operate as a system
PMIC supporting the ARM9™, ARM11™ and ARM Cortex-A™
processors, but is also capable of supporting the majority of
application and mobile processors at the heart of a wide range
of low-power consumer multimedia applications.
Power Management
1 x DC-DC synchronous buck converter
(0.6V - 1.8V, 2.5A, DVS)
1 x DC-DC synchronous buck converter
(0.6V - 1.8V, 1.25A, DVS)
2 x DC-DC synchronous buck converters
(0.85V - 3.4V, 1A)
1 x LDO regulator (0.9V - 3.3V, 300mA, 1)
2 x LDO regulators (0.9V - 3.3V, 200mA, 1)
The start-up behaviour and configuration is fully programmable
in an integrated OTP non-volatile memory. This highly flexible
solution helps reduce time-to-market, as changing application
requirements can be very easily accommodated in the OTP.
TM
The InstantConfig interface enables an external EEPROM to
configure the WM8325.
3 x LDO regulators (0.9V - 3.3V, 100mA, 2)
2 x Low-noise LDO regulators (1.0V - 3.5V, 200mA, 1)
2 x Low-noise LDO regulators (1.0V - 3.5V, 150mA, 2)
1 x ‘Alive’ regulator (0.8V – 1.55V, up to 25mA)
The WM8325 power management subsystem comprises four
programmable DC-DC converters and eleven LDO regulators
(four of which are low-noise for supplying sensitive analogue
subsystems). The integrated OTP bootstrap circuitry controls
the start-up sequencing and voltages of the converters and
regulators as well as the sequencing of system clocks.
I C or SPI compatible primary control interface
Comprehensive interrupt scheme
Watchdog timer and system reset control
Autonomous power sequencing and fault detection
OTP memory bootstrap configuration function
The DC-DC converters deliver high performance and high
efficiency across a wide range of operating conditions. They
are optimised to support the high load current transients seen
in modern processor core domains. DC-DC3 / DC-DC4 can be
connected together and operated in ‘dual’ mode to support an
increased current load of up to 1.6A
An on-chip regulator provides power for always-on PMIC
functions such as register map and the RTC. The device
provides autonomous backup battery switchover. A low-power
LDO is included to support ‘Alive’ processor power domains
external to the WM8325.
A 12-bit Auxiliary ADC supports a wide range of applications
for internal as well as external analogue sampling, such as
voltage detection and temperature measurement.
WM8325 includes a crystal oscillator and an internal RC
oscillator to generate all clock signals for autonomous system
start-up and processor clocking. A Secure Real-time Clock (SRTC) and alarm function is included, capable of waking up the
system from low-power modes. A watchdog function is
provided to ensure system integrity.
To maximise battery life, highly-granular power management
enables each function in the WM8325 subsystem to be
independently powered down through a control interface or
alternatively through register and OTP-configurable GPIOs.
The device offers a standby power consumption of 2.7V
200
mV
ILOAD =100mA, VOUT 1.8V to 2.7V
250
ILOAD =100mA, VOUT < 1.8V
400
Undervoltage
level
Quiescent
Current
VOUT
IQ
VOUT Falling
88
%
Normal mode, no load
30
A
Low power mode, LDOn_LP_MODE=0, no load
10
Low power mode, LDOn_LP_MODE=1, no load
Power Supply
Rejection Ratio
On Resistance
(Switch mode)
PSRR
RDSON
w
5
ILOAD = 1mA to 100mA
IQ (no load) + 1% of load
ILOAD = 50mA, = 1.71V
mA
%
0.025
%/V
Load Regulation
VOUT LOAD
ILOAD =1mA to 200mA
0.003
%/mA
Dropout Voltage
VIN - VOUT
ILOAD =100mA, VOUT =1.8V
95
mV
ILOAD =100mA, VOUT =2.5V
65
ILOAD =100mA, VOUT =3.3V
60
Undervoltage
level
Quiescent
Current
VOUT
IQ
VOUT Falling
93
%
Normal mode, no load
110
A
Low Power mode, no load
70
ILOAD = 1mA to 200mA
Power Supply
Rejection Ratio
Output noise
voltage
On Resistance
(Switch mode)
Current Limit
(Switch mode)
Start-up time
Shutdown time
PSRR
VOUT
RDSON
IQ (no load) + 0.1% of load
ILOAD = 100mA, = 1.71V
MAX
UNIT
+2.5
%
0.025
%/V
Load Regulation
VOUT LOAD
ILOAD =1mA to 150mA
0.004
%/mA
Dropout Voltage
VIN - VOUT
ILOAD =100mA, VOUT =1.8V
135
mV
ILOAD =100mA, VOUT =2.5V
100
ILOAD =100mA, VOUT =3.3V
90
Undervoltage
level
Quiescent
Current
Power Supply
Rejection Ratio
VOUT
IQ
PSRR
Output noise
voltage
VOUT
On Resistance
(Switch mode)
RDSON
VOUT Falling
Normal mode, no load
110
Low Power mode, no load
70
ILOAD = 1mA to 150mA
IQ (no load) + 0.1% of load
73
ILOAD = 75mA, 10kHz
69
ILOAD = 75mA, 100kHz
49
f=10Hz to 100kHz; VOUT=2.8V, ILOAD = 1mA
30
f=10Hz to 100kHz; VOUT=2.8V, ILOAD = 10mA
32
Start-up time
Shutdown time
dB
VRMS
32
VIN = 1.71V, ILOAD = 100mA
1000
VIN = 1.8V, ILOAD = 100mA
930
VIN = 2.5V, ILOAD = 100mA
610
VIN = 3.5V, ILOAD = 100mA
430
VOUT = 0V
250
tstart_up
No load, Output cap 4.7 µF, 90% of VOUT
70
tshut_down
No load, Output cap 4.7 µF, 10% of VOUT
ICL
A
ILOAD = 75mA,