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WM8581AGEFT/V

WM8581AGEFT/V

  • 厂商:

    CIRRUS(凌云)

  • 封装:

    TQFP48

  • 描述:

    ICCODECAUDS/DIPTXRX48TQFP

  • 数据手册
  • 价格&库存
WM8581AGEFT/V 数据手册
WM8581 w Multichannel CODEC with S/PDIF Transceiver DESCRIPTION FEATURES The WM8581 is a multi-channel audio CODEC with S/PDIF transceiver. The WM8581 is ideal for DVD and surround sound processing applications for home hi-fi, automotive and other audiovisual equipment. • • • Two independent audio data interfaces support I2S, Left Justified, Right Justified and DSP digital audio formats. Each audio interface can operate in either Master Mode or Slave Mode. The S/PDIF transceiver is IEC-60958-3 compatible and supports frame rates from 32k/s to 96k/s. It has four multiplexed inputs and one output. Status and error monitoring is built-in and results can reported over the serial interface or via GPO pins. S/PDIF Channel Block configuration is also supported. The device has two PLLs which can be configured independently to generate two system clocks for internal or external use. Device control and setup is via a 2-wire or 3-wire (SPI compatible) serial interface. The serial interface provides access to all features including channel selection, volume controls, mutes, de-emphasis, S/PDIF control/status, and power management facilities. Alternatively, the device has a Hardware Control Mode where device features can be enabled/disabled using selected pins. Audio Performance − − Integrated into the device is a stereo 24-bit multi-bit sigma delta ADC with support for digital audio output word lengths from 16-bit to 32-bit, and sampling rates from 8kHz to 192kHz. Also included are four stereo 24-bit multi-bit sigma delta DACs, each with a dedicated oversampling digital interpolation filter. Digital audio input word lengths from 16bits to 32-bits and sampling rates from 8kHz to 192kHz are supported. Each DAC channel has independent digital volume and mute control. Multi-channel CODEC with 4 Stereo DACs and 1 Stereo ADC Integrated S/PDIF / IEC-60958-3 transceiver • 103dB SNR (‘A’ weighted @ 48kHz) DAC -90dB THD (48kHz) DAC − 100dB SNR (‘A’ weighted @ 48kHz) ADC − -87dB THD (48kHz) ADC DAC Sampling Frequency: 8kHz – 192kHz • • • ADC Sampling Frequency: 8kHz – 192kHz Independent ADC and DAC Sample Rates 2 and 3-Wire Serial Control Interface with readback, or Hardware Control Interface • • GPO pins allow visibility of user selected status flags Programmable Audio Data Interface Modes − • • • • • I2S, Left, Right Justified or DSP − 16/20/24/32 bit Word Lengths Four independent stereo DAC outputs with independent digital volume controls Two Independent Master or Slave Audio Data Interfaces Flexible Digital Interface Routing with Clock Selection Control 2.7V to 5.5V Analogue, 2.7V to 3.6V Digital Supply Operation 48-lead TQFP Package APPLICATIONS • • • • Digital TV DVD Players and Receivers Surround Sound AV Processors and Hi-Fi systems Automotive Audio The device is available in a 48-lead TQFP package. WOLFSON MICROELECTRONICS plc To receive regular email updates, sign up at http://www.wolfsonmicro.com/enews/ Production Data, March 2009, Rev 4.7 Copyright ©2009 Wolfson Microelectronics plc WM8581 Production Data BLOCK DIAGRAM w PD, Rev 4.7, March 2009 2 WM8581 Production Data TABLE OF CONTENTS DESCRIPTION ............................................................................................................................................. 1 FEATURES .................................................................................................................................................. 1 APPLICATIONS ........................................................................................................................................... 1 BLOCK DIAGRAM ....................................................................................................................................... 2 TABLE OF CONTENTS............................................................................................................................... 3 PIN CONFIGURATION ................................................................................................................................ 4 ORDERING INFORMATION........................................................................................................................ 4 PIN DESCRIPTION ...................................................................................................................................... 5 MULTI-FUNCTION PINS .......................................................................................................................................... 6 ABSOLUTE MAXIMUM RATINGS .............................................................................................................. 8 RECOMMENDED OPERATING CONDITIONS .......................................................................................... 8 ELECTRICAL CHARACTERISTICS............................................................................................................ 9 TERMINOLOGY...................................................................................................................................................... 11 MASTER CLOCK TIMING ...................................................................................................................................... 12 DIGITAL AUDIO INTERFACE – MASTER MODE .................................................................................................. 13 DIGITAL AUDIO INTERFACE – SLAVE MODE ..................................................................................................... 14 CONTROL INTERFACE TIMING – 3-WIRE MODE ............................................................................................... 15 CONTROL INTERFACE TIMING – 2-WIRE MODE ............................................................................................... 15 DEVICE DESCRIPTION............................................................................................................................. 17 INTRODUCTION..................................................................................................................................................... 17 CONTROL INTERFACE OPERATION ................................................................................................................... 18 DIGITAL AUDIO INTERFACES .............................................................................................................................. 22 AUDIO DATA FORMATS........................................................................................................................................ 24 AUDIO INTERFACE CONTROL ............................................................................................................................. 28 DAC FEATURES .................................................................................................................................................... 30 ADC FEATURES .................................................................................................................................................... 37 DIGITAL ROUTING OPTIONS................................................................................................................................ 38 CLOCK SELECTION .............................................................................................................................................. 40 PHASE-LOCKED LOOPS AND S/PDIF CLOCKING (SOFTWARE MODE) .......................................................... 51 PHASE-LOCKED LOOPS AND S/PDIF CLOCKING (HARDWARE MODE).......................................................... 59 S/PDIF TRANSCEIVER.......................................................................................................................................... 59 S/PDIF TRANSMITTER .......................................................................................................................................... 60 S/PDIF RECEIVER ................................................................................................................................................. 63 POWERDOWN MODES......................................................................................................................................... 72 INTERNAL POWER ON RESET CIRCUIT............................................................................................................. 74 HARDWARE CONTROL MODE............................................................................................................................. 76 REGISTER MAP ........................................................................................................................................ 79 DIGITAL FILTER CHARACTERISTICS .................................................................................................... 95 DAC FILTER RESPONSES.................................................................................................................................... 95 DIGITAL DE-EMPHASIS CHARACTERISTICS...................................................................................................... 96 ADC FILTER RESPONSES.................................................................................................................................... 96 ADC HIGH PASS FILTER....................................................................................................................................... 97 APPLICATIONS INFORMATION............................................................................................................... 98 RECOMMENDED EXTERNAL COMPONENTS ..................................................................................................... 98 PACKAGE DIMENSIONS ........................................................................................................................ 100 IMPORTANT NOTICE.............................................................................................................................. 101 ADDRESS:............................................................................................................................................................ 101 w PD, Rev 4.7, March 2009 3 WM8581 Production Data PIN CONFIGURATION ORDERING INFORMATION DEVICE TEMPERATURE RANGE PACKAGE MOISTURE SENSITIVITY LEVEL PEAK SOLDERING TEMPERATURE WM8581AGEFT/V -40 to +85oC 48-lead TQFP (Pb-free) MSL2 260°C WM8581AGEFT/RV -40 to +85oC 48-lead TQFP (Pb-free, tape and reel) MSL2 260°C Note: Reel quantity = 2,200 w PD, Rev 4.7, March 2009 4 WM8581 Production Data PIN DESCRIPTION PIN NAME TYPE 1 VOUT4L Analogue Output DESCRIPTION 2 VOUT4R Analogue Output 3 PGND Supply 4 PVDD Supply 5 XTI Digital Input 6 XTO Digital Output 7 MFP7 Digital Input/Output Multi-Function Pin (MFP) 7. See Table 1 for details of all MFP pins. 8 MFP6 Digital Input/Output Multi-Function Pin (MFP) 6. See Table 1 for details of all MFP pins. 9 SPDIFOP Digital Output 10 MFP5 Digital Input/Output Multi-Function Pin (MFP) 5. See Table 1 for details of all MFP pins. 11 MFP4 Digital Input/Output Multi-Function Pin (MFP) 4. See Table 1 for details of all MFP pins. 12 MFP3 Digital Input/Output Multi-Function Pin (MFP) 3. See Table 1 for details of all MFP pins. 13 SPDIFIN1 Digital Input 14 CLKOUT Digital Output 15 DVDD Supply Digital positive supply 16 DGND Supply Digital ground 17 MUTE Digital Input/Output 18 DIN1 Digital Input Primary Audio Interface (PAIF) receiver data input 1 19 DIN2 Digital Input Primary Audio Interface (PAIF) receiver data input 2 20 DIN3 Digital Input Primary Audio Interface (PAIF) receiver data input 3 21 DIN4 Digital Input Primary Audio Interface (PAIF) receiver data input 4 22 PAIFRX_LRCLK Digital Input/Output Primary Audio Interface (PAIF) receiver left/right word clock 23 PAIFRX_BCLK Digital Input/Output Primary Audio Interface (PAIF) receiver bit clock 24 MCLK Digital Input/Output 25 DOUT Digital Output 26 PAIFTX_LRCLK Digital Input/Output Primary audio interface transmitter left/right word clock 27 MFP1 Digital Input/Output Multi-Function Pin (MFP) 1. See Table 1 for details of all MFP pins. 28 MFP2 Digital Input/Output Multi-Function Pin (MFP) 2. See Table 1 for details of all MFP pins. 29 HWMODE Digital Input 30 SWMODE Digital Input/Output 31 SDO Digital Output 32 SDIN Digital Input/Output 33 SCLK Digital Input Control interface clock 3-wire control interface latch signal / device address selection DAC channel 4 left output DAC channel 4 right output PLL ground PLL positive supply Crystal or CMOS clock input Crystal output S/PDIF transmitter output S/PDIF Receiver Input 1 PLL or crystal oscillator clock output DAC mute-all input/ All-DAC Infinite Zero Detect (IZD) flag output System Master clock; 256, 384, 512, 768, 1024 or 1152 fs Primary Audio Interface (PAIF) transmitter data output Configures control to be either Software Mode or Hardware Mode Configures software interface to be either 2-wire or 3-wire. See note 2. 3-wire control interface data output. See note 3. Control interface data input (and output under 2-wire control) 34 CSB Digital Input 35 AINR Analogue Input ADC Right Channel Input 36 AINL Analogue Input ADC Left Channel Input 37 ADCREFP Analogue Output ADC reference buffer decoupling pin; 10uF external decoupling 38 VMID Analogue Output Midrail divider decoupling pin; 10uF external decoupling 39 AGND Supply Analogue ground 40 AVDD Supply Analogue positive supply 41 VOUT1L Analogue Output DAC channel 1 left output 42 VOUT1R Analogue Output DAC channel 1 right output 43 VOUT2L Analogue Output DAC channel 2 left output 44 VOUT2R Analogue Output DAC channel 2 right output 45 VREFP Analogue Input DAC and ADC positive reference 46 VREFN Analogue Input DAC and ADC ground reference w PD, Rev 4.7, March 2009 5 WM8581 Production Data PIN NAME TYPE 47 VOUT3L Analogue Output DAC channel 3 left output DESCRIPTION 48 VOUT3R Analogue Output DAC channel 3 right output Notes : 1. Digital input pins have Schmitt trigger input buffers. Pins 32, 33, 34 are 5V tolerant. 2. In hardware control mode, pin 30 is used for UNLOCK flag output. 3. In hardware control mode, pin 31 is used for NON_AUDIO flag output. MULTI-FUNCTION PINS The WM8581 has 7 Multi-Function Input/Output pins (MFP1 etc.). The function and direction (input/output) of these pins reconfigured using the HWMODE input pin and software register control as shown below. If HWMODE is set, the MFPs have the function shown in column 1 of Table 1. If HWMODE is not set, and the register SAIF_EN is set, the MFPs have the function shown in column 2. Otherwise, the GPOnOP registers determine the MFP function as shown in columns 3 and 4. Y HWMODE = 1 N Y SAIF_EN = 1 N GPIOnOP PIN NAME HARDWARE CONTROL MODE FUNCTION 1 SECONDARY AUDIO INTERFACE FUNCTION 2 S/PDIF INPUT & INDEPENDENT CLOCKING 3 GENERAL PURPOSE OUTPUT FUNCTION 4 MFP1 PAIFTX_BCLK n/a1 PAIFTX_BCLK2 GPO1 1 MFP2 ADCMCLK n/a ADCMCLK3 GPO2 MFP3 DR1 n/a1 SPDIFIN2 GPO3 MFP4 DR2 SAIF_DIN SPDIFIN3 GPO4 MFP5 DR3 SAIF_DOUT SPDIFIN4 GPO5 MFP6 DR4 SAIF_BCLK GPO6 GPO6 MFP7 ALLPD SAIF_LRCLK GPO7 GPO7 Table 1 Multi-Function Pin Configuration Notes: 1. These pins are not used as part of the Secondary Audio Interface, so their function is that of either Column 3 or Column 4. 2. MFP1 usage can be described as follows: IF (ADC_CLKSEL = MCLK) AND (PAIFTXMS_CLKSEL = MCLK) THEN MFP1 = GPO1; ELSE MFP1 = PAIFTX_BCLK ; (default) Notes for MFP1: ADC_CLKSEL selected in REG 8, default is ADC_MCLK. PAIFTXMS_CLKSEL selects PLLACLK if PAIF sources SPDIF Rx, otherwise PAIFTXMS_CLKSEL selects ADC_CLK (register 8) w PD, Rev 4.7, March 2009 6 WM8581 Production Data 3. MFP2 usage can be described as follows: IF (ADC_CLKSEL ≠ ADCMCLK) AND (TX_CLKSEL ≠ ADCMCLK) (controlled by reg 8) (controlled by reg 8) AND (SAIFMS_CLKSEL ≠ ADCMCLK) THEN (controlled by reg 8) MFP2 = GPO2; ELSE MFP2 = ADCMCLK; PIN FUNCTION TYPE DESCRIPTION PAIFTX_BCLK Digital Input/Output Primary Audio Interface Transmitter (PAIFTX) Bit Clock ADCMCLK Digital Input Master ADC clock; 256fs, 384fs, 512fs ,786fs, 1024fs or 1152fs SAIF_DIN Digital Input Secondary Audio Interface (SAIF) Receiver data input SAIF_DOUT Digital Output Secondary Audio Interface (SAIF) Transmitter data output SAIF_BCLK Digital Input/Output Secondary Audio Interface (SAIF) Bit Clock SAIF_LRCLK Digital Input/Output Secondary Audio Interface (SAIF) Left/Right Word Clock SPDIFIN2/3/4 Digital Input S/PDIF Receiver Input GPO1 - GPO7 Digital Output General Purpose Output DR1/2/3/4 Digital Input Internal Digital Routing Configuration in Hardware Mode ALLPD Digital Input Chip Powerdown in Hardware Mode Table 2 Multi-Function Pin Description w PD, Rev 4.7, March 2009 7 WM8581 Production Data ABSOLUTE MAXIMUM RATINGS Absolute Maximum Ratings are stress ratings only. Permanent damage to the device may be caused by continuously operating at or beyond these limits. Device functional operating limits and guaranteed performance specifications are given under Electrical Characteristics at the test conditions specified. ESD Sensitive Device. This device is manufactured on a CMOS process. It is therefore generically susceptible to damage from excessive static voltages. Proper ESD precautions must be taken during handling and storage of this device. The WM8581 has been classified as MSL1, which has an unlimited floor life at 0.5465fs -65 dB DAC Filter ±0.05 dB Passband 0.444fs -3dB 0.487fs ±0.05 Passband ripple Stopband dB 0.555fs Stopband Attenuation f > 0.555fs -60 dB Table 82 Digital Filter Characteristics DAC FILTER RESPONSES 0.2 0 0.15 -20 -40 Response (dB) Response (dB) 0.1 -60 0.05 0 -0.05 -80 -0.1 -100 -0.15 -120 -0.2 0 0.5 1 1.5 Frequency (Fs) 2 2.5 3 Figure 43 DAC Digital Filter Frequency Response – 44.1, 48 and 96KHz 0 0.05 0.1 0.15 0.2 0.25 0.3 Frequency (Fs) 0.35 0.4 0.45 0.5 Figure 44 DAC Digital Filter Ripple –44.1, 48 and 96kHz 0.2 0 0 -0.2 Response (dB) Response (dB) -20 -40 -0.4 -0.6 -60 -0.8 -80 -1 0 0.2 0.4 0.6 Frequency (Fs) 0.8 Figure 45 DAC Digital Filter Frequency Response – 192KHz w 1 0 0.05 0.1 0.15 0.2 0.25 0.3 Frequency (Fs) 0.35 0.4 0.45 0.5 Figure 46 DAC Digital Filter Ripple – 192kHz PD, Rev 4.7, March 2009 95 WM8581 Production Data DIGITAL DE-EMPHASIS CHARACTERISTICS 0 0.4 0.3 -2 Response (dB) Response (dB) 0.2 -4 -6 0.1 0 -0.1 -0.2 -8 -0.3 -10 -0.4 0 5 10 Frequency (kHz) 15 20 0 Figure 47 De-Emphasis Frequency Response (44.1KHz) 5 10 Frequency (kHz) 15 20 Figure 48 De-Emphasis Error (44.1KHz) 0 1 0.8 -2 0.6 Response (dB) Response (dB) 0.4 -4 -6 0.2 0 -0.2 -0.4 -8 -0.6 -0.8 -10 -1 0 5 10 15 Frequency (kHz) 20 0 Figure 49 De-Emphasis Frequency Response (48kHz) 5 10 15 Frequency (kHz) 20 Figure 50 De-Emphasis Error (48kHz) ADC FILTER RESPONSES 0.02 0 0.015 0.01 Response (dB) Response (dB) -20 -40 0.005 0 -0.005 -60 -0.01 -0.015 -80 -0.02 0 0.5 1 1.5 Frequency (Fs) 2 2.5 Figure 51 ADC Digital Filter Frequency Response w 3 0 0.05 0.1 0.15 0.2 0.25 0.3 Frequency (Fs) 0.35 0.4 0.45 0.5 Figure 52 ADC Digital Filter Ripple PD, Rev 4.7, March 2009 96 WM8581 Production Data ADC HIGH PASS FILTER The WM8581 has a selectable digital high pass filter to remove DC offsets. The filter response is characterised by the following polynomial. H(z) = 1 - z-1 1 - 0.9995z-1 Response (dB) 0 -5 -10 -15 0 0.0005 0.001 Frequency (Fs) 0.0015 0.002 Figure 53 ADC Highpass Filter Response w PD, Rev 4.7, March 2009 97 WM8581 Production Data APPLICATIONS INFORMATION RECOMMENDED EXTERNAL COMPONENTS Figure 54 Recommended–External Components – Hardware w PD, Rev 4.7, March 2009 98 Production Data WM8581 Figure 55 Recommended–External Components – Software w PD, Rev 4.7, March 2009 99 WM8581 Production Data PACKAGE DIMENSIONS FT: 48 PIN TQFP (7 x 7 x 1.0 mm) b DM004.C e 36 25 37 24 E1 48 E 13 1 12 Θ D1 c D L A A2 A1 -Cccc C Symbols A A1 A2 b c D D1 E E1 e L Θ ccc REF: SEATING PLANE Dimensions (mm) MIN NOM MAX --------1.20 0.05 ----0.15 0.95 1.00 1.05 0.17 0.22 0.27 0.09 ----0.20 9.00 BSC 7.00 BSC 9.00 BSC 7.00 BSC 0.50 BSC 0.45 0.60 0.75 o o o 3.5 7 0 Tolerances of Form and Position 0.08 JEDEC.95, MS-026 NOTES: A. ALL LINEAR DIMENSIONS ARE IN MILLIMETERS. B. THIS DRAWING IS SUBJECT TO CHANGE WITHOUT NOTICE. C. BODY DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSION, NOT TO EXCEED 0.25MM. D. MEETS JEDEC.95 MS-026, VARIATION = ABC. REFER TO THIS SPECIFICATION FOR FURTHER DETAILS. w PD, Rev 4.7, March 2009 100 Production Data WM8581 IMPORTANT NOTICE Wolfson Microelectronics plc (“Wolfson”) products and services are sold subject to Wolfson’s terms and conditions of sale, delivery and payment supplied at the time of order acknowledgement. Wolfson warrants performance of its products to the specifications in effect at the date of shipment. Wolfson reserves the right to make changes to its products and specifications or to discontinue any product or service without notice. Customers should therefore obtain the latest version of relevant information from Wolfson to verify that the information is current. Testing and other quality control techniques are utilised to the extent Wolfson deems necessary to support its warranty. Specific testing of all parameters of each device is not necessarily performed unless required by law or regulation. In order to minimise risks associated with customer applications, the customer must use adequate design and operating safeguards to minimise inherent or procedural hazards. Wolfson is not liable for applications assistance or customer product design. The customer is solely responsible for its selection and use of Wolfson products. Wolfson is not liable for such selection or use nor for use of any circuitry other than circuitry entirely embodied in a Wolfson product. Wolfson’s products are not intended for use in life support systems, appliances, nuclear systems or systems where malfunction can reasonably be expected to result in personal injury, death or severe property or environmental damage. Any use of products by the customer for such purposes is at the customer’s own risk. Wolfson does not grant any licence (express or implied) under any patent right, copyright, mask work right or other intellectual property right of Wolfson covering or relating to any combination, machine, or process in which its products or services might be or are used. Any provision or publication of any third party’s products or services does not constitute Wolfson’s approval, licence, warranty or endorsement thereof. Any third party trade marks contained in this document belong to the respective third party owner. Reproduction of information from Wolfson datasheets is permissible only if reproduction is without alteration and is accompanied by all associated copyright, proprietary and other notices (including this notice) and conditions. Wolfson is not liable for any unauthorised alteration of such information or for any reliance placed thereon. Any representations made, warranties given, and/or liabilities accepted by any person which differ from those contained in this datasheet or in Wolfson’s standard terms and conditions of sale, delivery and payment are made, given and/or accepted at that person’s own risk. Wolfson is not liable for any such representations, warranties or liabilities or for any reliance placed thereon by any person. The product described in this datasheet incorporates clocking technology that has been licensed from Sonopsis Ltd. which is protected by patents including EP1611684B1 and US7495515. Additional patent applications are pending. ADDRESS: Wolfson Microelectronics plc Westfield House 26 Westfield Road Edinburgh EH11 2QB United Kingdom Tel :: +44 (0)131 272 7000 Fax :: +44 (0)131 272 7001 Email :: sales@wolfsonmicro.com w PD, Rev 4.7, March 2009 101
WM8581AGEFT/V 价格&库存

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