CPC1466DTR

CPC1466 Broadband ADSL/VDSL DC Termination IC Features • Meets wetting (sealing) current requirements per ITU-T G.991.2 • Integrated bridge rectifier for polarity correction • Uses inexpensive opto-coupler for DC sealing current monitoring • Electronic inductor, breakover, and latch circuits • Current limiting and excess power protection circuits • ADSL/VDSL compatible with low-pass filter network • MLT and SARTS compatible • Compatible with portable test sets • Small SOIC or Micro-Leadframe Package (MLP) • MLP package 60 percent smaller than SOIC Description The CPC1466 is a DC Termination IC for broadband ADSL/VDSL applications. The high-voltage, monolithic device provides a path for DC wetting (sealing) current in customer premises equipment (CPE) to eliminate phone line corrosion on DSL twisted-pair copper lines without telephone voice services (i.e. only broadband services). Internally, a bridge rectifier provides a polarity-insensitive DC termination for DSL loop sealing current. The IC includes an electronic inductor, break-over and latch circuits, current limit and excess power protection. A sealing current detect output provides the means to monitor the loop for the presence of sealing current in the loop. The CPC1466 is manufactured in Clare’s high voltage BCDMOS process that is used extensively in telephony applications worldwide. Applications • • • • • ADSL/VDSL broadband modems Router and bridge customer premises equipment Leased line equipment Mechanized Loop Test (MLT) networks Switched Access Remote Test System (SARTS) networks Figure 1. CPC1466 Block Diagram 1 2 3 4 5 6 7 8 DS-CPC1466 - R00B PR EL IM IN AR Y Ordering Information Part Number Description CPC1466D PR+ NC TC 16 15 14 13 12 11 10 9 TIP NC Electronic Inductor, Breakover, Latch, and Opto Driver NC NC RS DC Termination IC, 16-pin SOIC in tubes, 47/tube DC Termination IC, 16-pin SOIC tape and reel, CPC1466DTR 1000/reel DC Termination IC, 16-pin MLP in tubes, CPC1466M 52/tube DC Termination IC, 16-pin MLP tape and reel, CPC1466MTR 1000/reel NC Bridge Rectifier NC PD RING NC PR- NC Current Limit and Excess Power Protection COM www.clare.com 1 CPC1466 1. Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.1 Package Pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.2 Pin Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.3 Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.4 Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.4.1 DC Characteristics, Normal Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.4.2 AC Characteristics, Normal Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.4.3 Transition Characteristics, Normal Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.5 Sealing Current Monitor Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.5.1 LED Trigger Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2. Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.2 Surge Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.3 Bridge Rectifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.4 State Transitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.4.1 Activation - On-State . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.4.2 Deactivation - Off-State . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.5 Photo-Diode (PD) Output Behavior . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.6 On-State Behavior . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.6.1 Typical Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.6.2 Over-Voltage Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3. Manufacturing Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.1 Mechanical Dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.1.1 SOIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.1.2 MLP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.2 Printed Circuit Board Layout Pattern . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.2.1 SOIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.2.2 MLP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.3 Tape and Reel Packaging . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.3.1 SOIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.3.2 MLP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.4 Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.4.1 Moisture Reflow Sensitivity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.4.2 Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.5 Washing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 3 3 3 4 4 4 4 8 8 A 10 10 10 10 10 10 10 10 11 11 11 12 12 12 13 14 14 14 14 14 15 15 15 15 15 2 PR www.clare.com EL IM IN RY R00B 1. Specifications 1.1 Package Pinout 1.2 Pin Description Pin 1 PR+ NC TIP NC NC RING NC PR1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 TC NC NC RS NC PD NC COM Name PR+ NC TIP NC NC NC Description Protection resistor positive side No connection Tip Lead No connection No connection No connection 2 3 4 5 6 7 8 9 RING Ring lead PRNC PD NC RS NC NC TC Protection resistor negative side No connection No connection No connection No connection EL IM IN A RY COM Common 10 12 14 15 11 13 Current limiting resistor 16 Timing capacitor 1.3 Absolute Maximum Ratings Parameter Maximum Voltage (T to R, R to T)* Power dissipation Operating temperature Operating relative humidity Storage temperature -40 5 -40 www.clare.com Photo-diode (LED input current) Minimum Maximum Unit 300 1 +85 95 +125 V W °C % °C PR R00B Electrical absolute maximum ratings are at 25°C. Absolute maximum ratings are stress ratings. Stresses in excess of these ratings can cause permanent damage to the device. Functional operation of the device at conditions beyond those indicated in the operational sections of this data sheet is not implied. 3 CPC1466 1.4 Electrical Characteristics Unless otherwise specified, minimum and maximum values are guaranteed by production testing requirements. Typical values are characteristic of the device and are the result of engineering evaluations. In addition, typical values are provided for 1.4.1 DC Characteristics, Normal Operation For operational templates: (see Figure 2 on page 5) and (see Figure 3 on page 5). Parameter Activate/Non-activate Voltage Breakover current DC Voltage drop DC leakage current Hold/Release current Minimum on current VOFF = 20 V Active State VON < 54 V Off State Active State, 1 mA ≤ ISL ≤ 20 mA Conditions Symbol VAN IBO VON IH/R Minimum 30.0 Typical 35.0 0.5 1.5 38 12.5 0.5 Maximum 39.0 1 15 5 1.0 70 Unit V mA V µA mA mA mA mA mA mA mA informational purposes only and are not part of the testing requirements. All electrical specifications are provided for TA=25°C 54 V ≤ VON ≤ 100 V for 2 seconds, source resistance 200 Ω to 4 kΩ VON > 100 V Maximum on current VON ≤ 70 V VON > 70 V EL IM Active State Conditions IN A RY ILKG 0.1 20 IMIN1 IMIN2 IMIN3 9.0 0 45 0.1 IMAX1 38.4 IMAX2 IPD 0.2 0.3 Symbol ZMT D Minimum 10 40 Typical 38 70 Symbol t1 t2 Minimum 3.0 3.0 Typical 13 - V ON ---------1k Ω Photodiode drive current 10 1.4.2 AC Characteristics, Normal Operation For test conditions: (see Figure 4 on page 6). Maximum - Parameter AC impedance Unit kΩ dB Linearity distortion PR 200 Hz to 50 kHz ƒ = 200 Hz to 40 kHz, ISL = 1 mA to 20 mA, VAPP ≤ 12 VPP - 1.4.3 Transition Characteristics, Normal Operation For activation/deactivation test conditions: (see Figure 5 on page 7). Parameter Activate time Deactivate time Conditions (see Figure 6 on page 7) (see Figure 7 on page 7) Maximum 50 100 Unit ms ms 4 www.clare.com R00B Figure 2. I-V Requirements Template, 0 V to 50 V 1A 100 mA VON 10 mA On State IMIN1 VAN Transition Region IHR IBO IMAX1 Current 1 mA 100 µA 10 µA 1 µA 0 0 10 Off State 20 IN A RY ILKG Transition Region 30 40 IMAX2 50 Absolute Voltage (V) 1A 100 mA 10 mA PR Current 1 mA 100 µA 10 µA 1 µA 0 0 EL IM IMAX1 54 V, 9 mA IMIN2 IMIN1 50 100 Figure 3. I-V Requirements Template, 0 V to 250 V 70 V, 70 mA 100 V, 0 mA 150 200 250 Absolute Voltage (V) R00B www.clare.com 5 CPC1466 Figure 4. Test Circuit for ac Impedance and Linearity 68 µF Vmt DUT VAPP ac generator 1 - 20 mA dc current source 6 PR EL IM 1000 × V mt Z mt = --------------------------V sig V mt 1000 Linearity = 20 log --------------------------------------- + 20 log ----------V sig2ndHarmonic 67.5 www.clare.com IN A RY Vsig ISL 1k Ω R00B Figure 5. Test Circuit for Activate and Deactivate Times 1 µF Pulse generator DUT 85 mH 85 Ω Figure 6. Applied Waveform for Activation Test 43.5 V 40 V t1 30 V 20 V 10 V EL IM 500 ms 0 Figure 7. Applied Waveform for Deactivation Test PR 2.0 mA 1.5 mA Current source limited to 30 V Measure 500 ms 1.0 mA 0.5 mA 0 t2 R00B www.clare.com IN A RY Source Impedance 200 Ω to 4k Ω Measure 7 CPC1466 1.5 Sealing Current Monitor Characteristics 1.5.1 LED Trigger Characteristics For test conditions: (see Figure 8 on page 8). Parameter Applied dc battery Voltage Frequency (pulses per second) Percent break Number of pulses Total Loop Resistance Required opto-coupler response Pulse width (opto on) Pulse width (opto off) (see Figure 8 on page 8) Number of applied pulses per make/break Conditions Symbol Minimum -43.5 4 40 6 200 Typical 1 Maximum -56 8 60 10 4000 Unit VDC % Ω ms ms (see Figure 8 on page 8) Figure 8. Test Circuit for LED Operation Series rotary dial EL IM 25Ω 1µF 85mH 85Ω 25Ω RING TIP Shunt rotary dial PR CPC1466 1 2 3 4 5 6 7 PR+ NC TC NC NC 16 15 14 13 12 11 10 TIP NC NC 68.1Ω 1% 1/4 W VCC 5V 1 2 3 6 75kΩ 5 4 RS NC PD NC COM IN A RY TON 10 10 TOFF RLOOP 200Ω - 4kΩ 900Ω - 4.5kΩ (MLT) + 1µF VBAT -43.5V to -56V RING NC PR- VOUT 2.2kΩ 5% 4W 8 9 8 www.clare.com R00B R00B CPC1466 1µF PR 1 TC NC 15 PR+ 16 DC Blocking Capacitor 30 - 35mH with Loop Current 2 NC TIP NC 14 NC RS 13 NC RING PD 11 NC NC PRCOM 10 Bridge Rectifier NC 12 3 4 5 6 7 8 L1 68 1% 1/4W Electronic Inductor, Breakover, Latch, and Opto Driver TIP SP1 C1 Transceiver L2 SSR 2.2k 5% 4W Current Limit and Excess Power Protection 9 RING Figure 9. Typical ADSL/VDSL Application Diagram www.clare.com 1 6 2 5 3 4 CPC1225N Solid State Relay EL IM VCC IN A RY 75k Digital Control Circuitry 9 CPC1466 2. Functional Description 2.1 Introduction The CPC1466 can be used for a number of DSL designs requiring a dc hold circuit such as ADSL modem applications. Typical ADSL applications will use a filter circuit design similar to the one shown in Figure 9‚ “Typical ADSL/VDSL Application Diagram” on page 9. The DC Termination IC performs two fundamental functions in an ADSL modem application; as an electronic inductor providing a low impedance dc termination with a high impedance ac termination and second as part of the sealing current detection system for automated line sensing. This function provides an excellent method to monitor for the presence of sealing current. Generally, loss of sealing current indicates loop loss. As can be seen in the application circuit in Figure 9 on page 9, CPC1466 designs require few external components. For the CPC1466, all that is needed is a circuit protector, two resistors and a capacitor. To ensure DSL signal integrity over a wide variety of conditions a POTS splitter type filter is recommended to isolate the DSL traffic from the termination. 2.4 State Transitions The dc tip to ring voltage-current characteristics of the CPC1466 are shown in Figure 2‚ “I-V Requirements Template, 0 V to 50 V”, and in Figure 3‚ “I-V Requirements Template, 0 V to 250 V” on page 5. Transition timings are illustrated in Figure 6‚ “Applied Waveform for Activation Test”, and in Figure 7‚ “Applied Waveform for Deactivation Test”. The test configuration for these timings is given in Figure 5‚ “Test Circuit for Activate and Deactivate Times”. All timing figures are located on page 7. State transition timings are set by the 1 µF capacitor connected between the TC and COM pins. 2.4.1 Activation - On-State 2.2 Surge Protection EL IM Although the CPC1466 self protects via current limiting, it requires over-voltage surge protection to protect against destructive over-voltage transients. Clare recommends the use of a crowbar-type surge protector to limit the surge voltage seen by the CPC1466 to less than 250 V. The protection device must be able to withstand the surge requirements specified by the appropriate governing agency in regions where the product will be deployed. Teccor, Inc. and Bourns, Inc. make suitable surge protectors for most applications. Devices such as Teccor’s P1800SD or P2000SD Sidactors and Bourns’ TISP4220H3BJ or TISP4240H3BJ thyristors should provide suitable protection. PR 2.3 Bridge Rectifier The bridge rectifier in the CPC1466 ensures that the device is polarity insensitive and provides consistent operational characteristics if the tip to ring polarity is reversed. 2.5 Photo-Diode (PD) Output Behavior Output from the PD pin provides a minimum of 0.2 mA of photodiode drive current for an optocoupler’s LED anytime sealing current exceeds 1 mA. Because LED current is interrupted whenever loop current is interrupted, the optocoupler provides an 10 www.clare.com R00B IN A RY 2.4.2 Deactivation - Off-State Application of battery voltage to the loop causes the CPC1466 to conduct whenever the voltage exceeds approximately 35 V. With application of sufficient voltage applied across the tip and ring terminals, the CPC1466 will initially conduct a nominal 150 µA of sealing current for approximately 20 ms prior to activation. Once activated, the CPC1466 will remain in the on state for as long as the loop current exceeds a nominal 0.5 mA. The CPC1466 turn-on timing circuit assures device activation will occur within 50 ms of an applied voltage greater than 43.5 V but not within the first 3 ms. While the CPC1466 activation protocol is based on an initial minimum voltage level, deactivation is based on a diminished sealing current level. Deactivation occurs when the nominal sealing current level drops below 0.5 mA with guaranteed deactivation occurring for sealing current levels less than 0.1 mA The turn-off timing circuit deactivates the sealing current hold circuit when 1 mA of sealing current has been removed for 100 ms but ignores periods of loss up to 3 ms. excellent means of indicating loop availability for designs with a full time sealing current requirement. In addition, for pulsed sealing current loops, the status from this detector when used in conjuntion with the timing of modem retraining events can be used as an indicator to determine if the sealing current event is clearing line impairments. 2.6 On-State Behavior 2.6.1 Typical Conditions On-state sealing current levels are determined by the network’s power feed circuit and the loop’s dc impedance. To compensate for low loop resistance or very high loop voltage, the CPC1466 limits the maximum sealing current to 70 mA. The CPC1466 manages package power dissipation by shunting excess sealing current through the 2.2 kΩ 4W power resistor located between the PR+ and PRpins. 2.6.2 Over-Voltage Conditions Potentials in excess of 100 V applied to the tip and ring interface will cause the CPC1466 to disable the sealing current hold circuit and enter a standby state with very little current draw. Once the over-voltage condition is removed, the CPC1466 automatically resumes normal operation. R00B PR www.clare.com EL IM IN A RY 11 CPC1466 3. Manufacturing Information 3.1 Mechanical Dimensions 3.1.1 SOIC 0.400±0.015 (10.160±0.381) NOTES: 1. Coplanarity = 0.004 (0.1016) max. 2. Leadframe thickness does not include solder plating (1000 microinch maximum). 3. Sum of package height, standoff, and coplanarity does not exceed 0.083 (2.108). PIN 16 0.408±0.005 (10.363±0.127) 0.295±0.005 (7.493±0.127) PIN 1 0.050 TYP (1.270 TYP) 0.083 MAX (2.108 MAX.) SEE NOTE 3 0.016 TYP (0.406 TYP.) EL IM IN A RY 0.025 X 45˚ (0.635 X 45˚) 0.040 TYP (1.016 TYP) 0.010 ±0.0005 (0.254 ±0.0127) DIMENSIONS inches (mm) 0.350 TYP (8.890 TYP.) LEAD TO PACKAGE STANDOFF: MIN: 0.001 (0.0254) MAX: 0.004 (0.102) 12 PR www.clare.com 0.020±0.004 (0.508±0.1016) R00B 3.1.2 MLP 7.00 ± 0.25 (0.276 ± 0.01) 6.00 ± 0.25 (0.236 ± 0.01) INDEX AREA 0.90 ± 0.10 (0.035 ± 0.004) TOP VIEW 0.23 (0.009) 0.55 ± 0.10 (0.022 ± 0.004) 16 Terminal Tip 0.80 (0.032) R00B PR www.clare.com EL IM IN A RY EXPOSED METALLIC PAD 0.02, + 0.03, - 0.02 (0.0008, + 0.0012, - 0.0008) 0.33, + 0.07, - 0.05 (0.013, + 0.003, - 0.002) 1 0.55 ± 0.10 (0.022 ± 0.004) SIDE VIEW SEATING PLANE 0.20 (0.008) 1.80 (0.071) 4.00 ± 0.05 (0.157 ± 0.002) 0.40 (0.016) 6.00 ± 0.05 (0.236 ± 0.002) 0.55 ± 0.10 (0.022 ± 0.004) Dimensions mm (inch) BOTTOM VIEW 13 CPC1466 3.2 Printed Circuit Board Layout Pattern 3.2.1 SOIC 3.2.2 MLP 0.40 (0.016) 1.27 (0.050) 0.65 (0.026) 1.15 (0.045) 5.70 (0.224) 9.30 (0.366) 1.90 (0.075) 0.43 (0.017) 1.15 (0.045) 0.60 (0.024) DIMENSIONS mm (inches) IN A RY 0.40 (0.016) 0.80 (0.031) DIMENSIONS mm (inches) NOTE: As the metallic pad on the bottom of the MLP package is connected to the substrate of the die, Clare recommends that no printed circuit board traces or vias be placed under this area. 3.3 Tape and Reel Packaging 3.3.1 SOIC Tape and Reel Packaging for 16-Pin SOIC Package 330.2 Dia (13.00 Dia) EL IM Top Cover Tape P=12.00 (0.47) K0=3.20 + 0.15 (0.193 + 0.01) K1=2.70 + 0.15 (0.106 + 0.01) B0=10.70 + 0.15 (0.421 + 0.01) Top Cover Tape Thickness 0.102 Max (0.004 Max) W=16.00 + 0.30 (0.630 + 0.010) PR A0=10.90 + 0.15 (0.429 + 0.010) Dimensions mm (inches) Embossed Carrier User Direction of Feed Embossment NOTE: Tape dimensions not shown comply with JEDEC Standard EIA-481-2 14 www.clare.com R00B 3.3.2 MLP Tape and Reel Packaging for 6mm x 7mm 16-Pin MLP Package 330.2 Dia (13.00 Dia) Top Cover Tape Thickness 0.102 Max (0.004 Max) Pin 1 W=16.00 + 0.30 (0.630 + 0.012) B0=7.24 + 0.10 (0.285 + 0.004) Embossed Carrier K0=1.61 + 0.10 (0.063 + 0.004) IN A RY 3.4.2 Reflow Profile 3.5 Washing P=12.00 + 0.10 (0.472 + 0.004) A0=6.24 + 0.10 (0.246 + 0.004) Dimensions mm (inches) Embossment NOTE: Tape dimensions not shown comply with JEDEC Standard EIA-481-2 3.4 Soldering 3.4.1 Moisture Reflow Sensitivity Clare has characterized the moisture reflow sensitivity for this product using IPC/JEDEC standard J-STD-020. Moisture uptake from atmospheric humidity occurs by diffusion. During the solder reflow process, in which the component is attached to the PCB, the whole body of the component is exposed to high process temperatures. The combination of moisture uptake and high reflow soldering temperatures may lead to moisture induced delamination and cracking of the component. To prevent this, this component must be handled in accordance with IPC/JEDEC standard J-STD-033 per the labeled moisture sensitivity level (MSL), level 1 for the SOIC package, and level 3 for the MLP package. EL IM For proper assembly, this component must be processed in accordance with the current revision of IPC/JEDEC standard J-STD-020. Failure to follow the recommended guidelines may cause permanent damage to the device resulting in impaired performance and/or a reduced lifetime expectancy. Clare does not recommend ultrasonic cleaning of this part. For additional information please visit www.clare.com Clare, Inc. makes no representations or warranties with respect to the accuracy or completeness of the contents of this publication and reserves the right to make changes to specifications and product descriptions at any time without notice. Neither circuit patent licenses or indemnity are expressed or implied. Except as set forth in Clare’s Standard Terms and Conditions of Sale, Clare, Inc. assumes no liability whatsoever, and disclaims any express or implied warranty relating to its products, including, but not limited to, the implied warranty of merchantability, fitness for a particular purpose, or infringement of any intellectual property right. The products described in this document are not designed, intended, authorized, or warranted for use as components in systems intended for surgical implant into the body, or in other applications intended to support or sustain life, or where malfunction of Clare’s product may result in direct physical harm, injury, or death to a person or severe property or environmental damage. Clare, Inc. reserves the right to discontinue or make changes to its products at any time without notice. Specifications: DS-CPC1466 - R00B © Copyright 2007, Clare, Inc. All rights reserved. Printed in USA. 6/29/2007 R00B PR www.clare.com 15