CX06833-3

CX06833-3x/4x SMXXD Modem V.92/V.34/V.32bis Modem in 144-Pin TQFP with Optional CX20442 Voice Codec Data Sheet Doc. No. 102228B July 1, 2003 CX06833-3x/4x SMXXD Modem Data Sheet Revision Record Revision B A Date 7/1/2003 6/13/2003 Comments Rev. B release. Initial release. © 2003 Conexant Systems, Inc. All Rights Reserved. Information in this document is provided in connection with Conexant Systems, Inc. (“Conexant”) products. These materials are provided by Conexant as a service to its customers and may be used for informational purposes only. Conexant assumes no responsibility for errors or omissions in these materials. Conexant may make changes to specifications and product descriptions at any time, without notice. Conexant makes no commitment to update the information and shall have no responsibility whatsoever for conflicts or incompatibilities arising from future changes to its specifications and product descriptions. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document. Except as provided in Conexant’s Terms and Conditions of Sale for such products, Conexant assumes no liability whatsoever. THESE MATERIALS ARE PROVIDED “AS IS” WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESS OR IMPLIED, RELATING TO SALE AND/OR USE OF CONEXANT PRODUCTS INCLUDING LIABILITY OR WARRANTIES RELATING TO FITNESS FOR A PARTICULAR PURPOSE, CONSEQUENTIAL OR INCIDENTAL DAMAGES, MERCHANTABILITY, OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. CONEXANT FURTHER DOES NOT WARRANT THE ACCURACY OR COMPLETENESS OF THE INFORMATION, TEXT, GRAPHICS OR OTHER ITEMS CONTAINED WITHIN THESE MATERIALS. CONEXANT SHALL NOT BE LIABLE FOR ANY SPECIAL, INDIRECT, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, INCLUDING WITHOUT LIMITATION, LOST REVENUES OR LOST PROFITS, WHICH MAY RESULT FROM THE USE OF THESE MATERIALS. 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For technical questions, contact your local Conexant sales office or field applications engineer. ii Conexant 102228A CX06833-3x/4x SMXXD Modem Data Sheet Contents 1. Introduction..........................................................................................................................................1-1 1.1 1.2 1.3 1.4 Overview ......................................................................................................................................................................... 1-1 Applications .................................................................................................................................................................... 1-2 Features .......................................................................................................................................................................... 1-4 1.3.1 General Modem Features ............................................................................................................................... 1-4 Technical Overview......................................................................................................................................................... 1-5 1.4.1 General Description ........................................................................................................................................ 1-5 1.4.2 MCU Firmware................................................................................................................................................ 1-6 1.4.3 Operating Modes ............................................................................................................................................ 1-6 1.4.3.1 Data/Fax Modes.......................................................................................................................... 1-6 1.4.3.2 V.44 Data Compression.............................................................................................................. 1-7 1.4.3.3 Country Support......................................................................................................................... 1-7 1.4.3.4 TAM Mode.................................................................................................................................. 1-7 1.4.3.5 Speakerphone Mode (S Models)................................................................................................ 1-8 1.4.4 Reference Designs.......................................................................................................................................... 1-9 Hardware Description ..................................................................................................................................................... 1-9 1.5.1 CX06833 Modem Device ................................................................................................................................ 1-9 1.5.2 CX20442 Voice Codec .................................................................................................................................... 1-9 AT Commands .............................................................................................................................................................. 1-10 Serial DTE Interface Operation........................................................................................................................................ 2-1 2.1.1 Automatic Speed/Format Sensing .................................................................................................................. 2-1 Parallel Host Bus Interface Operation............................................................................................................................. 2-2 Establishing Data Modem Connections .......................................................................................................................... 2-2 2.3.1 Dialing ............................................................................................................................................................ 2-2 2.3.2 Telephone Number Directory ......................................................................................................................... 2-2 2.3.3 Modem Handshaking Protocol ....................................................................................................................... 2-2 2.3.4 Call Progress Tone Detection ......................................................................................................................... 2-2 2.3.5 Answer Tone Detection .................................................................................................................................. 2-2 2.3.6 Ring Detection................................................................................................................................................ 2-2 2.3.7 Billing Protection ............................................................................................................................................ 2-3 2.3.8 Connection Speeds......................................................................................................................................... 2-3 2.3.9 Automode ....................................................................................................................................................... 2-3 1.5 1.6 2.1 2.2 2.3 2. Technical Specifications .......................................................................................................................2-1 102228A Conexant iii CX06833-3x/4x SMXXD Modem Data Sheet 2.4 Data Mode ...................................................................................................................................................................... 2-4 2.4.1 Speed Buffering (Normal Mode) .................................................................................................................... 2-4 2.4.2 Flow Control ................................................................................................................................................... 2-4 2.4.3 Escape Sequence Detection ........................................................................................................................... 2-4 2.4.4 BREAK Detection ............................................................................................................................................ 2-4 2.4.5 Telephone Line Monitoring............................................................................................................................. 2-4 2.4.6 Fall Forward/Fallback (V.92/V.90/V.34/V.32 bis/V.32) ................................................................................... 2-4 2.4.7 Retrain ............................................................................................................................................................ 2-5 2.4.8 Programmable Inactivity Timer ...................................................................................................................... 2-5 2.4.9 DTE Signal Monitoring (Serial DTE Interface Only) ........................................................................................ 2-5 V.92 Features.................................................................................................................................................................. 2-5 2.5.1 Modem-on-Hold ............................................................................................................................................. 2-5 2.5.2 Quick Connect ................................................................................................................................................ 2-6 2.5.3 PCM Upstream ............................................................................................................................................... 2-6 Error Correction and Data Compression......................................................................................................................... 2-6 2.6.1 V.42 Error Correction ..................................................................................................................................... 2-6 2.6.2 MNP 2-4 Error Correction .............................................................................................................................. 2-6 2.6.3 V.44 Data Compression.................................................................................................................................. 2-6 2.6.4 V.42 bis Data Compression ............................................................................................................................ 2-6 2.6.5 MNP 5 Data Compression .............................................................................................................................. 2-7 Telephony Extensions..................................................................................................................................................... 2-7 2.7.1 Line In Use Detection ..................................................................................................................................... 2-7 2.7.2 Extension Pickup Detection ............................................................................................................................ 2-7 2.7.3 Remote Hangup Detection ............................................................................................................................. 2-8 Fax Class 1 and Fax Class 1.0 Operation ........................................................................................................................ 2-8 Point-of-Sales Support ................................................................................................................................................... 2-8 Voice/Audio Mode .......................................................................................................................................................... 2-8 2.10.1 Online Voice Command Mode ........................................................................................................................ 2-8 2.10.2 Voice Receive Mode ....................................................................................................................................... 2-8 2.10.3 Voice Transmit Mode ..................................................................................................................................... 2-9 2.10.4 Full-Duplex Receive and Transmit Mode........................................................................................................ 2-9 2.10.5 Audio Mode .................................................................................................................................................... 2-9 2.10.6 Tone Detectors ............................................................................................................................................... 2-9 2.10.7 Speakerphone Mode....................................................................................................................................... 2-9 V.80 Synchronous Access Mode (SAM) - Video Conferencing ...................................................................................... 2-9 Full-Duplex Speakerphone (FDSP) Mode (S Models)................................................................................................... 2-10 Caller ID ........................................................................................................................................................................ 2-10 Worldwide Country Support ......................................................................................................................................... 2-10 Diagnostics ................................................................................................................................................................... 2-11 2.15.1 Commanded Tests........................................................................................................................................ 2-11 2.15.2 Power On Reset Tests .................................................................................................................................. 2-11 Low Power Sleep Mode ................................................................................................................................................ 2-12 2.5 2.6 2.7 2.8 2.9 2.10 2.11 2.12 2.13 2.14 2.15 2.16 iv Conexant 102228A CX06833-3x/4x SMXXD Modem Data Sheet 3. Hardware Interface ...............................................................................................................................3-1 3.1 3.2 CX06833 Hardware Pins and Signals ............................................................................................................................. 3-1 3.1.1 CX06833 Interface Signals ............................................................................................................................. 3-1 CX20442 VC Hardware Pins and Signals (S Models) ................................................................................................... 3-17 3.2.1 CX20442 VC Signal Summary...................................................................................................................... 3-17 3.2.1.1 Speakerphone Interface............................................................................................................ 3-17 3.2.1.2 Telephone Handset/Headset Interface...................................................................................... 3-17 3.2.1.3 CX06833 Modem Interface ...................................................................................................... 3-17 3.2.1.4 Host Interface........................................................................................................................... 3-17 3.2.2 CX20442 VC Pin Assignments and Signal Definitions.................................................................................. 3-18 Electrical and Environmental Specifications ................................................................................................................. 3-24 3.3.1 Operating Conditions, Absolute Maximum Ratings, and Power Requirements ........................................... 3-24 Interface and Timing Waveforms ................................................................................................................................. 3-26 3.4.1 External Memory Bus Timing ....................................................................................................................... 3-26 3.4.2 Parallel Host Bus Timing .............................................................................................................................. 3-28 3.4.3 Serial DTE Interface...................................................................................................................................... 3-30 Crystal Specifications ................................................................................................................................................... 3-31 3.3 3.4 3.5 4. Package Dimensions ............................................................................................................................4-1 5. Parallel Host Interface ..........................................................................................................................5-1 5.1 5.2 Overview ......................................................................................................................................................................... 5-1 Register Signal Definitions ............................................................................................................................................. 5-3 5.2.1 IER - Interrupt Enable Register (Addr = 1, DLAB = 0) .................................................................................... 5-3 5.2.2 FCR - FIFO Control Register (Addr = 2, Write Only) ....................................................................................... 5-4 5.2.3 IIR - Interrupt Identifier Register (Addr = 2) .................................................................................................. 5-5 5.2.4 LCR - Line Control Register (Addr = 3) .......................................................................................................... 5-6 5.2.5 MCR - Modem Control Register (Addr = 4).................................................................................................... 5-7 5.2.6 LSR - Line Status Register (Addr = 5)............................................................................................................ 5-7 5.2.7 MSR - Modem Status Register (Addr = 6) ..................................................................................................... 5-9 5.2.8 RBR - RX Buffer (Receiver Buffer Register) (Addr = 0, DLAB = 0) ................................................................ 5-9 5.2.9 THR - TX Buffer (Transmitter Holding Register) (Addr = 0, DLAB = 0).......................................................... 5-9 5.2.10 Divisor Registers (Addr = 0 and 1, DLAB = 1).............................................................................................. 5-10 5.2.11 SCR - Scratch Register (Addr = 7) ............................................................................................................... 5-10 Receiver FIFO Interrupt Operation ................................................................................................................................ 5-10 5.3.1 Receiver Data Available Interrupt ................................................................................................................. 5-10 5.3.2 Receiver Character Timeout Interrupts ........................................................................................................ 5-11 Transmitter FIFO Interrupt Operation ........................................................................................................................... 5-11 5.4.1 Transmitter Empty Interrupt......................................................................................................................... 5-11 5.3 5.4 102228A Conexant v CX06833-3x/4x SMXXD Modem Data Sheet Figures Figure 1-1. SMXXD Modem Simplified Interface Diagram ................................................................................................. 1-3 Figure 1-2. SMXXD Modem Major Interfaces..................................................................................................................... 1-3 Figure 2-1. TMIND# Test Results Pulse Cycles ................................................................................................................ 2-12 Figure 3-1. CX06833 Hardware Signals for Parallel Interface (PARIF = High).................................................................... 3-2 Figure 3-2. CX06833 144-Pin TQFP Pin Signals for Parallel Interface (PARIF = High)....................................................... 3-3 Figure 3-3. CX06833 Hardware Signals for Serial Interface (PARIF = Low) ....................................................................... 3-6 Figure 3-4. CX06833 144-Pin TQFP Pin Signals for Serial Interface (PARIF = Low) .......................................................... 3-7 Figure 3-5. CX20442 VC Hardware Interface Signals ....................................................................................................... 3-19 Figure 3-6. CX20442 VC 32-Pin TQFP Pin Signals ........................................................................................................... 3-19 Figure 3-7. Waveforms - External Memory Bus................................................................................................................ 3-27 Figure 3-8. Waveforms - Parallel Host Bus....................................................................................................................... 3-29 Figure 3-9. Waveforms - Serial DTE Interface .................................................................................................................. 3-30 Figure 4-1. Package Dimensions - 144-Pin TQFP............................................................................................................... 4-1 Figure 4-2. Package Dimensions - 32-Pin TQFP................................................................................................................. 4-2 vi Conexant 102228A CX06833-3x/4x SMXXD Modem Data Sheet Tables Table 1-1. SMXXD Modem Models and Functions ............................................................................................................. 1-2 Table 1-2. Default Countries Supported.............................................................................................................................. 1-8 Table 2-1. +MS Command Automode Connectivity ............................................................................................................ 2-3 Table 3-1. CX06833 144-Pin TQFP Pin Signals for Parallel Interface (PARIF = High) ........................................................ 3-4 Table 3-2. CX06833 144-Pin TQFP Pin Signals for Serial Interface (PARIF = Low) ........................................................... 3-8 Table 3-3. CX06833 Pin Signal Definitions ....................................................................................................................... 3-10 Table 3-4. CX06833 I/O Type Definitions.......................................................................................................................... 3-16 Table 3-5. CX06833 DC Electrical Characteristics ............................................................................................................ 3-16 Table 3-6. CX20442 VC 32-Pin TQFP Pin Signals............................................................................................................. 3-20 Table 3-7. CX20442 VC Pin Signal Definitions.................................................................................................................. 3-21 Table 3-8. CX20442 VC DC Electrical Characteristics ....................................................................................................... 3-22 Table 3-9. CX20442 VC Analog Electrical Characteristics................................................................................................. 3-23 Table 3-10. Operating Conditions ..................................................................................................................................... 3-24 Table 3-11. Absolute Maximum Ratings........................................................................................................................... 3-24 Table 3-12. Current and Power Requirements.................................................................................................................. 3-25 Table 3-13. Timing - External Memory Bus ...................................................................................................................... 3-26 Table 3-14. Timing - Parallel Host Bus ............................................................................................................................. 3-28 Table 3-15. Crystal Specifications .................................................................................................................................... 3-31 Table 5-1. Parallel Interface Registers ................................................................................................................................ 5-2 Table 5-2. Interrupt Sources and Reset Control ................................................................................................................. 5-5 Table 5-3. Programmable Baud Rates .............................................................................................................................. 5-10 102228A Conexant vii CX06833-3x/4x SMXXD Modem Data Sheet Revision History Incorporated in Doc. No. 102228B Table 3-3: Delete erroneous VDD pin number, add SR1IO row, correct PA5 pin number, and correct the RESERVED pin numbers for Serial DTE Configuration.. Incorporated in Doc. No. 102228A Initial release. viii Conexant 102228A CX06833-3x/4x SMXXD Modem Data Sheet 1. 1.1 Introduction Overview The Conexant SMXXD Modem is a full-featured, controller-based modem that integrates modem controller (MCU), modem data pump (MDP), 256 KB ROM, 32 KB RAM, and analog line interface codec functions into a single package. The modem operates by executing firmware from internal ROM and RAM. Optional customized firmware is supported with optional external flash ROM memory. Additionally, added/modified country profiles are supported by internal SRAM patch (maximum of one profile) or serial EEPROM. Downloadable architecture supports downloading of customized MCU firmware from the host/DTE to the SMXXD modem. The SMXXD Modem device set, consisting of a CX06833 modem device in a 144-pin TQFP and an optional CX20442 Voice Codec (VC) in a 28-pin TQFP. Low profile TQFP packages with reduced voltage operation and low power consumption make this modem an ideal solution for embedded applications using parallel host or serial DTE interface. The SMXXD Modem supports data rates up to V.92, data compression, error correction, fax rates up to 14.4 kbps and speakerphone mode. In V.92 and V.90 (V.92 models) data modes, the modem can receive data at speeds up to 56 kbps. In V.34 data mode (V.92 and V.34 models), the modem can receive data at speeds up to 33.6 kbps. In V.32 bis data mode, the modem can receive data at speeds up to 14.4 kbps. Data compression (V.44/V.42bis/MNP5) and error correction (V.42/MNP 2-4) modes are supported to maximize data throughput and data transfer integrity. Non-errorcorrection mode is also supported. Fax Group 3 send and receive rates are supported up to 14.4 kbps with T.30 protocol. The SMXXD modem operates with PSTN telephone lines worldwide. S models, using the optional CX20442 Voice Codec (VC) in a 32-pin TQFP, support position independent, full-duplex speakerphone (FDSP) operation using microphone and speaker, as well as other voice/TAM applications using handset or headset. Table 1-1 lists the available models. A simplified device interface drawing is shown in Figure 1-1. A functional interface drawing showing optional memory is shown in Figure 1-2. 102228A Conexant 1-1 CX06833-3x/4x SMXXD Modem Data Sheet 1.2 Applications • • • • • • Internet appliances Remote monitoring and data collection systems Serial box modems Standalone TAM/fax machines Set top boxes Security devices Table 1-1. SMXXD Modem Models and Functions Marketing Name/Order No./Part No. Marketing Name Device Set Order No. Single Chip Modem [144-Pin TQFP] Part No. Voice Codec (VC) [32-Pin TQFP] Part No. V.90 Data, QC, MOH, PCM Supported Functions V.34 Data V.32 bis Data, V.44 Data Compression, V.17 Fax, TAM, Worldwide Y Y Y Y Y Y Y Y Y Voice/ FDSP Lead-free Device (Note 3) SM56D SM56D/S SM336D SM336D/S SM144D SM144D/S SM56D SM336D SM144D Notes: 1. Model options: S 56 336 144 DS56-L147-042 DS56-L147-052 DS28-L147-042 DS28-L147-052 DS96-L147-042 DS96-L147-052 DS56-L147-043 DS28-L147-043 DS96-L147-043 CX06833-34 CX06833-34 CX06833-32 CX06833-32 CX06833-33 CX06833-33 CX06833-44 CX06833-42 CX06833-43 — CX20442-11 — CX20442-11 — CX20442-11 — — — Y Y — — — — Y — — Y Y Y Y — — Y Y — — Y — Y — Y — — — N N N N N N Y Y Y Voice/full-duplex speakerphone (FDSP) 56 kbps max. rate per V.90 33.6 kbps max. rate per V.34 14.4 kbps max. rate per V.32 bis 2. Supported functions (Y = Supported; — = Not supported): QC MOH PCM TAM FDSP Quick connect Modem-on-Hold PCM upstream Telephone answering machine (Voice playback and record through telephone line) Full-duplex speakerphone and voice playback and record through telephone line, handset, and mic/speaker 3. Lead-free (PB-free) device. 1-2 Conexant 102228A CX06833-3x/4x SMXXD Modem Data Sheet Figure 1-1. SMXXD Modem Simplified Interface Diagram PARALLEL HOST BUS OR SERIAL DTE INTERFACE Telephone Line Interface Discrete Components CX06833 Single Chip Modem 144-Pin TQFP TIP RING TIP RING TELEPHONE LINE HANDSET (OPTIONAL) CX20442 Voice Codec (VC) 32-Pin TQFP (Optional) MIC SPEAKER (OPTIONAL) 102228_001 Figure 1-2. SMXXD Modem Major Interfaces DAA Hardware CX06833 Single Chip Modem 144-Pin TQFP Line Interface Codec Telephone Line Interface Discrete Components TELEPHONE LINE TIP RING Voice Relay, HS Pickup (Optional) TELEPHONE HANDSET TIP RING PARALLEL HOST BUS OR SERIAL DTE INTERFACE Microcontroller Unit (MCU) Modem Data Pump (MDP) CX20442 Voice Codec (VC) 32-Pin TQFP (Optional) HS Hybrid Components (Optional) (Mic/Speaker) Interface (Optional) MIC SPEAKER Digital Speaker Circuit (Optional) ROM (256K x 8) Serial EEPROM 2K (256 x 8) to 256K (32K x 8) (Optional) SOUNDUCER RAM (32K x 8) RAM 1M (128K x 8) (Optional) Flash ROM 2M (256K x 8) (Optional) 102228_002 102228A Conexant 1-3 CX06833-3x/4x SMXXD Modem Data Sheet 1.3 1.3.1 Features General Modem Features • Data modem − Quick connect, Modem-on-Hold, and PCM upstream functions (V.92 models) − ITU-T V.92/V.90 (V.92 models), V.34 (V.92 and V.34 models), V.32bis, V.32, V.29, FastPOS (V.29), V.22 bis, V.22, V.22 Fast Connect, V.23, V.21, Bell 212A, and Bell 103 − V.250 and V.251 commands Data compression and error correction − V.44 data compression − V.42 bis and MNP 5 data compression − V.42 LAPM and MNP 2-4 error correction Fax modem send and receive rates up to 14.4 kbps − V.17, V.29, V.27 ter, and V.21 channel 2 − EIA/TIA 578 Class 1 and T.31 Class 1.0 V.80 synchronous access mode supports host-controlled communication protocols with H.324 interface support Interfaces to optional external ROM/flash ROM, RAM, and/or optional serial EEPROM Data/Fax/Voice call discrimination Hardware-based modem controller Hardware-based digital signal processor (DSP) Support for many country-specific DAA configurations − On-hook and/or off-hook Caller ID detection for selected countries − Call progress, blacklisting − Internal ROM includes default values for 29 countries − Additional and modified country profile can be stored in internal SRAM Caller waiting detection Caller ID detect − On-hook Caller ID detection − Off-hook Call Waiting Caller ID detection during data mode in V.92, V.90, V.34, V.32bis, and V.32 Distinctive ring detect Modem customization available through patch code that can be stored in optional serial EEPROM or internal SRAM Telephony/TAM − V.253 commands − 2-bit and 4-bit Conexant ADPCM, 8-bit linear PCM, and 4-bit IMA coding − 8 kHz sample rate − Concurrent DTMF, ring, and Caller ID detection • • • • • • • • • • • • • 1-4 Conexant 102228A CX06833-3x/4x SMXXD Modem Data Sheet • Full-duplex speakerphone (FDSP) mode using optional CX20442 Voice Codec (S models) − Microphone and speaker interface − Telephone handset or headset interface − Acoustic and line echo cancellation − Microphone gain and muting − Speaker volume control and muting Built-in host/DTE interface − Parallel 16550A UART-compatible interface up to 230.4 kbps − Serial ITU-T V.24 (EIA/TIA-232-E) logical interface up to 115.2 kbps Downloadable architecture Direct mode (serial DTE interface) Flow control and speed buffering Automatic format/speed sensing Serial async/sync data; parallel async data Thin packages support low profile designs (1.6 mm max. height) − CX06833 Modem device in 144-pin TQFP − CX20442 VC in 32-pin TQFP +3.3V operation with +5V tolerant digital inputs Typical power use − CX06833: 191 mW (Normal Mode); 53 mW (Sleep Mode) − CX20442: 5 mW (Normal Mode) • • • • • • • • • 1.4 1.4.1 Technical Overview General Description Modem operation, including dialing, call progress, telephone line interface, telephone handset interface, optional voice/speakerphone interface, and host interface functions are supported and controlled through the V.250, V.251, and V.253-compatible command set. The modem hardware connects to the host via a parallel or serial interface as selected by the PARIF input. The OEM adds a crystal circuit, telephone line interface, telephone handset/telephony extension interface, voice/speakerphone interface, optional external serial EEPROM, optional external ROM/flash ROM, optional external RAM, and other supporting discrete components as supported by the modem model (Table 1-1) and required by the application to complete the system. Customized modem firmware can be supported by the use of external memory in various combinations, e.g., either external ROM/flash ROM (up to 256 KB), or external serial EEPROM (256 to 32 KB) and external RAM (up to 128 KB). To support country profile addition or modification, external serial EEPROM (256 to 32 KB) can be installed. Customized code can include OEM-defined commands, i.e., identification codes (I3), identifier string (I4), manufacturer identification (+GMI), model identification (+GMM), and revision identification (+GMR), as well as code modification. Parallel interface operation is selected by PARIF input high. Serial interface operation is selected by PARIF input low. 102228A Conexant 1-5 CX06833-3x/4x SMXXD Modem Data Sheet 1.4.2 MCU Firmware MCU firmware performs processing of general modem control, command sets, data modem, error correction and data compression (ECC), fax class 1, fax class 1.0, voice/audio/TAM/speakerphone, worldwide, V.80, and serial DTE/parallel host interface functions according to modem models (Table 1-1). MCU firmware can be customized to include OEM-defined commands, i.e., identification codes (I3), identifier string (I4), manufacturer identification (+GMI), model identification (+GMM), and revision identification (+GMR), as well as code modification. The modem firmware is provided in object code form for the OEM to program into external ROM/flash ROM. The modem firmware may also be provided in source code form under a source code addendum license agreement. External ROM/Flash ROM and RAM must be installed in order to operate the modem with customized firmware. 1.4.3 1.4.3.1 Operating Modes Data/Fax Modes Data modem modes perform complete handshake and data rate negotiations. Using modem modulations to optimize modem configuration for line conditions, the modem can connect at the highest data rate that the channel can support from 56 kbps down to 2400 bps with automatic fallback. In V.92/V.90 data modem modes (V.92 models), the modem can receive data from a digital source using a V.92-compatible central site modem at line speeds up to 56 kbps. With PCM upstream enabled (V.92 only), data transmission supports sending data at line speeds up to 48 kbps. When PCM upstream is disabled, data transmission supports sending data at line speeds up to V.34 rates. This mode can fallback to V.34 mode and to lower rates as dictated by line conditions. The following modes are supported in V.92 models when connected to a V.92compatible server supporting the feature listed. • • Quick connect: Allows quicker subsequent connections to a server by using stored line parameters obtained during the initial connection. Modem-on-Hold: Allows detection and reporting of incoming phone calls on the PSTN with enabled Call Waiting. If the incoming call is accepted by the user, the user has a pre-defined amount of time of holding the data connection for a brief conversation. The data connection resumes upon incoming call termination. PCM upstream: Boosts the upstream data rates. A maximum of 48 kbps is supported when connected to a V.92 server that supports PCM upstream. • In V.34 data modem mode (V.92 and V.34 models), the modem can operate in fullduplex, asynchronous modes at line rates up to 33.6 kbps. Automode operation in V.34 is provided in accordance with PN3320 and in V.32 bis in accordance with PN2330. All tone and pattern detection functions required by the applicable ITU or Bell standards are supported. In V.32 bis data modem mode, the modem can operate at line speeds up to 14.4 kbps. In fax modem mode, the modem can operate in half-duplex, synchronous modes and can support Group 3 facsimile send and receive speeds of 14400, 12000, 9600, 7200, 4800, and 2400 bps. Fax data transmission and reception performed by the modem are controlled and monitored through the EIA/TIA-578 Fax Class 1, or T.31 Fax Class 1.0 1-6 Conexant 102228A CX06833-3x/4x SMXXD Modem Data Sheet command interface. Full HDLC formatting, zero insertion/deletion, and CRC generation/checking are provided. 1.4.3.2 V.44 Data Compression V.44 provides efficient data compression that minimizes the download time for the types of files associated with Internet use. This improvement is most noticeable when browsing and searching the web since HTML text files are highly compressible. (The improved performance amount varies both with the actual format and with the content of individual pages and files.) 1.4.3.3 Country Support Country-specific modem parameters for functions such as dialing, carrier transmit level, calling tone, call progress tone detection, answer tone detection, blacklisting, caller ID, and relay control are programmable. Country code IDs are defined by ITU-T T.35. Embedded ROM code includes default profiles for 29 countries. Additional country profiles can be stored in internal SRAM or external serial EEPROM (request additional country profiles from a Conexant Sales Office). Duplicate country profiles stored in internal SRAM or external serial EEPROM will override the profiles in embedded ROM code. The default countries supported are listed Table 1-2. Country profiles for CTR-21 countries are TBR-21 compliant. 1.4.3.4 TAM Mode TAM Mode features include 8-bit linear coding at 8 kHz sample rate. Tone detection/ generation, call discrimination, and concurrent DTMF detection are also supported. TAM Mode is supported by four submodes: • • • • Online Voice Command Mode supports connection to the telephone line or, for S models, a microphone/speaker/handset/headset. Voice Receive Mode supports recording voice or audio data input from the telephone line or, for S models, a microphone/handset/headset. Voice Transmit Mode supports playback of voice or audio data to the telephone line or, for S models, a speaker/handset/headset. Full-duplex Receive and Transmit Mode. 102228A Conexant 1-7 CX06833-3x/4x SMXXD Modem Data Sheet Table 1-2. Default Countries Supported Country Country Code 09 0A 0F 16 26 31 3C 3D 42 50 53 57 59 00 61 6C 73 7B 82 8A 8B 9C 9F A0 A5 A6 FE B4 B5 FD Call Waiting Tone Detection (CW) Supported X X X X X X X X X X On-Hook Type 1 Caller ID (CID) Supported X X Off-Hook Type 2 Called ID (CID2) Supported Australia Austria Belgium Brazil China Denmark Finland France Germany Hong Kong India Ireland Italy Japan Korea Malaysia Mexico Netherlands Norway Poland Portugal Singapore South Africa Spain Sweden Switzerland Taiwan United Kingdom United States Reserved X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X 1.4.3.5 Speakerphone Mode (S Models) S models include additional telephone handset, external microphone, and external speaker interfaces which support voice and full-duplex speakerphone (FDSP) operation. Hands-free full-duplex telephone operation is supported in Speakerphone Mode under host control. Speakerphone Mode features an advanced proprietary speakerphone algorithm which supports full-duplex voice conversation with acoustic, line, and handset echo cancellation. Parameters are constantly adjusted to maintain stability with automatic fallback from full-duplex to pseudo-duplex operation. The speakerphone algorithm allows position independent placement of microphone and speaker. The host can separately control volume, muting, and AGC in microphone and speaker channels. 1-8 Conexant 102228A CX06833-3x/4x SMXXD Modem Data Sheet 1.4.4 Reference Designs Data/fax/TAM/speakerphone reference designs for external modems are available to minimize application design time, reduce development cost, and accelerate market entry. These designs are: • For CX06833: RD01-D460-1xx A design package is available in electronic form. This package includes schematics, bill of materials (BOM), vendor part list (VPL), board layout files in Gerber format, and complete documentation. 1.5 1.5.1 Hardware Description CX06833 Modem Device The CX06833 Modem, packaged in a 144-pin TQFP, includes a Microcontroller (MCU), a Modem Data Pump (MDP), 256 KB internal ROM, and 32 KB internal RAM interface functions. The CX06833 Modem connects to host via a parallel host (PARIF = high) or a logical V.24 (EIA/TIA-232-E) serial DTE interface (PARIF = low). The CX06833 Modem performs the command processing and host interface functions. The crystal frequency is 28.224 MHz ± 50 ppm. The CX06833 Modem optionally connects to an external OEM-supplied serial EEPROM over a dedicated 2-line serial interface. The capacity of the EEPROM can be 256 bytes up to 32 KB. The EEPROM can hold information such as firmware configuration customization, and country code parameters. The CX06833 Modem performs telephone line signal modulation/demodulation in a hardware digital signal processor (DSP) which reduces computational load on the host processor. The CX06833 optionally connects to external OEM-supplied ROM/flash ROM and RAM over a non-multiplexed 19-bit address bus and 8-bit data bus. 1.5.2 CX20442 Voice Codec The optional CX20442 Voice Codec (VC), packaged in a 32-pin TQFP, supports voice/full-duplex speakerphone (FDSP) operation with interfaces to a microphone and speaker and to a telephone handset/headset. 102228A Conexant 1-9 CX06833-3x/4x SMXXD Modem Data Sheet 1.6 AT Commands The SMXXD Modem supports AT commands for data mode, fax class 1 or 1.0, voice/audio, full-duplex speakerphone (FDSP), V.80 commands, and S Register. See Doc. No. 102184 for a description of the commands. Data Mode Operation. Data functions operate in response to the AT commands when +FCLASS=0. Default parameters support U.S./Canada operation. Fax Mode Operation. Facsimile functions operate in response to fax class 1 commands when +FCLASS=1 or to fax class 1.0 commands when +FCLASS=1.0. Voice/Audio Operation. Voice/audio functions operate in response to voice/audio commands when +FCLASS=8. Speakerphone Operation. FDSP functions operate in response to speakerphone commands when +FCLASS=8 and +VSP=1 is selected. 1-10 Conexant 102228A CX06833-3x/4x SMXXD Modem Data Sheet 2. 2.1 2.1.1 Technical Specifications Serial DTE Interface Operation Automatic Speed/Format Sensing Command Mode and Data Mode. The modem can automatically determine the speed and format of the data sent from the DTE. The modem can sense speeds of 300, 600, 1200, 2400, 4800, 7200, 9600, 12000, 14400, 16800, 19200, 21600, 24000, 26400, 28800, 38400, 57600, and 115200 bps and the following data formats: Data Length No. of Character Length Parity (No. of Bits) Stop Bits (No. of Bits) None 7 2 10 Odd 7 1 10 Even 7 1 10 None 8 1 10 Odd 8 1 11* Even 8 1 11* *11-bit characters are sensed, but the parity bit is stripped off during data transmission in Normal and Error Correction modes. The modem can speed sense data with mark or space parity and configures itself as follows: DTE Configuration 7 mark 7 space 8 mark 8 space Modem Configuration 7 none 8 none 8 none 8 even Fax Mode. In V.17 fax mode, the modem can sense speeds up to 115.2 kbps. 102228A Conexant 2-1 CX06833-3x/4x SMXXD Modem Data Sheet 2.2 Parallel Host Bus Interface Operation Command Mode and Data Mode. The modem can operate at rates up to 230.4 kbps by programming the Divisor Latch in the parallel interface registers if supported by communications software and/or driver. Fax Mode. In V.17 mode, the modem can operate at rates up to 230.4 kbps by programming the Divisor Latch in the parallel interface registers if supported by communications software and/or driver. 2.3 2.3.1 Establishing Data Modem Connections Dialing DTMF Dialing. DTMF dialing using DTMF tone pairs is supported in accordance with ITU-T Q.23. The transmit tone level complies with Bell Publication 47001. Pulse Dialing. Pulse dialing is supported in accordance with EIA/TIA-496-A. Blind Dialing. The modem can blind dial in the absence of a dial tone if enabled by the X0, X1, or X3 command. 2.3.2 Telephone Number Directory The modem supports four telephone number entries in a directory that can be saved in a serial EEPROM. Each telephone number can be up to 32 characters (including the command line terminating carriage return) in length. A telephone number can be saved using the &Zn=x command, and a saved telephone number can be dialed using the DS=n command. 2.3.3 Modem Handshaking Protocol If a tone is not detected within the time specified in the S7 register after the last digit is dialed, the modem aborts the call attempt. 2.3.4 Call Progress Tone Detection Ringback, equipment busy, congested tone, warble tone, and progress tones can be detected in accordance with the applicable standard. 2.3.5 Answer Tone Detection Answer tone can be detected over the frequency range of 2100 ± 40 Hz in ITU-T modes and 2225 ± 40 Hz in Bell modes. 2.3.6 Ring Detection A ring signal can be detected from a TTL-compatible 15.3 Hz to 68 Hz square wave input. 2-2 Conexant 102228A CX06833-3x/4x SMXXD Modem Data Sheet 2.3.7 Billing Protection When the modem goes off-hook to answer an incoming call, both transmission and reception of data are prevented for 2 seconds (data modem) or 4 seconds (fax adaptive answer) to allow transmission of the billing tone signal. 2.3.8 Connection Speeds The modem functions as a data modem when the +FCLASS=0 command is active. Line connection can be selected using the +MS command. The +MS command selects modulation, enables/disables automode, and selects minimum and maximum line speeds (Table 2-1). 2.3.9 Automode Automode detection can be enabled by the +MS command to allow the modem to connect to a remote modem in accordance with draft PN-3320 for V.34 (Table 2-1). Table 2-1. +MS Command Automode Connectivity Modulation Bell 103 Bell 212 V.21 V.22 V.22 bis V.23 V.32 V.32 bis V.34 V.90 B103 B212 V21 V22 V22B V23C V32 V32B V34 V90 Possible (, , (), and ) Rates (bps) 300 1200 Rx/75 Tx or 75 Rx/1200 Tx 300 1200 2400 or 1200 1200 9600 or 4800 14400, 12000, 9600, 7200, or 4800 33600, 31200, 28800, 26400, 24000, 21600, 19200, 16800, 14400, 12000, 9600, 7200, 4800, or 2400 56000, 54667, 53333, 52000, 50667, 49333, 48000, 46667, 45333, 44000, 42667, 41333, 40000, 38667, 37333, 36000, 34667, 33333, 32000, 30667, 29333, 28000 56000, 54667, 53333, 52000, 50667, 49333, 48000, 46667, 45333, 44000, 42667, 41333, 40000, 38667, 37333, 36000, 34667, 33333, 32000, 30667, 29333, 28000 48000, 46667, 45333, 44000, 42667, 41333, 40000, 38667, 37333, 36000, 34667, 33333, 32000, 30667, 29333, 28000, 26667, 25333, 24000 V.92 downstream V92 V.92 upstream V92 102228A Conexant 2-3 CX06833-3x/4x SMXXD Modem Data Sheet 2.4 Data Mode The modem enters data mode when a telephone line connection has been established between modems and all handshaking has been completed. 2.4.1 Speed Buffering (Normal Mode) Speed buffering allows a DTE to send data to, and receive data from, a modem at a speed different than the line speed. The modem supports speed buffering at all line speeds. 2.4.2 Flow Control DTE-to-Modem Flow Control. If the modem-to-line speed is less than the DTE-tomodem speed, the modem supports XOFF/XON or RTS/CTS flow control with the DTE to ensure data integrity. 2.4.3 Escape Sequence Detection The +++ escape sequence can be used to return control to the command mode from the data mode. Escape sequence detection is disabled by an S2 Register value greater than 127. 2.4.4 BREAK Detection The modem can detect a BREAK signal from either the DTE or the remote modem. The \Kn command determines the modem response to a received BREAK signal. 2.4.5 Telephone Line Monitoring GSTN Cleardown (V.90, V.34, V.32 bis, V.32). Upon receiving GSTN Cleardown from the remote modem in a non-error correcting mode, the modem cleanly terminates the call. Loss of Carrier (V.22 bis and Below). If carrier is lost for a time greater than specified by the S10 register, the modem disconnects. 2.4.6 Fall Forward/Fallback (V.92/V.90/V.34/V.32 bis/V.32) During initial handshake, the modem will fallback to the optimal line connection within V.92/V.90/V.34/V.32 bis/V.32 mode depending upon signal quality if automode is enabled by the +MS or N1 command. When connected in V.92/V.90/V.34/V.32 bis/V.32 mode, the modem will fall forward or fallback to the optimal line speed within the current modulation depending upon signal quality if fall forward/fallback is enabled by the %E2 command. 2-4 Conexant 102228A CX06833-3x/4x SMXXD Modem Data Sheet 2.4.7 Retrain The modem may lose synchronization with the received line signal under poor or changing line conditions. If this occurs, retraining may be initiated to attempt recovery depending on the type of connection. The modem initiates a retrain if line quality becomes unacceptable if enabled by the %E command. The modem continues to retrain until an acceptable connection is achieved, or until 30 seconds elapse resulting in line disconnect. 2.4.8 Programmable Inactivity Timer The modem disconnects from the line if data is not sent or received for a specified length of time. In normal or error-correction mode, this inactivity timer is reset when data is received from either the DTE or from the line. This timer can be set to a value between 0 and 255 seconds by using register S30. A value of 0 disables the inactivity timer. 2.4.9 DTE Signal Monitoring (Serial DTE Interface Only) DTR#. When DTR# is asserted, the modem responds in accordance with the &Dn and &Qn commands. RTS#. RTS# is used for flow control if enabled by the &K command in normal or errorcorrection mode. 2.5 V.92 Features Modem-on-Hold, quick connect, and PCM upstream are only available in V.92 models when connecting in V.92 data mode. V.92 features are only available when the server called is a V.92 server that supports that particular feature. 2.5.1 Modem-on-Hold The Modem-on-Hold (MOH) function enables the modem to place a data call to the Internet on hold while using the same line to accept an incoming or place an outgoing voice call. This feature is available only with a connection to a server supporting MOH. MOH can be executed through either of two methods: • One method is to enable MOH through the +PMH command. With Call Waiting Detection (+PCW command) enabled, an incoming call can be detected while online. Using a string of commands, the modem negotiates with the server to place the data connection on hold while the line is released so that it can be used to conduct a voice call. Once the voice call is completed, the modem can quickly renegotiate with the server back to the original data call. An alternative method is to use communications software that utilizes the Conexant Modem-on-Hold drivers under Windows PC operating systems. Using this method, the software can detect an incoming call, place the data connection on hold, and switch back to a data connection. • 102228A Conexant 2-5 CX06833-3x/4x SMXXD Modem Data Sheet 2.5.2 Quick Connect The quick connect function enables the modem to shorten the connect time of subsequent calls to a server supporting quick connect. The quick connect feature is supported by the +PQC command. 2.5.3 PCM Upstream PCM upstream boosts the upstream data rates between the user and ISP to reduce upload times for large files and email attachments. A maximum of 48 kbps upstream rate is supported with PCM upstream enabled, in contrast to a maximum of 32.2 kbps upstream rate with PCM upstream not enabled. PCM upstream is supported by the +PCM command. PCM upstream is disabled by default. 2.6 2.6.1 Error Correction and Data Compression V.42 Error Correction V.42 supports two methods of error correction: LAPM and, as a fallback, MNP 4. The modem provides a detection and negotiation technique for determining and establishing the best method of error correction between two modems. 2.6.2 MNP 2-4 Error Correction MNP 2-4 is a data link protocol that uses error correction algorithms to ensure data integrity. Supporting stream mode, the modem sends data frames in varying lengths depending on the amount of time between characters coming from the DTE. 2.6.3 V.44 Data Compression V.44 data compression mode, enabled by the +DS44 command, encodes pages and files associated with Web pages. These files include WEB pages, graphics and image files, and document files. V.44 can provide an effective data throughput rate up to DTE rate for a 56-kbps connection. The improved performance amount varies both with the actual format and with the content of individual pages and files. 2.6.4 V.42 bis Data Compression V.42 bis data compression mode, enabled by the %Cn command or S46 register, operates when a LAPM connection is established. The V.42 bis data compression employs a “string learning” algorithm in which a string of characters from the DTE is encoded as a fixed length codeword. Two 2-KB dictionaries are used to store the strings. These dictionaries are dynamically updated during normal operation. 2-6 Conexant 102228A CX06833-3x/4x SMXXD Modem Data Sheet 2.6.5 MNP 5 Data Compression MNP 5 data compression mode, enabled by the %Cn command, operates during an MNP connection. In MNP 5, the modem increases its throughput by compressing data into tokens before transmitting it to the remote modem, and by decompressing encoded received data before sending it to the DTE. 2.7 Telephony Extensions The following telephony extension features are supported and are typically implemented in designs for set-top box applications and TAM software applications to enhance enduser experience: • • • Line In Use detection Extension Pickup detection Remote Hang-up detection The telephony extension features are enabled through the -STE command. The -TTE command can be used to adjust the voltage thresholds for the telephony extension features. 2.7.1 Line In Use Detection The Line In Use Detection feature can stop the modem from disturbing the phone line when the line is already being used. When an automated system tries to dial using ATDT and the phone line is in use, the modem will not go off hook and will respond with the message “LINE IN USE”. In the case where no phone line is connected to the modem, the modem will respond with the message “NO LINE”. 2.7.2 Extension Pickup Detection The Extension Pickup Detection feature (also commonly referred as PPD or Parallel phone detection) allows the modem to detect when another telephony device (i.e., fax machine, phone, satellite/cable box) is attempting to use the phone line. When an extension pickup has been detected, the modem will go on-hook and respond with the message “OFF-HOOK INTRUSION”. The Remote Hangup Detection feature will cause the modem to go back on-hook and respond with the message “LINE REVERSAL DETECTED” during a data connection when the remote modem is disconnected for abnormal termination reasons (remote phone line unplugged, remote server/modem shutdown). For Voice applications, this method can be used in addition to silence detection to determine when a remote caller has hung up to terminate a voice recording. This feature can be used to quickly drop a modem connection in the event when a user picks up a extension phone line. For example, this feature allows set top boxes with an integrated SMXXD modem to give normal voice users the highest priority over the telephone line. This feature can also be used in Telephone Answering Machine applications (TAM). Its main use would be to stop the TAM operation when a phone is picked up. 102228A Conexant 2-7 CX06833-3x/4x SMXXD Modem Data Sheet 2.7.3 Remote Hangup Detection The Remote Hangup Detection feature will cause the modem to go back on-hook and respond with the message “LINE REVERSAL DETECTED” during a data connection when the remote modem is disconnected for abnormal termination reasons (remote phone line unplugged, remote server/modem shutdown). For Voice applications, this method can be used in addition to silence detection to determine when a remote caller has hung up to terminate a voice recording. 2.8 Fax Class 1 and Fax Class 1.0 Operation Facsimile functions operate in response to fax class 1 commands when +FCLASS=1 or to fax class 1.0 commands when +FCLASS=1.0. In the fax mode, the on-line behavior of the modem is different from the data (non-fax) mode. After dialing, modem operation is controlled by fax commands. Some AT commands are still valid but may operate differently than in data modem mode. Calling tone is generated in accordance with T.30. 2.9 Point-of-Sales Support Point-of-Sales (POS) terminals usually need to exchange a small amount of data in the shortest amount of time. Low speed modulations such as Bell212A or V.22 are still mainly used in POS applications. Additionally, new non-standard sequences have been developed to better support POS applications. Industry standard and shortened answer tone B103 and V.21 are supported, as well as FastPOS (V.29) and V.22 Fast Connect. POS terminal modulations are supported by the $F command. 2.10 Voice/Audio Mode Voice and audio functions are supported by the Voice Mode. Voice Mode includes four submodes: Online Voice Command Mode, Voice Receive Mode, Voice Transmit Mode and Full-Duplex Receive and Transmit Mode. 2.10.1 Online Voice Command Mode This mode results from the connection to the telephone line or a voice/audio I/O device (e.g., microphone, speaker, or handset) through the use of the +FCLASS=8 and +VLS commands. After mode entry, AT commands can be entered without aborting the connection. 2.10.2 Voice Receive Mode This mode is entered when the +VRX command is active in order to record voice or audio data input at the RIN pin, typically from a microphone/handset or the telephone line. 2-8 Conexant 102228A CX06833-3x/4x SMXXD Modem Data Sheet Received analog voice samples are converted to digital form and compressed for reading by the host. AT commands control the codec bits-per-sample rate. Received analog mono audio samples are converted to digital form and formatted into 8bit unsigned linear PCM format for reading by the host. AT commands control the bit length and sampling rate. Concurrent DTMF/tone detection is available at the 8 kHz sample rate. 2.10.3 Voice Transmit Mode This mode is entered when the +VTX command is active in order to playback voice or audio data to the TXA output, typically to a speaker/handset or to the telephone line. Digitized voice data is decompressed and converted to analog form at the original compression quantization sample-per-bits rate then output to the TXA output. Digitized audio data is converted to analog form then output to the TXA output. 2.10.4 Full-Duplex Receive and Transmit Mode This mode is entered when the +VTR command is active in order to concurrently receive and transmit voice. 2.10.5 Audio Mode The audio mode enables the host to transmit and receive 8-bit audio signals. In this mode, the modem directly accesses the internal analog-to-digital (A/D) converter (ADC) and the digital-to-analog (D/A) converter (DAC). Incoming analog audio signals can then be converted to digital format and digital signals can be converted to analog audio output. 2.10.6 Tone Detectors The tone detector signal path is separate from the main received signal path thus enabling tone detection to be independent of the configuration status. In Tone Mode, all three tone detectors are operational. 2.10.7 Speakerphone Mode Speakerphone mode is controlled in voice mode with the following commands: Use Speakerphone After Dialing or Answering (+VSP=1). +VSP=1 selects speakerphone mode while in +FCLASS=8 mode. Speakerphone operation is entered during Voice Online Command mode after completing dialing or answering. Speakerphone Settings. The +VGM and +VGS commands can be used to control the microphone gain and speaker volume, respectively. VGM and +VGS commands are valid only after the modem has entered the Voice Online mode while in the +VSP=1 setting. 2.11 V.80 Synchronous Access Mode (SAM) - Video Conferencing V.80 Synchronous Access Mode between the modem and the host/DTE is provided for host-controlled communication protocols, e.g., H.324 video conferencing applications. 102228A Conexant 2-9 CX06833-3x/4x SMXXD Modem Data Sheet Voice-call-first (VCF) before switching to a videophone call is also supported. 2.12 Full-Duplex Speakerphone (FDSP) Mode (S Models) The modem operates in FDSP mode when +FCLASS=8 and +VSP=1 (Section 2.10.7). In FDSP Mode, speech from a microphone or handset is converted to digital form, shaped, and output to the telephone line through the line interface circuit. Speech received from the telephone line is shaped, converted to analog form, and output to the speaker or handset. Shaping includes both acoustic and line echo cancellation. 2.13 Caller ID Both Type I Caller ID (On-Hook Caller ID) and Type II Caller ID (Call Waiting Caller ID) are supported for U.S. and many other countries (see Section 2.14). Both types of Caller ID are enabled/disabled using the +VCID command. Call Waiting Tone detection must be enabled using the +PCW command to detect and decode Call Waiting Caller ID. When enabled, caller ID information (date, time, caller code, and name) can be passed to the DTE in formatted or unformatted form. Inquiry support allows the current caller ID mode and mode capabilities of the modem to be retrieved from the modem. Type II Caller ID (Call Waiting Caller ID) detection operates only during data mode in V.92, V.90, V.34, V.32bis, or V.32. 2.14 Worldwide Country Support Internal modem firmware supports 29 country profiles (see Section 1.3.2). These country profiles include the following country-dependent parameters: • • • • • • • Dial tone detection levels and frequency ranges. DTMF dialing parameters: Transmit output level, DTMF signal duration, and DTMF interdigit interval. Pulse dialing parameters: Make/break times, set/clear times, and dial codes are programmable Ring detection frequency range. Type I and Type II Caller ID detection are supported for many countries. Contact your local Conexant sales office for additional country support. Blind dialing enabled/disable. Carrier transmit level (through S91 for data and S92 for fax). The maximum, minimum, and default values can be defined to match specific country and DAA requirements. Calling tone is generated in accordance with V.25. Calling tone may be toggled (enabled/disabled) by inclusion of a “^” character in a dial string. It may also be disabled. Frequency and cadence of tones for busy, ringback, congested, warble, dial tone 1, and dial tone 2. Answer tone detection period. • • • 2-10 Conexant 102228A CX06833-3x/4x SMXXD Modem Data Sheet • Blacklist parameters. The modem can operate in accordance with requirements of individual countries to prevent misuse of the network by limiting repeated calls to the same number when previous call attempts have failed. Call failure can be detected for reasons such as no dial tone, number busy, no answer, no ringback detected, voice (rather than modem) detected, and key abort (dial attempt aborted by user). Actions resulting from such failures can include specification of minimum inter-call delay, extended delay between calls, and maximum numbers of retries before the number is permanently forbidden ("blacklisted"). These country profiles may be altered or customized by modifying the country-dependent parameters. Additional profiles may also be included. There are two ways to add or modify profiles: • • Incorporating additional or modified profiles into external flash ROM containing the entire modem firmware code. Linking additional or modified profiles from an external serial EEPROM (needed only if the external flash ROM capacity is exceeded. Please contact an FAE at the local Conexant sales office if a country code customization is required. 2.15 2.15.1 Diagnostics Commanded Tests Diagnostics are performed in response to test commands. Analog Loopback (&T1 Command). Data from the local DTE is sent to the modem, which loops the data back to the local DTE. DMTF Generation (%TT0 Command). Continuous DTMF tones are generated by the DSP and output through the DAA. Tone Generation (%TT3 Command). Continuous tones are generated by the DSP and output through the DAA. 2.15.2 Power On Reset Tests Upon power on, the modem performs tests of the modem and internal RAM. If the modem or internal RAM test fails, the TMIND# output is pulsed as follows (Figure 2-1): • • Internal RAM test fails: One pulse cycle (pulse cycle = 0.5 sec. on, 0.5 sec. off) every 1.5 seconds. Modem device test fails: Three pulse cycles every 1.5 seconds. 102228A Conexant 2-11 CX06833-3x/4x SMXXD Modem Data Sheet Figure 2-1. TMIND# Test Results Pulse Cycles Internal RAM Fails Pulse Cycle 1.5 Sec 0 .5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5 Modem Device Fails Pulse Cycle 1.5 Sec 0 .5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5 6 6.5 7 102179_004 2.16 Low Power Sleep Mode Sleep Mode Entry. The modem enters the low power sleep mode when no line connection exists and no host activity occurs for the period of time specified in the S24 register. All modem circuits are turned off except the internal clock circuitry in order to consume reduced power while being able to immediately wake up and resume normal operation. Wake-up. Wake-up occurs when a ring is detected on the telephone line, the host writes to the modem (parallel interface), or the DTE sends a character to the modem (serial interface). 2-12 Conexant 102228A CX06833-3x/4x SMXXD Modem Data Sheet 3. 3.1 3.1.1 Hardware Interface CX06833 Hardware Pins and Signals CX06833 Interface Signals CX06833 hardware interface signals for parallel interface are shown by major interface in Figure 3-1, are shown by pin number in Figure 3-2, and are listed by pin number in Table 3-1. CX06833 hardware interface signals for serial interface are shown by major interface in Figure 3-3, are shown by pin number in Figure 3-4, and are listed by pin number in Table 3-2. The CX06833 hardware interface signals are defined in Table 3-3. CX06833 I/O types are defined in Table 3-4. CX06833 DC electrical characteristics are listed in Table 3-5. 102228A Conexant 3-1 CX06833-3x/4x SMXXD Modem Data Sheet Figure 3-1. CX06833 Hardware Signals for Parallel Interface (PARIF = High) CRYSTAL CIRCUIT NC NC NC +3.3V NC 116 117 115 67 114 119 16 54 XTLI XTLO CLKIN CLKOUT DV1TP NMIP PARIF (MK0) NOXYCK NVMCLK (PA7) NVMDATA (PE3) OH# (PE0) VOICE# (PE1) MUTE# (PE2) LCS (PE4) EXTOH# (PE7) RING (PA0) LINE_OUT_P LINE_OUT_M MIC_IN ASPKR HCS# (PD4) HRD# (PD6) HWT# (PD5) HINT (PB7) HA0 (PD0) HA1 (PD1) HA2 (PD2) HD0 (PC0) HD1 (PC1) HD2 (PC2) HD3 (PC3) HD4 (PC4) HD5 (PC5) HD6 (PC6) HD7 (PC7) RES1# RES2# LPO PD3 PE5 XXCLK BD2CLK PHS2 TESTP P_PA00 PA1 PA3 PA4 PA5 PB1 PB6 PD7 PE6 LINE_IN MIC_BIAS M_RELAY_A M_ACT_90 DLPBK_BAR VREF 40 27 24 25 26 28 32 33 137 138 141 136 143 144 8 12 13 139 0.1 10 SCL SDA OH# VOICE# MUTE# LCS EXTOH# RING TXAP TXAM RXA SPEAKER CIRCUIT EEPROM (OPTIONAL) DAA PARALLEL HOST INTERFACE 21 23 22 112 17 18 19 123 124 126 127 128 130 132 133 41 142 240K NC AGND VC 140 0.1 10 +3.3V 47K 63 20 30 55 65 122 113 61 34 36 37 38 104 110 53 31 AGND +3.3V 47K +3.3V CX06833 SINGLE CHIP MODEM 144-PIN TQFP PARALLEL INTERFACE (PARIF = HIGH) SLEEP_IN MCLKIN CNTLSIN RXOUT TXSIN STROBE SCLK IA1CLK (P_PX03) SA1CLK (P_PX02) SR4OUT (P_PX00) SR4IN SR1IO (P_PX07) IASLEEP (P_PF05) MCLKOUT (P_PB00) SR2CLK (P_PGP05) SA2CLK (P_PX05) SR3OUT SR3IN (P_PX01) SR2IO (P_PX06) PLLVDD 14 3 2 6 4 7 5 51 50 49 52 62 56 44 97 45 42 43 47 88 0.1uF 33 33 33 NC NC SLEEP M_CLKIN M_SCK M_STROBE M_TXSIN M_RXOUT M_CNTRLSIN +3.3V CX20437 VOICE CODEC (VC) (OPTIONAL) NC (PARALLEL HOST INTERFACE ONLY) 58 60 57 35 39 66 29 59 91 P_GP01 P_PA03 P_PA07 PA2 PA6 VGG VDDCORE VDDCORE VDDCORE +3.3V OR +5V PLLGND 89 0.1 0.1 0.1 10 +3.3V 48 64 84 103 111 125 131 118 1 10 135 46 71 106 129 11 VDD VDD VDD VDD VDD VDD VDD VDD DVDD DVDD AVDD VSS VSS VSS VSS DVSS +3.3V A (FILTERED) 9 15 134 AGND AGND AGND A00 A01 A02 A03 A04 A05 A06 A07 A08 A09 A10 A11 A12 A13 A14 A15 A16 (PB0) A17 (PB4) A18 (PB5) D0 D1 D2 D3 D4 D5 D6 D7 RD# WT# RAMSEL# (PB3) ROMSEL# (PB2) RESERVED RESERVED RESERVED RESERVED 77 78 79 80 81 82 83 85 86 87 90 92 93 94 95 96 102 108 109 68 69 70 72 73 74 75 76 121 120 107 105 98 99 100 101 EXTERNAL RAM AND ROM NC 102228_003 3-2 Conexant 102228A CX06833-3x/4x SMXXD Modem Data Sheet Figure 3-2. CX06833 144-Pin TQFP Pin Signals for Parallel Interface (PARIF = High) LINE_OUT_M LINE_OUT_P HINT (PB7) VDD 111 HD7 (PC7) HD6 (PC6) VDD HD5 (PC5) VSS HD4 (PC4) HD1 (PC1) HD0 (PC0) HD3 (PC3) HD2 (PC2) MIC_BIAS 144 143 142 141 140 139 138 137 136 135 127 126 134 133 132 131 130 129 128 125 124 123 122 121 120 119 118 117 116 115 114 113 112 110 109 PB6 A18 (PB5) LINE_IN RES2# ASPKR MIC_IN VC CLKIN DV1TP VDD XTLO PHS2 NMIP XTLI RD# WT# TESTP AVDD AGND VREF VDD DVDD CNTLSIN MCLKIN TXSIN SCLK RXOUT STROBE M_RELAY_A AGND DVDD DVSS M_ACT_90 DLPBK_BAR SLEEP_IN AGND PARIF (MK0) HA0 (PD0) HA1 (PD1) HA2 (PD2) PD3 HCS# (PD4) HWT# (PD5) HRD# (PD6) OH# (PE0) VOICE# (PE1) MUTE# (PE2) NVMDATA (PE3) LCS (PE4) VDDCORE PE5 PE6 EXTOH# (PE7) RING (PA0) PA1 PA2 PA3 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 51 52 53 54 55 48 49 47 50 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 108 107 106 105 104 103 102 101 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 75 74 73 A17 (PB4) RAMSEL# (PB3) VSS ROMSEL# (PB2) PB1 VDD A16 (PB0) RESERVED RESERVED RESERVED RESERVED SR2CLK (P_PGP05) A15 A14 A13 A12 A11 VDDCORE A10 PLLGND PLLVDD A09 A08 A07 VDD A06 A05 A04 A03 A02 A01 A00 D7 D6 D5 D4 CX06833 PARALLEL INTERFACE (PARIF PIN = HIGH) PA4 PA5 PA6 NVMCLK (PA7) VSS SR2IO (P_PX06) SR3OUT SR3IN (P_PX01) MCLKOUT (P_PB00) VDD SR4OUT (P_PX00) SA1CLK (P_PX02) RES1# NOXYCK XXCLK SA2CLK (P_PX05) IASLEEP (P_PF05) VDDCORE P_PA03 PD7 P_PA07 P_GP01 SR4IN IA1CLK (P_PX03) P_PA00 VDD BD2CLK VGG SR1IO (PX07) LPO CLKOUT VSS D3 D0 D1 D2 102228_004 102228A Conexant 3-3 CX06833-3x/4x SMXXD Modem Data Sheet Table 3-1. CX06833 144-Pin TQFP Pin Signals for Parallel Interface (PARIF = High) Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 Signal Label DVDD CNTLSIN MCLKIN TXSIN SCLK RXOUT STROBE M_RELAY_A AGND DVDD DVSS M_ACT_90 DLPBK_BAR SLEEP_IN AGND PARIF (MK0) HA0 (PD0) HA1 (PD1) HA2 (PD2) PD3 HCS# (PD4) HWT# (PD5) HRD# (PD6) OH# (PE0) VOICE# (PE1) MUTE# (PE2) NVMDATA (PE3) LCS (PE4) VDDCORE PE5 PE6 EXTOH# (PE7) RING (PA0) PA1 PA2 PA3 PA4 PA5 PA6 NVMCLK (PA7) RES1# SR3OUT SR3IN (P_PX01) MCLKOUT (P_PB00) SA2CLK (P_PX05) GND SR2IO (P_PX06) VDD SR4OUT (P_PX00) SA1CLK (P_PX02) I/O P I I I O O O O G P G I I I G I I I I I I I I O O O I/O I P I I/O I I I/O I/O I/O I/O I/O I/O O I O I O I G O P O I +3.3V CX06833: SR1IO CX06833: MCLKOUT through 33 Ω CX06833: SR4OUT CX06833: IA1CLK through 33 Ω CX06833: SR4IN CX06833:SA1CLK through 33 Ω NC AGND +3.3V GND NC NC CX06833: IASLEEP AGND NC (Parallel Host) HB: HA0 HB: HA1 HB: HA2 +3.3V through 47 K HB: CS# HB: WT# HB: RD# DAA: Off-Hook Relay Circuit DAA: Voice Relay Circuit (Optional) DAA: Mute Circuit (Optional) EEPROM: SDA DAA: Line Current Sense Circuit Filter capacitors to GND +3.3V through 47 K NC DAA: Extension Pickup Circuit (Optional) DAA: Ring Detect Circuit NC NC NC NC NC NC EEPROM: SCL HB: RESET# VC: M_TXSIN VC: M_RXOUT Through 33 Ω to CX06833:MCLKIN and VC: M_CLKIN VC: M_STROBE GND VC: M_CNTRLSIN +3.3V CX06833: TXSIN CX06833: STROBE through 33 Ω Interface Pin 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 Signal Label D4 D5 D6 D7 A00 A01 A02 A03 A04 A05 A06 VDD A07 A08 A09 PLLVDD PLLGND A10 VDDCORE A11 A12 A13 A14 A15 SR2CLK (P_PGP05) RESERVED RESERVED RESERVED RESERVED A16 (PB0) VDD PB1 ROMSEL# (PB2) GND RAMSEL# (PB3) A17 (PB4) A18 (PB5) PB6 VDD HINT (PB7) TESTP DV1TP CLKIN XTLI XTLO VDD NMIP WT# RD# PHS2 I/O I/O I/O I/O I/O O O O O O O O P O O O P G O P O O O O O I I/O O O O O P I/O O G O O O I/O P O I I I I O P I O O O EB: D4 EB: D5 EB: D6 EB: D7 EB: A00 EB: A01 EB: A02 EB: A03 EB: A04 EB: A05 EB: A06 +3.3V EB: A07 EB: A08 EB: A09 +3.3V and to GND through 1 µF GND EB: A10 Filter capacitors to GND EB: A11 EB: A12 EB: A13 EB: A14 EB: A15 VC: M_SCK NC NC NC NC EB: A16 +3.3V NC EB: ROM CE# GND EB: RAM CS# EB: A17 EB: A18 NC +3.3V HB: HINT NC Clock Select NC Crystal Circuit Crystal Circuit +3.3V +3.3V EB: WRITE# EB: READ# NC Interface 3-4 Conexant 102228A CX06833-3x/4x SMXXD Modem Data Sheet Table 3-1. CX06833 144-Pin TQFP Pin Signals for Parallel Interface (PARIF = High) (Continued) Pin 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 Signal Label IA1CLK (P_PX03) SR4IN PD7 NOXYCK XXCLK IASLEEP (P_PF05) P_PA07 P_GP01 VDDCORE P_PA03 P_PA00 SR1IO (P_PX07) LPO VDD BD2CLK VGG CLKOUT D0 D1 D2 GND D3 I/O I I I/O I O O O I P O I/O O I P O R O I/O I/O I/O G I/O Interface CX06833: SCLK through 33 Ω CX06833: RXOUT NC GND NC VC: SLEEP NC NC Filter capacitors to GND NC NC CX06833: CNTLSIN +3.3V through 240K +3.3V NC +5V or +3.3V NC EB: D0 EB: D1 EB: D2 GND EB: D3 Pin 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 Signal Label HD0 (PC0) HD1 (PC1) VDD HD2 (PC2) HD3 (PC3) HD4 (PC4) GND HD5 (PC5) VDD HD6 (PC6) HD7 (PC7) AGND AVDD ASPKR LINE_OUT_P LINE_OUT_M VREF VC MIC_IN RES2# LINE_IN MIC_BIAS I/O I/O I/O P I/O I/O I/O G I/O P I/O I/O G P O O O R R I I I O HB: HD0 HB: HD1 +3.3V HB: HD2 HB: HD3 HB: HD4 GND HB: HD5 +3.3V HB: HD6 HB: HD7 AGND +3.3VA (Filtered) AI: Speaker Circuit DAA: TXAP DAA: TXAM AGND through C circuit AGND through C circuit DAA: RXA HB: RESET# NC NC Interface 102228A Conexant 3-5 CX06833-3x/4x SMXXD Modem Data Sheet Figure 3-3. CX06833 Hardware Signals for Serial Interface (PARIF = Low) CRYSTAL CIRCUIT NC NC NC +3.3V 116 117 115 67 114 119 16 54 XTLI XTLO CLKIN CLKOUT DV1TP NMIP PARIF (MK0) NOXYCK NVMCLK (PA7) NVMDATA (PE3) OH# (PE0) VOICE# (PE1) MUTE# (PE2) LCS (PE4) EXTOH# (PE7) RING (PA0) LINE_OUT_P LINE_OUT_M MIC_IN ASPKR XTCLK# (P_GP01) RDCLK# (P_PA07) TDCLK# (P_PA03) TXD# (PA2) RXD# (PA6) CTS# (PC1) DSR# (PC0) RLSD# (PC2) RI# (PC5) DTR# (PD4) RTS# (PD6) DTRIND# (PD0) AAIND# (PC4) VC RES1# RES2# LPO PC3 PC7 PD3 PE5 XXCLK BD2CLK PHS2 TESTP P_PA00 PA1 PA3 PA4 PA5 PB1 PB6 PD7 PE6 AGND 40 27 24 25 26 28 32 33 137 138 141 136 143 144 8 12 13 139 0.1 10 SCL SDA OH# VOICE# MUTE# LCS EXTOH# RING TXAP TXAM RXA SPEAKER CIRCUIT EEPROM (OPTIONAL) DAA SERIAL DTE INTERFACE 58 57 60 35 39 124 123 126 130 21 23 17 128 41 142 240K LINE_IN MIC_BIAS M_RELAY_A M_ACT_90 DLPBK_BAR VREF NC LED INTERFACE RESET CIRCUIT +3.3V 47K AGND 140 0.1 10 63 127 133 20 30 55 65 122 113 61 34 36 37 38 104 110 53 31 +3.3V 47K +3.3V 47K +3.3V 47K +3.3V CX06833 SINGLE CHIP MODEM 144-PIN TQFP SERIAL INTERFACE (PARIF = LOW) SLEEP_IN MCLKIN CNTLSIN RXOUT TXSIN STROBE SCLK IA1CLK (P_PX03) SA1CLK (P_PX02) SR4OUT (P_PX00) SR4IN SR1IO (P_PX07) IASLEEP (P_PF05) MCLKOUT (P_PB00) SR2CLK (P_PGP05) SA2CLK (P_PX05) SR3OUT SR3IN (P_PX01) SR2IO (P_PX06) PLLVDD 14 3 2 6 4 7 5 51 50 49 52 62 56 44 97 45 42 43 47 88 0.1uF 33 33 33 NC NC SLEEP M_CLKIN M_SCK M_STROBE M_TXSIN M_RXOUT M_CNTRLSIN +3.3V CX20437 VOICE CODEC (VC) (OPTIONAL) NC (SERIAL DTE INTERFACE ONLY) 112 132 18 19 22 66 29 59 91 PB7 PC6 PD1 PD2 PD5 VGG VDDCORE VDDCORE VDDCORE +3.3V OR +5V PLLGND 89 0.1 0.1 0.1 10 +3.3V 48 64 84 103 111 125 131 118 1 10 135 46 71 106 129 11 VDD VDD VDD VDD VDD VDD VDD VDD DVDD DVDD AVDD VSS VSS VSS VSS DVSS +3.3V A (FILTERED) 9 15 134 AGND AGND AGND A00 A01 A02 A03 A04 A05 A06 A07 A08 A09 A10 A11 A12 A13 A14 A15 A16 (PB0) A17 (PB4) A18 (PB5) D0 D1 D2 D3 D4 D5 D6 D7 RD# WT# RAMSEL# (PB3) ROMSEL# (PB2) RESERVED RESERVED RESERVED RESERVED 77 78 79 80 81 82 83 85 86 87 90 92 93 94 95 96 102 108 109 68 69 70 72 73 74 75 76 121 120 107 105 98 99 100 101 EXTERNAL RAM AND ROM NC 102228_005 3-6 Conexant 102228A CX06833-3x/4x SMXXD Modem Data Sheet Figure 3-4. CX06833 144-Pin TQFP Pin Signals for Serial Interface (PARIF = Low) VSS AAIND# (PC4) LINE_OUT_M LINE_OUT_P PC3 RLSD# (PC2) CTS# (PC1) DSR# (PC0) MIC_BIAS 144 143 142 141 140 139 138 137 136 135 134 133 132 131 130 129 128 127 126 125 124 123 122 121 120 113 112 119 118 117 116 115 114 111 110 109 PB6 A18 (PB5) ASPKR RI# (PC5) LINE_IN RES2# MIC_IN VC CLKIN DV1TP TESTP AVDD AGND VREF PHS2 VDD XTLO NMIP PC6 VDD VDD RD# WT# PB7 VDD XTLI PC7 DVDD CNTLSIN MCLKIN TXSIN SCLK RXOUT STROBE M_RELAY_A AGND DVDD DVSS M_ACT_90 DLPBK_BAR SLEEP_IN AGND PARIF (MK0) DTRIND# (PD0) PD1 PD2 PD3 DTR# (PD4) PD5 RTS# (PD6) OH# (PE0) VOICE# (PE1) MUTE# (PE2) NVMDATA (PE3) LCS (PE4) VDDCORE PE5 PE6 EXTOH# (PE7 RING (PA0) PA1 TXD# (PA2) PA3 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 48 49 47 51 52 50 53 59 60 54 55 56 57 58 62 63 61 64 65 66 67 68 69 70 71 72 108 107 106 105 104 103 102 101 100 99 98 97 96 95 94 93 92 91 90 A17 (PB4) RAMSEL# (PB3) VSS ROMSEL# (PB2) PB1 VDD A16 (PB0) RESERVED RESERVED RESERVED RESERVED SR2CLK (P_PGP05) A15 A14 A13 A12 A11 VDDCORE A10 PLLGND PLLVDD A09 A08 A07 VDD A06 A05 A04 A03 A02 A01 A00 D7 D6 D5 D4 CX06833 SERIAL INTERFACE (PARIF PIN = LOW) 89 88 87 86 85 84 83 82 81 80 79 78 77 76 75 74 73 PA4 PA5 RXD# (PA6) NVMCLK (PA7) VSS SR2IO (P_PX06) SR3OUT SR3IN (P_PX01) MCLKOUT (P_PB00) VDD SR4OUT (PX00) SA1CLK (P_PX02) RES1# SA2CLK (P_PX05) NOXYCK XXCLK IASLEEP (P_PF05) RDCLK# (P_PA07) XTCLK# (P_GP01) PD7 VDDCORE TDCLK# (P_PA03) SR4IN IA1CLK (P_PX03) P_PA00 VDD BD2CLK VGG SR1IO (P_PX07) LPO CLKOUT VSS D3 D0 D1 D2 102228_006 102228A Conexant 3-7 CX06833-3x/4x SMXXD Modem Data Sheet Table 3-2. CX06833 144-Pin TQFP Pin Signals for Serial Interface (PARIF = Low) Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 Signal Label DVDD CNTLSIN MCLKIN TXSIN SCLK RXOUT STROBE M_RELAY_A AGND DVDD DVSS M_ACT_90 DLPBK_BAR SLEEP_IN AGND PARIF (MK0) DTRIND# (PD0) PD1 PD2 PD3 DTR# (PD4) PD5 RTS# (PD6) OH# (PE0) VOICE# (PE1) MUTE# (PE2) NVMDATA (PE3) LCS (PE4) VDDCORE PE5 PE6 EXTOH# (PE7) RING (PA0) PA1 TXD# (PA2) PA3 PA4 PA5 RXD# (PA6) NVMCLK (PA7) RES1# SR3OUT SR3IN (P_PX01) MCLKOUT (P_PB00) SA2CLK (P_PX05) GND SR2IO (P_PX06) VDD SR4OUT (P_PX00) SA1CLK (P_PX02) I/O P I I I O O O O G P G I I I G I O I/O I/O I I I/O I O O O I/O I P I I/O I I I/O I I/O I/O I/O O O I O I O I G O P O I +3.3V CX06833: SR1IO CX06833: MCLKOUT through 33 Ω CX06833: SR4OUT CX06833: IA1CLK through 33 Ω CX06833: SR4IN CX06833:SA1CLK through 33 Ω NC AGND +3.3V GND NC NC CX06833: IASLEEP AGND GND (Serial DTE) LED: DTRIND# NC NC +3.3V through 47 K DTE: DTR# NC DTE: RTS# DAA: Off-Hook Relay Circuit DAA: Voice Relay Circuit (Optional) DAA: Mute Circuit (Optional) EEPROM: SDA DAA: Line Current Sense Circuit Filter capacitors to GND +3.3V through 47 K NC DAA: Extension Pickup Circuit (Optional) DAA: Ring Detect Circuit NC DTE: TXD# NC NC NC DTE: RXD# EEPROM: SCL Reset Circuit VC: M_TXSIN VC: M_RXOUT Through 33 Ω to CX06833:MCLKIN and VC: M_CLKIN VC: M_STROBE GND VC: M_CNTRLSIN +3.3V CX06833: TXSIN CX06833: STROBE through 33 Ω Interface Pin 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 Signal Label D4 D5 D6 D7 A00 A01 A02 A03 A04 A05 A06 VDD A07 A08 A09 PLLVDD PLLGND A10 VDDCORE A11 A12 A13 A14 A15 SR2CLK (P_PGP05) RESERVED RESERVED RESERVED RESERVED A16 (PB0) VDD PB1 ROMSEL# (PB2) GND RAMSEL# (PB3) A17 (PB4) A18 (PB5) PB6 VDD PB7 TESTP DV1TP CLKIN XTLI XTLO VDD NMIP WT# RD# PHS2 I/O I/O I/O I/O I/O O O O O O O O P O O O P G O P O O O O O I I/O O O O O P I/O O G O O O I/O P O I I I I O P I O O O EB: D4 EB: D5 EB: D6 EB: D7 EB: A00 EB: A01 EB: A02 EB: A03 EB: A04 EB: A05 EB: A06 +3.3V EB: A07 EB: A08 EB: A09 +3.3V and to GND through 1 µF GND EB: A10 Filter capacitors to GND EB: A11 EB: A12 EB: A13 EB: A14 EB: A15 VC: M_SCK NC NC NC NC EB: A16 +3.3V NC EB: ROM CE# GND EB: RAM CS# EB: A17 EB: A18 NC +3.3V NC NC Clock Select NC Crystal Circuit Crystal Circuit +3.3V +3.3V EB: WRITE# EB: READ# NC Interface 3-8 Conexant 102228A CX06833-3x/4x SMXXD Modem Data Sheet Table 3-2. CX06833 144-Pin TQFP Pin Signals for Serial Interface (PARIF = Low) (Continued) Pin 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 Signal Label IA1CLK (P_PX03) SR4IN PD7 NOXYCK XXCLK IASLEEP (P_PF05) RDCLK# (P_PA07) XTCLK# (P_GP01) VDDCORE TDCLK# (P_PA03) P_PA00 SR1IO (P_PX07) LPO VDD BD2CLK VGG CLKOUT D0 D1 D2 GND D3 I/O I I I/O I O O O I P O I/O O I P O R O I/O I/O I/O G I/O Interface CX06833: SCLK through 33 Ω CX06833: RXOUT NC GND NC VC: SLEEP DTE: RDCLK# DTE: XTCLK# Filter capacitors to GND DTE: TDCLK# NC CX06833: CNTLSIN +3.3V through 240K +3.3V NC +5V or +3.3V NC EB: D0 EB: D1 EB: D2 GND EB: D3 Pin 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 Signal Label DSR# (PC0) CTS# (PC1) VDD RLSD# (PC2) PC3 AAIND# (PC4) GND RI# (PC5) VDD PC6 PC7 AGND AVDD ASPKR LINE_OUT_P LINE_OUT_M VREF VC MIC_IN RES2# LINE_IN MIC_BIAS I/O O O P O I/O O G O P I/O I/O G P O O O R R I I I O NC NC DTE: DSR# DTE: CTS# +3.3V DTE: RLSD# +3.3V through 47 K LED: AAIND# GND DTE: RI# +3.3V NC +3.3V through 47 K AGND +3.3VA (Filtered) AI: Speaker Circuit DAA: TXAP DAA: TXAM AGND through C circuit AGND through C circuit DAA: RXA Interface 102228A Conexant 3-9 CX06833-3x/4x SMXXD Modem Data Sheet Table 3-3. CX06833 Pin Signal Definitions Label Pin I/O I/O Type Signal Name/Description COMMON TO PARALLEL HOST AND SERIAL DTE INTERFACE CONFIGURATIONS System XTLI, XTLO CLKIN 116, 117 115 I, O I Ix, Ox It Crystal In and Crystal Out. If an external 28.224 MHz crystal circuit is used instead of an external clock circuit, connect XTLI and XTLO to the external crystal circuit and leave CLKIN open. Clock In. If an external 28.224 MHz clock circuit is used instead of an external crystal circuit, connect CLKIN to the clock output and leave XTLI and XTLO open. Clock Out. 28.224 MHz output clock. Leave open. Clock Input Select. This input is used to choose the clock input. Connect to +3.3V or leave open to select XTLI as the clock input. Connect to GND to select CLKIN as the clock input. Parallel/Serial Interface Select. PARIF input high (open) selects parallel host interface operation. PARIF low (GND) selects serial DTE interface operation. Non-Maskable Interrupt. Not used. Connect to +3.3V. Reset. The active low RES1# and RES2# input resets the CX06833 logic, and restores the saved configuration from serial EEPROM or returns the modem to the factory default values if EEPROM is not present. RESET# low holds the modem in the reset state; RESET# going high releases the modem from the reset state. After application of VDD, RESET# must be held low for at least 15 ms after the VDD power reaches operating range. The modem device set is ready to use 25 ms after the low-to-high transition of RESET#. For parallel Interface, connect RESET# input to the host bus RESET line through an inverter. For serial Interface, connect RESET# input to a reset switch circuit. Power and Ground VGG VDD 66 48, 64, 84, 103, 111, 118, 125, 131 1, 10 135 46, 71, 106, 129 11 9, 15, 134 29, 59, 91 88 89 40 27 P P PWRG PWR I/O Signaling Voltage Source. Connect to +5V or +3.3V. Digital Supply Voltage for Digital Circuits. Connect to +3.3V. CLKOUT DV1TP 67 114 O I It/Ot2 Itpu NOXYCK PARIF 54 16 I Itpu NMI# RES1# RES2# 119 41 142 I I Ithpu It DVDD AVDD VSS DVSS AGND VDDCORE P P G G G P PWR PWR GND GND AGND PWR Digital Supply Voltage for Analog Circuits. Connect to +3.3V Analog Supply Voltage for Analog Circuits. Connect to analog power. Digital Ground for Digital Circuits. Connect to digital ground. Digital Ground for Analog Circuits. Connect to digital ground. Analog Ground for Analog Circuits. Connect to analog ground. Core Voltage. +1.8V internally generated by a voltage regulator connected to the VDD input pins. VDDCORE is routed externally for decoupling to GND though capacitors. Supply Voltage for PLL Circuit. Connect to +3.3V and to analog ground through 0.1 µF. Digital Ground for PLL Circuit. Connect to digital ground. Serial EEPROM (EEPROM) Interface EEPROM Clock. NVMCLK output high enables the EEPROM. Connect to the EEPROM SCL pin. EEPROM Data. NVMDATA supplies serial data to and from the EEPROM. Connect to the EEPROM SDA pin and to +3.3V through 10 KΩ. PLLVDD PLLGND NVMCLK (PA7) NVMDATA (PE3) P G O I/O PWR GND It/Ot2 It/Ot2 3-10 Conexant 102228A CX06833-3x/4x SMXXD Modem Data Sheet Table 3-3. CX06833 Pin Signal Definitions (Continued) Label A00-A06, A07-A09, A10 A11-A15, A16 (PB0), A17 (PB4), A18 (PB5) D0-D2, D3-D7 READ# WRITE# RAMSEL# PB3) ROMSEL# (PB2) OH# (PE0) VOICE# (PE1) Pin 77-83, 85-87, 90, 92-96, 102, 108, 109 68-70, 72-76 121 120 107 105 24 25 I/O O, O, O, O, O, O, O I/O O O O O I/O Type External Bus Interface It/Ot8, It/Ot8, It/Ot2, It/Ot2, It/Ot2, It/Ot2, It/Ot2 Ith/Ot2 It/Ot2 It/Ot2 It/Ot2 Ot2 Address Lines 0-18. A0-A18 are the address output lines used to access external memory; up to 4 Mbits (512k bytes) flash ROM using A0-A18 and up to 1 Mbit (128k bytes) RAM using A0-A16. Signal Name/Description Data Line 0-7. D0-D7 are bidirectional external memory bus data lines. Read Enable. READ# output low enables data transfer from the selected device to the D0-D7 lines. Write Enable. WRITE# output low enables data transfer from the D0-D7 lines to the selected device. RAM Select. RAMSEL# output low selects the external RAM. ROM Select. ROMSEL# output low selects the external flash ROM. Telephone Line/Telephone/Audio Interface Signals and Reference Voltage O O It/Ot2 It/Ot2 Off-Hook Relay Control. The active low output can be used to control the normally open off-hook relay. Voice Relay Control. The active low VOICE# output can optionally be used to switch the handset from the telephone line to the voice codec interface to be used as a microphone and speaker. Leave open if not used. Mute Relay Control. The active low MUTE# output can optionally be used to used to control the normally open mute relay. Leave open if not used. Loop Current Sense. LCS is an active high input that indicates a handset off-hook status. Extension Off-Hook. Active low input optionally used to indicate when the telephone handset connected to the modem goes off-hook state. Connect to +3.3V through 47K Ω if not used. Ring Frequency. A rising edge on the RING input initiates an internal ring frequency measurement. The RING input from an external ring detect circuit is monitored to determine when to wake up from sleep or stop mode. The RING input is typically connected to the output of an optoisolator or equivalent. The idle state (no ringing) output of the ring detect circuit should be low. Transmit Analog 1 and 2. The LINE_OUT_P and LINE_OUT_M outputs are differential outputs 180 degrees out of phase with each other. Each output can drive a 300 Ω load. Connect LINE_OUT_P and LINE_OUT_M to the DAA telephone line interface transmit circuit. Receive Analog. MIC_IN is a single-ended input from the telephone line interface or an optional external hybrid circuit with 70K Ω input impedance. Connect MIC_IN to the DAA telephone line interface receive circuit. High Voltage Reference. Connect to AGND through 10 µF (polarized, + terminal to VREF) and 0.1 µF (ceramic) in parallel. Ensure a very close proximity between these capacitors and VREF pin. Use a short path and a wide trace to AGND pin. Low Voltage Reference. Connect to AGND through 10 µF (polarized, + terminal to VC) and 0.1 µF (ceramic) in parallel. Ensure a very close proximity between these capacitors and VC pin. Use a short path and a wide trace to AGND pin. MUTE# (PE2) LCS (PE4) EXTOH# (PE7) 26 28 32 O I I It/Ot2 It/Ot2 It/Ot2 RING (PA0) 33 I It/Ot2 LINE_OUT_P, LINE_OUT_M 137, 138 O, O O(DF) MIC_IN 141 I I(DA) VREF 139 R REF VC 140 R REF 102228A Conexant 3-11 CX06833-3x/4x SMXXD Modem Data Sheet Table 3-3. CX06833 Pin Signal Definitions (Continued) Label ASPKR Pin 136 I/O O I/O Type O(DF) Signal Name/Description Speaker Analog Output. The ASPKR analog output can originate from one of five different sources: RIN, TELIN, MICM or MICV or from the MDP’s internal voice playback mode. The ASPKR on/off and three levels of attenuation are controlled by bits in DSP RAM. When the speaker is turned off, the ASPKR output is clamped to the voltage at the VC pin. The ASPKR output can drive an impedance as low as 300 Ω. In a typical application, the ASPKR output is an input to an external LM386 audio power amplifier. Not Used. Leave open. Not Used. Leave open. Not Used. Leave open. Not Used. Leave open. Telephone Line/Telephone/Audio Interface Signals and Reference Voltage (Continued) LINE_IN MIC_BIAS M_RELAYA M_ACT90 DLPBK_BAR SLEEP_IN MCLKIN CNTLSIN RXOUT TXSIN STROBE SCLK IA1CLK (P_PX03) SA1CLK (P_PX02) SR4OUT (P_PX00) SR4IN SR1IO (P_PX07) IASLEEP (P_PF05) M_CLKOUT (P_PB00) SR2CLK (P_PGP05) SA2CLK (P_PX05) SR3OUT SR3IN (P_PX01) SR2IO (P_PX06) 143 144 8 12 13 14 3 2 6 4 7 5 51 50 49 52 62 56 44 97 45 42 43 47 I O O I I I I I O I O O I I O I O O O I I O I O I(DA) Oa Ot Itpu It Not Used. Leave open. CX06833 Interconnect and Optional CX20437 VC Interface Itpd Ipd Itpd Ot2 Itpd Ot2 Ot2 Itpu/Ot2 Itpu/Ot2 Itk/Ot2 Itk/Ot2 Itk/Ot2 Ot2 It/Ot2 Itpu/Ot2 Itpu/Ot2 Ot2 Itk/Ot2 It/Ot2 Modem Codec Sleep In. Connect to CX06833: IASLEEP pin. Modem Codec Serial Clock In. Connect to CX06833: MCLKOUT pin through 33 Ω. Modem Codec Serial Control In. Connect to CX06833: SR1IO pin. Modem Codec Serial Receive Data Out. Connect to CX06833: SR4IN pin. Modem Codec Serial Transmit Data In. Connect to CX06833: SR4OUT pin. Modem Codec Serial Frame Sync Out. Connect to CX06833: SA1CLK pin through 33 Ω. Modem Codec Serial Clock Out. Connect to CX06833: IA1CLK pin through 33 Ω. DSP Modem Serial Clock In. Connect to CX06833: SCLK pin through 33 Ω. DSP Modem Serial Frame Sync In. Connect to CX06833: STROBE pin through 33 Ω. DSP Modem Serial Transmit Data Out. Connect to CX06833: TXSIN pin. DSP Modem Serial Receive Data In. Connect to CX06833: RXOUT pin. DSP Modem Serial Control Out. Connect to CX06833: CNTLSIN pin. DSP Sleep Out. Connect to CX06833: SLEEP_IN pin and to VC SLEEP pin. DSP Master Serial Clock Out. Connect through 33 Ω to CX06833: MCLKIN pin and to VC M_CLKIN pin. DSP Voice Serial Clock In. Connect to VC M_SCK pin. Leave open if VC is not installed. DSP Voice Serial Frame Sync In. Connect to VC M_STROBE pin. Leave open if VC is not installed. DSP Voice Serial Transmit Data Out. Connect to VC M_TXSIN pin. Leave open if VC is not installed. DSP Voice Serial Receive Data In. Connect to VC M_RXOUT pin. Leave open if VC is not installed. DSP Voice Serial Control Out. Connect to VC M_CNTRLSIN pin. Leave open if VC is not installed. 3-12 Conexant 102228A CX06833-3x/4x SMXXD Modem Data Sheet Table 3-3. CX06833 Pin Signal Definitions (Continued) Label LPO PC3 PC7 PD3 PE5 63 127 133 20 30 Pin I/O I I I I I/O Type I/O Ith/Ot2 Ith/Ot2 Ith/Ot2 Signal Name/Description Low Power Oscillator. Not used. Connect to +3.3V through 240 KΩ. Port PC3. Not used. Connect to +3.3V through 47K Ω. Port PC7. Not used. Connect to +3.3V through 47K Ω. Port PD7. Not used. Connect to +3.3V through 47K Ω. Not Used – Connect to +3.3V through Resistor I Ith/Ot2 Port PE5. Not used. Connect to +3.3V through 47K Ω. PARALLEL HOST BUS CONFIGURATION ONLY (PARIF = HIGH) Parallel Host Interface I I It Ithpu Host Bus Chip Select. HCS# input low enables the MCU host bus interface. Host Bus Read. HRD# is an active low, read control input. When HCS# is low, HRD# low allows the host to read status information or data from a selected MCU register. Host Bus Write. HWT# is an active low, write control input. When HCS# is low, HWT# low allows the host to write data or control words into a selected MCU register. Host Bus Interrupt. HINT output is set high when the receiver error flag, received data available, transmitter holding register empty, or modem status interrupt is asserted. HINT is reset low upon the appropriate interrupt service or master reset operation. Host Bus Address Lines 0-2. During a host read or write operation with HCS# low, HA0-HA2 select an internal MCU 16550A-compatible register. HCS# (PD4) HRD# (PD6) 21 23 HWT# (PD5) 22 I Ithpu HINT (PB7) 112 O It/Ot8 HA0-HA2 (PD0-PD2) HD0-HD7 (PC0-PC7) 17-19 123-124, 126-128, 130-133 65 114 122 113 55 58 61 60 57 34 35 36 37 38 39 104 110 53 31 98-101 I I/O Ithpd/Ot2 Ith/Ot8 Host Bus Data Lines 0-7. HD0-HD7 are three-state input/output lines providing bidirectional communication between the host and the MCU. Data, control words, and status information are transferred over HD0-HD7. Not Used (In Parallel Host Interface Configuration) Itpu/Ot2 Itpu Ot2 Itpu It/Ot2 It Itpu/Ot2 Ot2 Ot2 It/Ot2 It/Ot2 Itpu/Ot2 Itpu/Ot2 It/Ot2 It/Ot2 It/Ot2 It/Ot2 It/Ot2 It/Ot2 Not Used. Leave open. Not Used. Leave open. Not Used. Leave open. Not Used. Leave open. Not Used. Leave open. Port P_GP01. Leave open. Port P_PA00. Leave open. Port P_PA03. Leave open. Port P_PA07. Leave open. Port PA1. Leave open. Port PA2. Leave open. Port PA3. Leave open. Port PA4. Leave open. Port PA5. Leave open. Port PA6. Leave open. Port PB1. Leave open. Port PB6. Leave open. Port PD7. Leave open. Port PE6. Leave open. Reserved. Connected to internal circuitry. Leave open. BD2CLK DV1TP PHS2 TESTP XXCLK P_GP01 P_PA00 P_PA03 P_PA07 PA1 PA2 PA3 PA4 PA5 PA6 PB1 PB6 PD7 PE6 RESERVED O I O I O I I/O O O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O 102228A Conexant 3-13 CX06833-3x/4x SMXXD Modem Data Sheet Table 3-3. CX06833 Pin Signal Definitions (Continued) Label Pin I/O I/O Type Signal Name/Description SERIAL DTE INTERFACE CONFIGURATION ONLY (PARIF = LOW) V.24 (EIA/TIA-232-E) DTE Serial Interface XTCLK# (P_GP01) RDCLK# (P_PA07) TDCLK# (P_PA03) TXD# (PA2) 58 57 I O It/Ot2 Itpu/Ot2 External Data Clock. Synchronous External Transmit Data Clock input in synchronous modes. Leave open if not used. Receive Data Clock. Synchronous Receive Data Clock output in synchronous modes. The RDCLK frequency is the data rate (±0.01%) with a duty cycle of 50±1%. Leave open if not used. Transmit Data Clock. Synchronous Transmit Data Clock output in synchronous modes. The TDCLK# frequency is the data rate (±0.01%) with a duty cycle of 50±1%. Leave open if not used. Transmitted Data (EIA BA/ITU-T CT103). The DTE uses the TXD# line to send data to the modem for transmission over the telephone line or to transmit commands to the modem. Received Data (EIA BB/ITU-T CT104). The modem uses the RXD# line to send data received from the telephone line to the DTE and to send modem responses to the DTE. During command mode, RXD# data represents the modem responses to the DTE. Clear To Send (EIA CB/ITU-T CT106). CTS# output ON (low) indicates that the modem is ready to accept data from the DTE. In asynchronous operation, in error correction or normal mode, CTS# is always ON (low) unless RTS/CTS flow control is selected by the &Kn command. In synchronous operation, the modem also holds CTS# ON during asynchronous command state. The modem turns CTS# OFF immediately upon going off-hook and holds CTS# OFF until both DSR# and RLSD# are ON and the modem is ready to transmit and receive synchronous data. The modem can also be commanded by the &Rn command to turn CTS# ON in response to an RTS# OFF-to-ON transition. DSR# (PC0) 123 O Ith/Ot8 Data Set Ready (EIA CC/ITU-T CT107). DSR# indicates modem status to the DTE. DSR# OFF (high) indicates that the DTE is to disregard all signals appearing on the interchange circuits except Ring Indicator (RI#). DSR# output is controlled by the AT&Sn command. Received Line Signal Detector (EIA CF/ITU-T CT109). When AT&C0 command is not in effect, RLSD# output is ON when a carrier is detected on the telephone line or OFF when carrier is not detected. Ring Indicator (EIA CE/ITU-T CT125). RI# output ON (low) indicates the presence of an ON segment of a ring signal on the telephone line. Data Terminal Ready (EIA CD/ITU-T CT108). The DTR# input is turned ON (low) by the DTE when the DTE is ready to transmit or receive data. DTR# ON prepares the modem to be connected to the telephone line, and maintains the connection established by the DTE (manual answering) or internally (automatic answering). DTR# OFF places the modem in the disconnect state under control of the &Dn and &Qn commands. Request To Send (EIA CA/ITU-T CT105). RTS# input ON (low) indicates that the DTE is ready to send data to the modem. In the command state, the modem ignores RTS#. In asynchronous operation, the modem ignores RTS# unless RTS/CTS flow control is selected by the &Kn command. In synchronous on-line operation, the modem can be commanded by the &Rn command to ignore RTS# or to respond to RTS# by turning on CTS# after the delay specified by Register S26. 60 O Itpu/Ot2 35 I It/Ot2 RXD# (PA6) 39 O It/Ot2 CTS# (PC1) 124 O Ith/Ot8 RLSD# (PC2) 126 O Ith/Ot8 RI# (PC5) DTR# (PD4) 130 21 O I Ith/Ot8 It RTS# (PD6) 23 I Ithpu 3-14 Conexant 102228A CX06833-3x/4x SMXXD Modem Data Sheet Table 3-3. CX06833 Pin Signal Definitions (Continued) Label Pin I/O I/O Type Signal Name/Description SERIAL DTE INTERFACE CONFIGURATION ONLY (PARIF = LOW) (CONTINUED) LED Indicator Interface AAIND# (PC4) 128 O Ith/Ot8 Auto Answer Indicator. AAIND# output ON (low) corresponds to the indicator on. AAIND# output is active when the modem is configured to answer the ring automatically (ATS0 command ≠ 0). DTRIND# (PD0) 17 O DTR Indicator. DTRIND# output ON (low) corresponds to the indicator on. The DTRIND# state reflects the DTR# output state except when the &D0 command is active, in which case DTRIND# is low. Not Used (In Serial DTE Interface Configuration) Itpu/Ot2 Ot2 Itpu It/Ot2 Itpu/Ot2 It/Ot2 Itpu/Ot2 Itpu/Ot2 It/Ot2 It/Ot2 It/Ot2 Ith/Ot8 Ithpd/Ot2 Ithpd/Ot2 Ithpu It/Ot2 It/Ot2 It/Ot2 Not Used. Leave open. Not Used. Leave open. Not Used. Leave open. Not Used. Leave open. Port P_PA00. Leave open. Port PA1. Leave open. Port PA3. Leave open. Port PA4. Leave open. Port PA5. Leave open. Port PB1. Leave open. Port PB6. Leave open. Port PC6. Leave open. Port PD1. Leave open. Port PD2. Leave open. Port PD5. Leave open. Port PD7. Leave open. Port PE2. Leave open. Port PE6. Leave open. Ithpd/Ot2 BD2CLK PHS2 TESTP XXCLK P_PA00 PA1 PA3 PA4 PA5 PB1 PB6 PC6 PD1 PD2 PD5 PD7 PE2 PE6 RESERVED 65 122 113 55 61 34 36 37 38 104 110 132 18 19 22 53 26 31 98-101 O O I O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O Reserved. Connected to internal circuitry. Leave open. Notes: 1. I/O Types: See Table 3-4. 2. Interface Legend: EB Expansion Bus HB Host Bus NC No internal pin connection VC Voice Codec RESERVED = No external connection allowed (may have internal connection). 102228A Conexant 3-15 CX06833-3x/4x SMXXD Modem Data Sheet Table 3-4. CX06833 I/O Type Definitions I/O Type Ix/Ox It/Ot2 Itk/Ot2 Itpu/Ot2 It/Ot8 Ithpd/Ot2 Ith/Ot2 Ith/Ot8 It Itk Itkpu Itpu Ithpu Ot2 Description I/O, wire Digital input, +5V tolerant/ Digital output, 2 mA, ZINT = 120 Ω Digital input, +5V tolerant, keeper/ Digital output, 2 mA, ZINT = 120 Ω Digital input, +5V tolerant, 75k Ω pull up/ Digital output, 2 mA, ZINT = 120 Ω Digital input, +5V tolerant,/ Digital output, 8 mA, ZINT = 50 Ω Digital input, +5V tolerant, hysteresis, 75k Ω pull down/ Digital output, 2 mA, ZINT = 120 Ω Digital input, +5V tolerant, hysteresis/Digital output, 2 mA, ZINT = 120 Ω Digital input, +5V tolerant, hysteresis/Digital output, 8 mA, ZINT = 50 Ω Digital input, +5V tolerant Digital input, +5V tolerant, keeper Digital input, +5V tolerant, keeper, 75k Ω pull up Digital input, +5V tolerant, 75k Ω pull up Digital input, +5V tolerant, hysteresis, 75k Ω pull up Digital output, three-state, 2 mA, ZINT = 120 Ω PWR VCC Power PWRG VGG Power GND Ground Notes: 1. See DC characteristics in Table 3-5. 2. I/O Type corresponds to the device Pad Type. The I/O column in signal interface tables refers to signal I/O direction used in the application. Table 3-5. CX06833 DC Electrical Characteristics Parameter Input Voltage Low +5V tolerant +5V tolerant hysteresis Input Voltage High +5V tolerant +5V tolerant hysteresis Input Hysteresis +3V hysteresis +5V tolerant, hysteresis Output Voltage Low ZINT = 120 Ω ZINT = 50 Ω Output Voltage High ZINT = 120 Ω ZINT = 50 Ω Pull-Up Resistance Pull-Down Resistance Rpu Rpd VOH 2.4 2.4 50 50 Symbol VIL 0 0 VIH 2 0.7 * VDD VH 0.5 0.3 VOL 0 0 – – – – – – – 0.4 0.4 VDD VDD 200 200 V V V V V kΩ IOL = 2 mA IOL = 8 mA IOL = -2 mA IOL = -8 mA – – – – – – – – 0.8 0.3 *VGG 5.25 5.25 V V V V V V V V Min. Typ. Max. Units Test Conditions kΩ Test Conditions unless otherwise stated: VDD = +3.3 ± 0.3 VDC; TA = 0°C to 70°C; external load = 50 pF. 3-16 Conexant 102228A CX06833-3x/4x SMXXD Modem Data Sheet 3.2 3.2.1 CX20442 VC Hardware Pins and Signals (S Models) CX20442 VC Signal Summary Microphone and analog speaker interface signals, as well as telephone handset/headset interface signals are provided to support functions such as speakerphone mode, telephone emulation, microphone voice record, speaker voice playback, and call progress monitor. 3.2.1.1 Speakerphone Interface The following signals are supported: • • Speaker Out (M_SPKR_OUT); analog output - Should be used in speakerphone designs where sound quality is important Microphone (M_MIC_IN); analog input 3.2.1.2 Telephone Handset/Headset Interface The following interface signals are supported: • • • Telephone Input (M_LINE_IN), input (TELIN) - Optional connection to a telephone handset interface circuit Telephone output (M_LINE_OUTP); output (TELOUT) - Optional connection to a telephone handset interface circuit Center Voltage (VC); output reference voltage 3.2.1.3 CX06833 Modem Interface The following interface signals are supported: • • • • • • • Sleep (SLEEP); input Master Clock (M_CLKIN); input Serial Clock (M_SCK); output Control (M_CNTRLSIN); input Serial Frame Sync (M_STROBE); output Serial Transmit Data (M_TXSIN); input Serial Receive Data (M_RXOUT); output 3.2.1.4 Host Interface The following interface signals are supported: • Reset (POR); input 102228A Conexant 3-17 CX06833-3x/4x SMXXD Modem Data Sheet 3.2.2 CX20442 VC Pin Assignments and Signal Definitions VC 32-pin TQFP hardware interface signals are shown by major interface in Figure 3-5, are shown by pin number in Figure 3-6, and are listed by pin number in Table 3-6. VC hardware interface signals are defined in Table 3-7. VC pin signal DC electrical characteristics are defined in Table 3-8. VC pin signal analog electrical characteristics are defined in Table 3-9. 3-18 Conexant 102228A CX06833-3x/4x SMXXD Modem Data Sheet Figure 3-5. CX20442 VC Hardware Interface Signals CX06833 IASLEEP DRESET# M_CLK V_SCLK V_STROBE V_TXSIN V_RXOUT V_CTRL 1 4 19 21 23 20 22 18 M_DIG_SPEAKER SLEEP POR M_CLKIN M_SCK M_STROBE M_TXSIN M_RXOUT M_CNTRLSIN M_MIC_IN M_SPKR_OUT M_LINE_IN M_LINE_OUTP M_LINE_OUTM VREF 2 13 3 14 9 10 11 0.1uF 10uF NC MIC SPKOUT TELIN TELOUT AUDIO CIRCUIT HANDSET INTERFACE +3.3V 17 25 5 28 26 VDD VDD MAVDD VSS SET3V_BAR2 VAA (+3.3V) CX20442 Voice Codec (VC) 32-Pin TQFP VC 12 AGND 0.1uF GND 6 27 MAVSS VSUB M_MIC_BIAS M_RELAYA M_RELAYB M_ACT90 M_1BIT_OUT D_LPBK_BAR NC NC NC 10uF AGND 15 24 16 29 30 31 7 8 32 AGND NC 102228_007 Figure 3-6. CX20442 VC 32-Pin TQFP Pin Signals D_LPBK_BAR M_1BIT_OUT SET3V_BAR2 26 M_ACT90 VSS VSUB 28 27 32 NC 31 30 29 25 VDD SLEEP M_DIG_SPEAKER M_SPKR_OUT POR MAVDD MAVSS NC NC 1 2 3 4 5 6 7 8 13 14 10 11 12 9 15 16 24 23 22 21 20 M_RELAYA M_STROBE M_RXOUT M_SCK M_TXSIN M_CLKIN M_CNTRLSIN VDD CX20442 19 18 17 M_LINE_OUTM VREF M_LINE_OUTP M_MIC_BIAS M_RELAYB VC M_MIC_IN M_LINE_IN 102228_008 102228A Conexant 3-19 CX06833-3x/4x SMXXD Modem Data Sheet Table 3-6. CX20442 VC 32-Pin TQFP Pin Signals Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 Signal Label SLEEP M_DIG_SPEAKER M_SPKR_OUT POR MAVDD MAVSS NC NC M_LINE_OUTP M_LINE_OUTM VREF VC M_MIC_IN M_LINE_IN M_MIC_BIAS M_RELAYB VDD M_CNTRLSIN M_CLKIN M_TXSIN M_SCK M_RXOUT M_STROBE M_RELAYA VDD M_SET3V_BAR2 VSUB VSS M_ACT90 M_1BIT_OUT D_LPBK_BAR NC P I I I O O O O P I G G I O I I I O O I O O I P G I/O CX06833: IASLEEP NC Speaker interface circuit Host: RESET# or reset circuit VAA (+3.3V) AGND NC NC Handset interface circuit: TELOUT NC AGND through capacitors AGND through capacitors Microphone interface circuit Handset interface circuit: TELIN NC NC +3.3V CX06833: V_CTRL CX06833: M_CLK CX06833: V_TXSIN CX06833: V_SCLK CX06833: V_RXOUT CX06833: V_STROBE NC +3.3V GND AGND GND NC NC NC NC Interface 3-20 Conexant 102228A CX06833-3x/4x SMXXD Modem Data Sheet Table 3-7. CX20442 VC Pin Signal Definitions Label VDD MAVDD VSS MAVSS VSUB POR SET3V_BAR2 SLEEP M_CLKIN M_SCK M_CNTRL_SIN M_STROBE M_TXSIN M_RXOUT M_MIC_IN M_SPKR_OUT Pin 17, 25 5 28 6 27 4 26 1 19 21 18 23 20 22 13 3 I/O P P G G G I I I I O I O I O I O I/O Type System Signals PWR PWR GND AGND GND Itpu Itpu Itpd Itpd Ot2 Itpd Ot2 Itpd Ot2 Digital Power Supply. Connect to +3.3V and digital circuits power supply filter. Analog Power Supply. Connect to +3.3V and analog circuits power supply filter. Digital Ground. Connect to GND. Analog Ground. Connect to AGND. Analog Ground. Connect to AGND. Power-On Reset. Active low reset input. Connect to Host RESET# or reset circuit. Set +3.3V Analog Reference. Connect to GND. IA Sleep. Active high sleep input. Connect to CX06833 IASLEEP pin. Master Clock Input. Connect to CX06833 M_CLK pin. Serial Clock Output. Connect to CX06833 V_SCLK pin. Control Input. Connect to CX06833 V_CTRL pin. Serial Frame Sync. Connect to CX06833 V_STROBE pin. Serial Transmit Data. Connect to CX06833 V_TXSIN pin. Signal Name/Description CX06833 Interconnect Serial Receive Data. Connect to CX06833 V_RXOUT pin. Microphone/Speaker Interface I(DA) O(DF) Microphone Input. Single-ended analog input from the microphone circuit. Modem Speaker Analog Output. The M_SPKR_OUT analog output reflects the received analog input signal. The M_SPKR_OUT on/off and three levels of attenuation are controlled by bits in DSP RAM. When the speaker is turned off, the M_SPKR_OUT output is clamped to the voltage at the VC pin. The M_SPKR_OUT output can drive an impedance as low as 300 Ω. In a typical application, the M_SPKR_OUT output is an input to an external LM386 audio power amplifier. Handset/Headset Interface Telephone Handset Out (TELOUT). Single-ended analog data output to the telephone handset circuit. The output can drive a 300 Ω load. Telephone Handset Out (TELIN). Single-ended analog data input from the telephone handset circuit. M_LINE_OUTP 9 O O(DF) M_LINE_IN 14 I I(DA) 102228A Conexant 3-21 CX06833-3x/4x SMXXD Modem Data Sheet Table 3-7. CX20442 VC Pin Signal Definitions (Continued) Label VREF 11 Pin I/O R I/O Type Reference Voltage REF High Voltage Reference. Connect to analog ground through 10 µF (polarized, + terminal to VREF) and 0.1 µF (ceramic) in parallel. Ensure a very close proximity between these capacitors and VREF pin. Low Voltage Reference. Connect to analog ground through 10 µF (polarized, + terminal to VC) and 0.1 µF (ceramic) in parallel. Ensure a very close proximity between these capacitors and VC pin. For handset interface, also connect to handset interface circuit (VC_HAND). Not Used M_DIG_SPEAKER M_LINE_OUTM M_RELAYA M_RELAYB M_MIC_BIAS M_ACT90 M_1BIT_OUT D_LPBK_BAR NC Notes: 1. I/O types*: Ia It Itpd Itpu Oa Ot2 Ot2od AGND GND 2 10 24 16 15 29 30 31 7, 8, 32 O O O O O I O I Ot2 Oa Ot Ot Oa Itpu Ot2 It Not Used. Leave open. Not Used. Leave open. Not Used. Leave open. Not Used. Leave open. Not Used. Leave open. Not Used. Leave open. Not Used. Leave open. Not Used. Leave open. Internal No Connect. Leave open. Signal Name/Description VC 12 R REF Analog input Digital input, TTL-compatible Digital input, TTL-compatible, internal 75k ± 25k Ω pull-down Digital input, TTL-compatible, internal 75k ± 25k Ω pull-up Analog output Digital output, TTL-compatible, 2 mA, ZINTERNAL = 120 Ω Digital output, TTL-compatible, 2 mA, open drain, ZINTERNAL = 120 Ω Analog Ground Digital Ground Table 3-8. CX20442 VC DC Electrical Characteristics Parameter Input Voltage Input Voltage Low Input Voltage High Output Voltage Low Output Voltage High Symbol VIN VIL VIH VOL Min. -0.30 -0.30 0.4*VDD 0 Typ. – – – – Max. VDD+0.3 0.2 *VDD VDD+0.3 0.4 Units V V V V Test Conditions VOH 0.8*VDD – VDD V Input Leakage Current – -10 – 10 µA Output Leakage Current (High – -10 – 10 µA Impedance) Test Conditions unless otherwise stated: VDD = +3.3 ± 0.3 VDC; TA = 0°C to 70°C; external load = 50 pF 3-22 Conexant 102228A CX06833-3x/4x SMXXD Modem Data Sheet Table 3-9. CX20442 VC Analog Electrical Characteristics Signal Name M_LINE_IN, M_MIC_IN M_LINE_OUTP O (DD) Type I (DA) Characteristic Input Impedance AC Input Voltage Range Reference Voltage Minimum Load Maximum Capacitive Load Output Impedance AC Output Voltage Range Reference Voltage DC Offset Voltage Minimum Load Maximum Capacitive Load Output Impedance Value > 70K Ω 1.1 VP-P +1.35 VDC 300 Ω 0 µF 10 Ω 1.4 VP-P (with reference to ground and a 600 Ω load) +1.35 VDC ± 200 mV 300 Ω 0.01 µF M_SPKR_OUT O (DF) 10 Ω AC Output Voltage Range 1.4 VP-P Reference Voltage +1.35 VDC DC Offset Voltage ± 20 mV Test Conditions unless otherwise stated: VDD = +3.3 ± 0.3 VDC; MAVDD = +3.3 ± 0.3 VDC, TA = 0°C to 70°C Parameter DAC to Line Driver output (600Ω load, 3dB in SCF and CTF) SNR/SDR at: 4Vp-p differential 2Vp-p differential -10dBm differential DAC to Speaker Driver output (150Ω load, 3dB in SCF and CTF, -6dB in speaker driver) SNR/SDR at: 2Vp-p 1Vp-p -10dBm Line Input to ADC (6dB in AAF) SNR/SDR at –10 dBm Input Leakage Current (analog inputs) Output Leakage Current (analog outputs) Min Typ 88/85 82/95 72/100 Max Units dB dB 88/75 82/80 72/83 80/95 -10 -10 10 10 dB µA µA 102228A Conexant 3-23 CX06833-3x/4x SMXXD Modem Data Sheet 3.3 3.3.1 Electrical and Environmental Specifications Operating Conditions, Absolute Maximum Ratings, and Power Requirements The operating conditions are specified in Table 3-10. The absolute maximum ratings are listed in Table 3-11. The current and power requirements are listed in Table 3-12. Table 3-10. Operating Conditions Parameter Supply Voltage Operating Ambient Temperature Symbol VDD T A Limits +3.0 to +3.6 0 to +70 Units VDC °C Table 3-11. Absolute Maximum Ratings Parameter Supply Voltage Input Voltage Storage Temperature Range Analog Inputs Voltage Applied to Outputs in High Impedance (Off) State DC Input Clamp Current DC Output Clamp Current Static Discharge Voltage (25°C) Latch-up Current (25°C) * VGG = +3.3V ± 0.3V or +5V ± 5%. Symbol VDD V IN T STG V IN V HZ I I V I IK Limits -0.5 to +4.0 -0.5 to (VGG +0.5)* -55 to +125 -0.3 to (VAA + 0.5) -0.5 to (VGG +0.5)* ±20 ±20 ±2500 ±400 Units VDC VDC °C VDC VDC mA mA VDC mA OK ESD TRIG Handling CMOS Devices The device contains circuitry to protect the inputs against damage due to high static voltages. However, it is advised that normal precautions be taken to avoid application of any voltage higher than maximum rated voltage. An unterminated input can acquire unpredictable voltages through coupling with stray capacitance and internal cross talk. Both power dissipation and device noise immunity degrades. Therefore, all inputs should be connected to an appropriate supply voltage. Input signals should never exceed the voltage range from -0.5V to VGG + 0.5V. This prevents forward biasing the input protection diodes and possibly entering a latch up mode due to high current transients. 3-24 Conexant 102228A CX06833-3x/4x SMXXD Modem Data Sheet Table 3-12. Current and Power Requirements Mode Typical Current (Ityp) (mA) Maximum Current (Imax) (mA) Typical Power (Ptyp) (mW) Maximum Power (Pmax) (mW) Notes CX06833 Normal Mode: Off-hook, normal data 58 64 191 230 connection Normal Mode: On-hook, idle, waiting for ring 58 64 191 230 Sleep Mode 16 17.6 52.8 63.4 CX20437 VC (Optional) Normal Mode 1.5 2 5 7 Notes: 1. Operating voltage: VDD = +3.3V ± 0.3V. 2. Test conditions: VDD = +3.3V for typical values; VDD = +3.6V for maximum values. 3. Input Ripple ≤ 0.1 Vpeak-peak. 4. f = Internal frequency. 5. Maximum current computed from Ityp: Imax = Ityp * 1.1. 6. Typical power (Ptyp) computed from Ityp: Ptyp = Ityp * 3.3V; Maximum power (Pmax) computed from Imax: Pmax = Imax * 3.6V. f = 28.224 MHz f = 28.224 MHz f = 0 MHz 102228A Conexant 3-25 CX06833-3x/4x SMXXD Modem Data Sheet 3.4 3.4.1 Interface and Timing Waveforms External Memory Bus Timing The external memory bus timing is listed in Table 3-13 and illustrated in Figure 3-7. Table 3-13. Timing - External Memory Bus Symbol t t t t t t t t t t t t FI CYC AS ES RW RDS RDH AS ES WW WTD Parameter Internal Operating Frequency Internal Operating Clock Cycle Read READ# High to Address Valid READ# High to ES Valid READ# Pulse Width Read Data Valid to READ# High READ# High to Read Data Hold Write WRITE# High to Address Valid WRITE# High to ES Valid WRITE# to WRITE# Pulse Width WRITE# Low to Write Data Valid WRITE# High to Write Data Hold – – 17.72 – 5.0 7.1 11.2 12.2 12.5 13.5 124.01 8.0 – ns ns ns ns ns – – 17.72 6.1 0 11.2 12.2 12.5 13.5 124.01 – – ns ns ns ns ns Min 28.224 35.43 Typ. Max Units MHz ns WTH Notes: 1. ES = RAMSEL# or ROMSEL#. 2. Read pulse width and write pulse width: RAM: t ,t = 0.5 t = 17.72 for Non-Extended Cycle Timing RW WW CYC ROM: t ,t = 3.5 t = 124.01 for Extended Cycle Timing RW WW CYC 3. Memory speed determination: RAM: tACCESS = t -t -t = 35.43 - 13.5 - 6.3 = 15.63 ns (i.e., use 15 ns memory) CYC ES RDS ROM: tACCESS = 4(t )-t -t = 4(35.43) - 13.5 - 6.3 = 121.92 ns (i.e., use 90 ns memory). CYC ES RDS 4. Output Enable to Output Delay Timing: RAM: t =t -t = 0.5(t )-t = 17.72 - 6.3 = 11.42 ns OE RW RDS CYC RDS ROM: t =t -t = 3.5(t )-t = 124.01 - 6.3 = 117.71 ns. OE RW RDS CYC RDS 3-26 Conexant 102228A CX06833-3x/4x SMXXD Modem Data Sheet Figure 3-7. Waveforms - External Memory Bus t C2* t A[18:0] t ES#** t READ# t D[7:0] * C2 = Internal Phase 2 clock. ** ES# = RAMSEL# or ROMSEL#. Read Timing RDS t RDH ES AS CYC RW t C2* CYC t A[18:0] t ES#** t WRITE# t D[7:0] * C2 = Internal Phase 2 clock. ** ES# = RAMSEL# or ROMSEL#. WTD WW AS ES t WTH Write Timing 100491 F3-09 WF EB 102228A Conexant 3-27 CX06833-3x/4x SMXXD Modem Data Sheet 3.4.2 Parallel Host Bus Timing The parallel host bus timing is listed in Table 3-14 and illustrated in Figure 3-8. Table 3-14. Timing - Parallel Host Bus Symbol t t t t t t t t t t t t t t AS AH CS CH RD DD DRH AS AH CS CH WT DS Address Setup Address Hold Chip Select Setup Chip Select Hold HRD# Strobe Width Read Data Delay Read Data Hold Address Setup Address Hold Chip Select Setup Chip Select Hold HWT# Strobe Width Write Data Setup (see Note 4) Parameter Min. Max. – – – – – 45 – – – – – – 35 Units ns ns ns ns ns ns ns ns ns ns ns ns ns READ (See Notes 1, 2, 3, 4, 5, and 6) 5 10 0 10 51 – 10 WRITE (See Notes 1, 2, 3, 4, 5, and 6) 5 10 0 10 50 – Write Data Hold (see Note 5) 5 – ns DWH Notes: 1. When the host executes consecutive Rx FIFO reads, a minimum delay of 2 times the internal CPU clock cycle plus 15 ns (85.86 ns at 28.224 MHz) is required from the falling edge of HRD# to the falling edge of the next Host Rx FIFO HRD# clock. 2. When the Host executes consecutive Tx FIFO writes, a minimum delay of 2 times the internal CPU clock cycle plus 15 ns (85.86 ns at 28.224 MHz) is required from the falling edge of HWT# to the falling edge of the next Host Tx FIFO HWT# clock. 3. t , t =t + 15 ns. RD WT CYC 4. t is measured from the point at which both HCS# and HWT# are active. DS 5. t is measured from the point at which either HCS# and HWT# become inactive. DWH 6. Clock frequency = 28.224 MHz clock. 3-28 Conexant 102228A CX06833-3x/4x SMXXD Modem Data Sheet Figure 3-8. Waveforms - Parallel Host Bus HA[2-0] tAS HCS# tCS HRD# tRD HWT# tCH tAH HD[7-0] tDD tDRH a. Host Read HA[2-0] tAS tAH HCS# tCS HRD# tWT HWT# tDS HD[7-0] tDWH tCH b. Host Write 100491 F3-10 WF-HB 102228A Conexant 3-29 CX06833-3x/4x SMXXD Modem Data Sheet 3.4.3 Serial DTE Interface The serial DTE interface waveforms for 4800 and 9600 bps are illustrated in Figure 3-9. Figure 3-9. Waveforms - Serial DTE Interface TXCLK 4800 BPS TXD 4800 BPS TXCLK 9600 BPS TXD 9600 BPS NOTE: THIS FIGURE IS VALID FOR SYNCHRONOUS MODE ONLY. THERE IS NO RELATIONSHIP BETWEEN NOTE: TXD AND TXCLK IN ASYNCHRONOUS MODE. a. Transmit RXCLK 4800 BPS RXD 4800 BPS RXCLK 9600 BPS RXD 9600 BPS NOTE: THIS FIGURE IS VALID FOR SYNCHRONOUS MODE ONLY. THERE IS NO RELATIONSHIP BETWEEN NOTE: RXD AND RXCLK IN ASYNCHRONOUS MODE. b. Receive 1227F3-14 WF-Ser DTE 3-30 Conexant 102228A CX06833-3x/4x SMXXD Modem Data Sheet 3.5 Crystal Specifications Crystal specifications are listed in Table 3-15. Table 3-15. Crystal Specifications Characteristic Frequency Calibration tolerance including effects due to temperature and aging Oscillation mode Calibration mode Load capacitance, C L Shunt Capacitance, C O Series resistance, R 1 Drive level Operating temperature Storage temperature Value 28.224 MHz nominal ±100 ppm at 25°C (C = 16.5 and 19.5 pF) L Fundamental Parallel resonant 18 pF nom. 7 pF max. 35-60 Ω max. @20 nW drive level 100µW correlation; 500µW max. 0°C to 70°C –40°C to 85°C 102228A Conexant 3-31 CX06833-3x/4x SMXXD Modem Data Sheet This page is intentionally blank. 3-32 Conexant 102228A CX06833-3x/4x SMXXD Modem Data Sheet 4. Package Dimensions The 144-pin TQFP package dimensions are shown in Figure 4-1. The 32-pin TQFP package dimensions are shown in Figure 4-2. Figure 4-1. Package Dimensions - 144-Pin TQFP D D1 D2 PIN 1 REF D D1 D2 D1 e b DETAIL A Dim. A Millimeters Max. Min. 1.6 MAX 0.15 0.05 1.4 REF 22.25 21.75 20.0 REF 17.5 REF 0.75 0.5 1.0 REF 0.50 BSC 0.17 0.27 0.17 0.11 0.08 MAX Inches* Max. Min. 0.0630 MAX 0.0020 0.0059 0.0551 REF 0.8563 0.8760 0.7874 REF 0.6890 REF 0.0197 0.0295 0.0394 REF 0.0197 BSC 0.0067 0.0043 0.0106 0.0067 D1 A1 A2 D D1 D2 L L1 e b c Coplanarity A A2 0.0031 MAX Ref: 144-PIN TQFP (GP00-D252) c A1 L1 DETAIL A L * Metric values (millimeters) should be used for PCB layout. English values (inches) are converted from metric values and may include round-off errors. PD-TQFP-144 (040395) 102228A Conexant 4-1 CX06833-3x/4x SMXXD Modem Data Sheet Figure 4-2. Package Dimensions - 32-Pin TQFP D D1 D2 PIN 1 REF D D1 D2 D1 e b DETAIL A Dim. A Millimeters Max. Min. 1.6 MAX 0.15 0.05 1.4 REF 9.25 8.75 7.0 REF 5.6 REF 0.75 0.5 1.0 REF 0.80 BSC 0.30 0.40 0.19 0.13 0.10 MAX Inches* Max. Min. 0.0630 MAX 0.0020 0.3445 0.0059 0.3642 0.0551 REF 0.2756 REF 0.2205 REF 0.0197 0.0295 0.0394 REF 0.0315 BSC 0.0118 0.0051 0.0157 0.0075 D1 A1 A2 D D1 D2 L L1 e b c Coplanarity A A2 0.004 MAX Ref: 32-PIN TQFP (GP00-D262) c A1 L1 DETAIL A PD-TQFP-32 (040395) L * Metric values (millimeters) should be used for PCB layout. English values (inches) are converted from metric values and may include round-off errors. 4-2 Conexant 102228A CX06833-3x/4x SMXXD Modem Data Sheet 5. Parallel Host Interface The modem supports a 16550A interface in parallel interface versions. The 16550A interface can operate in FIFO mode or non-FIFO mode. Non-FIFO mode is the same as 16450 interface operation. FIFO mode unique operations are identified. 5.1 Overview The parallel interface registers and the corresponding bit assignments are shown in Table 5-1. The modem emulates the 16450/16550A interface and includes both a 16-byte receiver data first-in first-out buffer (RX FIFO) and a 16-byte transmit data first-in first-out buffer (TX FIFO). When FIFO mode is selected in the FIFO Control Register (FCR0 = 1), both FIFOs are operative. Furthermore, when FIFO mode is selected, DMA operation of the FIFO can also be selected (FCR3 = 1). When FIFO mode is not selected, operation is restricted to 16450 interface operation. The received data is read by the host from the Receiver Buffer (RX Buffer). The RX Buffer corresponds to the Receiver Buffer Register in a 16550A device. In FIFO mode, the RX FIFO operates transparently behind the RX Buffer. Interface operation is described with reference to the RX Buffer in both FIFO and non-FIFO modes. The transmit data is loaded by the host into the Transmit Buffer (TX Buffer). The TX Buffer corresponds to the Transmit Holding Register in a 16550A device. In FIFO mode, the TX FIFO operates transparently behind the TX Buffer. Interface operation is described with reference to the TX Buffer in both FIFO and non-FIFO modes. 102228A Conexant 5-1 CX06833-3x/4x SMXXD Modem Data Sheet Table 5-1. Parallel Interface Registers Register No. 7 6 Register Name Scratch Register (SCR) Modem Status Register (MSR) Data Carrier Detect (DCD) Line Status Register (LSR) RX FIFO Error Ring Indicator (RI) Data Set Ready (DSR) 7 6 5 4 Clear to Send (CTS) Bit No. 3 Delta Data Carrier Detect (DDCD) Framing Error (FE) 2 Trailing Edge of Ring Indicator Parity Error (PE) 1 0 Scratch Register Delta Data Delta Clear to Send Set Ready (DCTS) (DDSR) Overrun Error (OE) Receiver Data Ready (DR) 5 Break Transmitter Transmitter Interrupt (BI) Buffer Empty Register (TEMT) Empty (THRE) 0 0 Local Loopback 4 Modem Control Register (MCR) 0 Out 2 Out 1 Request to Send (RTS) Data Terminal Ready (DTR) 3 Line Control Register (LCR) Divisor Latch Set Break Access Bit (DLAB) FIFOs Enabled Receiver Trigger MSB 0 FIFOs Enabled Receiver Trigger LSB 0 Stick Parity Even Parity Select (EPS) Parity Enable (PEN) Word Number of Word Length Length Stop Bits Select Bit 1 (WLS1) Select Bit 0 (STB) (WLS0) “0" if Interrupt Pending FIFO Enable Enable Received Data Available Interrupt (ERBFI) 2 Interrupt Identify Register (IIR) (Read Only) FIFO Control Register (FCR) (Write Only) 0 0 Pending Pending Pending Interrupt ID Interrupt ID Interrupt ID Bit 0 Bit 1 Bit 2 DMA Mode Select Enable Modem Status Interrupt (EDSSI) TX FIFO Reset RX FIFO Reset 2 Reserved Reserved 1 Interrupt Enable Register (IER) (DLAB = 0) 0 0 Enable Enable Receiver Transmitter Holding Line Status Register Interrupt Empty (ELSI) Interrupt (ETBEI) 0 Transmitter Buffer Register (DLAB = 0) (THR) 0 Receiver Buffer Register (RBR) (DLAB = 0) 1 Divisor Latch MSB Register (DLAB = 1) (DLM) 0 Divisor Latch LSB Register (DLAB = 1) (DLL) Transmitter FIFO Buffer Register (Write Only) Receiver FIFO Buffer Register (Read Only) Divisor Latch MSB Divisor Latch LSB 5-2 Conexant 102228A CX06833-3x/4x SMXXD Modem Data Sheet 5.2 5.2.1 Register Signal Definitions IER - Interrupt Enable Register (Addr = 1, DLAB = 0) The IER enables five types of interrupts that can separately assert the HINT output signal (Table 5-2). A selected interrupt can be enabled by setting the corresponding enable bit to a 1, or disabled by setting the corresponding enable bit to a 0. Disabling an interrupt in the IER prohibits setting the corresponding indication in the IIR and assertion of HINT. Disabling all interrupts (resetting IER0 - IER3 to a 0) inhibits setting of any Interrupt Identifier Register (IIR) bits and inhibits assertion of the HINT output. All other system functions operate normally, including the setting of the Line Status Register (LSR) and the Modem Status Register (MSR). Bits 7-4 Bit 3 Not used. Always 0. Enable Modem Status Interrupt (EDSSI). This bit, when a 1, enables assertion of the HINT output whenever the Delta CTS (MSR0), Delta DSR (MSR1), Delta TER (MSR2), or Delta DCD (MSR3) bit in the Modem Status Register (MSR) is a 1. This bit, when a 0, disables assertion of HINT due to setting of any of these four MSR bits. Bit 2 Enable Receiver Line Status Interrupt (ELSI). This bit, when a 1, enables assertion of the HINT output whenever the Overrun Error (LSR1), Parity Error (LSR2), Framing Error (LSR3), or Break Interrupt (LSR4) receiver status bit in the Line Status Register (LSR) changes state. This bit, when a 0, disables assertion of HINT due to change of the receiver LSR bits 1-4. Bit 1 Enable Transmitter Holding Register Empty Interrupt (ETBEI). This bit, when a 1, enables assertion of the HINT output when the Transmitter Empty bit in the Line Status Register (LSR5) is a 1. This bit, when a 0, disables assertion of HINT due to LSR5. Bit 0 Enable Receiver Data Available Interrupt (ERBFI) and Character Timeout in FIFO Mode. This bit, when a 1, enables assertion of the HINT output when the Receiver Data Ready bit in the Line Status Register (LSR0) is a1 or character timeout occurs in the FIFO mode. This bit, when a 0, disables assertion of HINT due to the LSR0 or character timeout. 102228A Conexant 5-3 CX06833-3x/4x SMXXD Modem Data Sheet 5.2.2 FCR - FIFO Control Register (Addr = 2, Write Only) The FCR is a write-only register used to enable FIFO mode, clear the RX FIFO and TX FIFO, enable DMA mode, and set the RX FIFO trigger level. Bits 7-6 RX FIFO Trigger Level. FCR7 and FCR6 set the trigger level for the RX FIFO (Receiver Data Available) interrupt. FCR7 0 0 1 1 FCR6 0 1 0 1 RX FIFO Trigger Level (Bytes) 01 04 08 14 Bits 5-4 Bit 3 Not used. DMA Mode Select. When FIFO mode is selected (FCR0 = 1), FCR3 selects non-DMA operation (FCR3 = 0) or DMA operation (FCR3 = 1). When FIFO mode is not selected (FCR0 = 0), this bit is not used (the modem operates in non-DMA mode in 16450 operation). DMA operation in FIFO mode RXRDY will be asserted when the number of characters in the RX FIFO is equal to or greater than the value in the RX FIFO Trigger Level (IIR0-IIR3 = 4h) or the received character timeout (IIR0-IIR3 = Ch) has occurred. RXRDY will go inactive when there are no more characters in the RX FIFO. TXRDY will be asserted when there are one or more empty (unfilled) locations in the TX FIFO. TXRDY will go inactive when the TX FIFO is completely full. Non-DMA operation in FIFO mode RXRDY will be asserted when there are one or more characters in the RX FIFO. RXRDY will go inactive when there are no more characters in the RX FIFO. TXRDY will be asserted when there are no characters in the TX FIFO. TXRDY will go inactive when the first character is loaded into the TX FIFO Buffer. Bit 2 TX FIFO Reset. When FCR2 is a 1, all bytes in the TX FIFO are cleared. This bit is cleared automatically by the modem. Bit 1 RX FIFO Reset. When FCR1 is a 1, all bytes in the RX FIFO are cleared. This bit is cleared automatically by the modem. Bit 0 FIFO Enable. When FCR0 is a 0, 16450 mode is selected and all bits are cleared in both FIFOs. When FCR0 is a 1, FIFO mode (16550A mode) is selected and both FIFOs are enabled. FCR0 must be a 1 when other bits in the FCR are written or they will not be acted upon. 5-4 Conexant 102228A CX06833-3x/4x SMXXD Modem Data Sheet 5.2.3 IIR - Interrupt Identifier Register (Addr = 2) The Interrupt Identifier Register (IIR) identifies the existence and type of up to five prioritized pending interrupts. Four priority levels are set to assist interrupt processing in the host. The four levels, in order of decreasing priority, are: Highest: Receiver Line Status, 2: Receiver Data Available or Receiver Character Timeout, 3: TX Buffer Empty, and 4: Modem Status. When the IIR is accessed, the modem freezes all interrupts and indicates the highest priority interrupt pending to the host. Any change occurring in interrupt conditions are not indicated until this access is complete. Bits 7-6 Bits 5-4 Bits 3-1 FIFO Mode. These two bits copy FCR0. Not Used. Always 0. Highest Priority Pending Interrupt. These three bits identify the highest priority pending interrupt (Table 5-2). Bit 3 is applicable only when FIFO mode is selected, otherwise bit 3 is a 0. Bit 0 Interrupt Pending. When this bit is a 0, an interrupt is pending; IIR bits 1-3 can be used to determine the source of the interrupt. When this bit is a1, an interrupt is not pending. Table 5-2. Interrupt Sources and Reset Control Interrupt Identification Register Bit 31 0 0 Bit 2 0 1 Bit 1 0 1 Bit 0 1 0 Priority Level — Highest Interrupt Type None Receiver Line Status None Overrun Error OE (LSR1), Parity Error (PE) (LSR2), Framing Error (FE) (LSR3), or Break Interrupt (BI) (LSR4) Received Data Available (LSR0) or RX FIFO Trigger Level (FCR61 FCR7) Reached The RX FIFO contains at least 1 character and no characters have been removed from or input to the RX FIFO during the last 4 character times. TX Buffer Empty Delta CTS (DCTS) (MSR0), Delta DSR (DDSR) (MSR1), Trailing Edge Ring Indicator (TERI) (MSR3), or Delta DCD (DCD) (MSR4) Interrupt Set and Reset Functions Interrupt Source — Reading the LSR Interrupt Reset Control 0 1 0 0 2 Received Data Available Character Time-out 1 Reading the RX Buffer or the RX FIFO drops below the Trigger Level Reading the RX Buffer 1 1 0 0 2 Indication 0 0 0 0 1 0 0 0 3 4 TX Buffer Empty Modem Status Reading the IIR or writing to the TX Buffer Reading the MSR Notes: 1. FIFO Mode only. 102228A Conexant 5-5 CX06833-3x/4x SMXXD Modem Data Sheet 5.2.4 LCR - Line Control Register (Addr = 3) The Line Control Register (LCR) specifies the format of the asynchronous data communications exchange. Bit 7 Divisor Latch Access Bit (DLAB). This bit must be set to a 1 to access the Divisor latch registers during a read or write operation. It must be reset to a 0 to access the Receiver Buffer, the Transmitter Buffer, or the Interrupt Enable Register. Bit 6 Set Break. When bit 6 is a 1, the transmit data is forced to the break condition, i.e., space (0) is sent. When bit 6 is a 0, break is not sent. The Set Break bit acts only on the transmit data and has no effect on the serial in logic. Bit 5 Stick Parity. When parity is enabled (LCR3 = 1) and stick parity is selected (LCR5 = 1), the parity bit is transmitted and checked by the receiver as a 0 if even parity is selected (LCR4 = 1) or as a 1 if odd parity is selected (LCR4 = 0). When stick parity is not selected (LCR3 = 0), parity is transmit and checked as determined by the LCR3 and LCR4 bits. Bit 4 Even Parity Select (EPS). When parity is enabled (LCR3 = 1) and stick parity is not selected (LCR5 = 0), the number of 1s transmitted or checked by the receiver in the data word bits and parity bit is either even (LCR4 = 1) or odd (LCR4 = 0). Bit 3 Enable Parity (PEN). When bit 3 is a 1, a parity bit is generated in the serial out (transmit) data stream and checked in the serial in (receive) data stream as determined by the LCR 4 and LCR5 bits. The parity bit is located between the last data bit and the first stop bit. Bit 2 Number of Stop Bits (STB). This bit specifies the number of stop bits in each serial out character. If bit 2 is a 0, one stop bit is generated regardless of word length. If bit 2 is a 1 and 5-bit word length is selected, one and one-half stop bits are generated. If bit 2 is a 1 and a 6-, 7-, or 8-bit word length is selected, two stop bits are generated. The serial in logic checks the first stop bit only, regardless of the number of stop bits selected. Bits 1-0 Word Length Select (WLS0 and WLS1). These two bits specify the number of bits in each serial in or serial out character. The encoding of bits 0 and 1 is: Bit 1 0 0 1 1 Bit 0 0 1 0 1 Word Length 5 Bits (Not supported) 6 Bits (Not supported) 7 Bits 8 Bits 5-6 Conexant 102228A CX06833-3x/4x SMXXD Modem Data Sheet 5.2.5 MCR - Modem Control Register (Addr = 4) The Modem Control Register (MCR) controls the interface with the modem or data set. Bit 7-5 Bit 4 Not used. Always 0. Local Loopback. When this bit is set to a 1, the diagnostic mode is selected and the following occurs: 1. 2. Data written to the Transmit Buffer is looped back to the Receiver Buffer. The DTS (MCR0), RTS (MCR1), Out1 (MCR2), and Out2 (MCR3) modem control register bits are internally connected to the DSR (MSR5), CTS (MSR4), RI (MSR6), and DCD (MSR7) modem status register bits, respectively. Output 2. When this bit is a 1, HINT is enabled. When this bit is a 0, HINT is in the high impedance state. Bit 2 Bit 1 Output 1. This bit is used in local loopback (see MCR4). Request to Send (RTS). This bit controls the Request to Send (RTS) function. When this bit is a 1, RTS is on. When this bit is a 0, RTS is off. Bit 0 Data Terminal Ready (DTR). This bit controls the Data Terminal Ready (DTR) function. When this bit is a 1, DTR is on. When this bit is a 0, DTR is off. Bit 3 5.2.6 LSR - Line Status Register (Addr = 5) This 8-bit register provides status information to the host concerning data transfer. Bit 7 RX FIFO Error. In the 16450 mode, this bit is not used and is always 0. In the FIFO mode, this bit is set if there are one or more characters in the RX FIFO with a parity error, framing error, or break indication detected. This bit is reset to a 0 when the host reads the LSR and none of the above conditions exist in the RX FIFO. Bit 6 Transmitter Empty (TEMT). This bit is set to a 1 whenever the TX Buffer (THR) and equivalent of the Transmitter Shift Register (TSR) are both empty. It is reset to a 0 whenever either the THR or the equivalent of the TSR contains a character. In the FIFO mode, this bit is set to a 1 when ever the TX FIFO and the equivalent of the TSR are both empty. 102228A Conexant 5-7 CX06833-3x/4x SMXXD Modem Data Sheet Bit 5 Transmitter Holding Register Empty (THRE) [TX Buffer Empty]. This bit, when set, indicates that the TX Buffer is empty and the modem can accept a new character for transmission. In addition, this bit causes the modem to issue an interrupt to the host when the Transmit Holding Register Empty Interrupt Enable bit (IIR1) is set to 1. The THRE bit is set to a 1 when a character is transferred from the TX Buffer. The bit is reset to 0 when a byte is written into the TX Buffer by the host. In the FIFO mode, this bit is set when the TX FIFO is empty; it is cleared when at least one byte is in the TX FIFO. Bit 4 Break Interrupt (BI). This bit is set to a 1 whenever the received data input is a space (logic 0) for longer than two full word lengths plus 3 bits. The BI bit is reset when the host reads the LSR. Bit 3 Framing Error (FE). This bit indicates that the received character did not have a valid stop bit. The FE bit is set to a 1 whenever the stop bit following the last data bit or parity bit is detected as a logic o (space). The FE bit is reset to a 0 when the host reads the LSR. In the FIFO mode, the error indication is associated with the particular character in the FIFO it applies to; the FE bit is set to a 1 when this character is loaded into the RX Buffer. Bit 2 Parity Error (PE). This bit indicates that the received data character in the RX Buffer does not have the correct even or odd parity, as selected by the Even Parity Select bit (LCR4) and the Stick Parity bit (LCR5). The PE bit is reset to a 0 when the host reads the LSR. In the FIFO mode, the error indication is associated with the particular character in the it applies to; the PE bit is set to a 1 when this character is loaded into the RX Buffer. Bit 1 Overrun Error (OE). This bit is set to a 1 whenever received data is loaded into the RX Buffer before the host has read the previous data from the RX Buffer. The OE bit is reset to a 0 when the host reads the LSR. In the FIFO mode, if data continues to fill beyond the trigger level, an overrun condition will occur only if the RX FIFO is full and the next character has been completely received. Bit 0 Receiver Data Ready (DR). This bit is set to a 1 whenever a complete incoming character has been received and has been transferred into the RX Buffer. The DR bit is reset to a 0 when the host reads the RX Buffer. In the FIFO mode, the DR bit is set when the number of received data bytes in the RX FIFO equals or exceeds the trigger level specified in FCR0-FCR1. 5-8 Conexant 102228A CX06833-3x/4x SMXXD Modem Data Sheet 5.2.7 MSR - Modem Status Register (Addr = 6) The Modem Status Register (MSR) reports current state and change information of the modem. Bits 4-7 supply current state and bits 0-3 supply change information. The change bits are set to a 1 whenever a control input from the modem changes state from the last MSR read by the host. Bits 0-3 are reset to 0 when the host reads the MSR or upon reset. Whenever bits 0, 1, 2, or 3 are set to a 1, a Modem Status Interrupt (IIR0-IIR3 = 0) is generated. Bit 7 Data Carrier Detect (DCD). This bit indicates the logic state of the DCD# (RLSD#) output. If Loopback is selected (MCR4 = 1), this bit reflects the state of the Out2 bit in the MCR (MCR3). Bit 6 Ring Indicator (RI). This bit indicates the logic state of the RI# output. If Loopback is selected (MCR4 = 1), this bit reflects the state of the Out1 bit in the MCR (MCR2). Bit 5 Data Set Ready (DSR). This bit indicates the logic state of the DSR# output. If Loopback is selected (MCR4 = 1), this bit reflects the state of the DTR bit in the MCR (MCR0). Bit 4 Clear to Send (CTS). This bit indicates the logic state of the CTS# output. If Loopback is selected (MCR4 = 1), this bit reflects the state of the RTS bit in the MCR (MCR1). Bit 3 Delta Data Carrier Detect (DDCD). This bit is set to a 1 when the DCD bit changes state since the MSR was last read by the host. Bit 2 Trailing Edge of Ring Indicator (TERI). This bit is set to a 1 when the RI bit changes from a 1 to a 0 state since the MSR was last read by the host. Bit 1 Delta Data Set Ready (DDSR). This bit is set to a 1 when the DSR bit has changed since the MSR was last read by the host. Bit 0 Delta Clear to Send (DCTS). This bit is set to a 1 when the CTS bit has changed since the MSR was last read by the host. 5.2.8 RBR - RX Buffer (Receiver Buffer Register) (Addr = 0, DLAB = 0) The RX Buffer (RBR) is a read-only register at location 0 (with DLAB = 0). Bit 0 is the least significant bit of the data, and is the first bit received. 5.2.9 THR - TX Buffer (Transmitter Holding Register) (Addr = 0, DLAB = 0) The TX Buffer (THR) is a write-only register at address 0 when DLAB = 0. Bit 0 is the least significant bit and the first bit sent. 102228A Conexant 5-9 CX06833-3x/4x SMXXD Modem Data Sheet 5.2.10 Divisor Registers (Addr = 0 and 1, DLAB = 1) The Divisor Latch LS (least significant byte) and Divisor Latch MS (most significant byte) are two read-write registers at locations 0 and 1 when DLAB = 1, respectively. The baud rate is selected by loading each divisor latch with the appropriate hex value. Programmable values corresponding to the desired baud rate are listed in Table 5-3. 5.2.11 SCR - Scratch Register (Addr = 7) The Scratchpad Register is a read-write register at location 7. This register is not used by the modem and can be used by the host for temporary storage. Table 5-3. Programmable Baud Rates Divisor Latch (Hex) MS 06 04 03 01 00 00 00 00 00 00 00 00 00 00 00 LS 00 17 00 80 C0 60 30 18 0C 06 04 03 02 01 00 Divisor (Decimal) 1536 1047 768 384 192 96 48 24 12 6 4 3 2 1 NA Baud Rate 75 110 150 300 600 1200 2400 4800 9600 19200 28800 38400 57600 115200 230400 5.3 5.3.1 Receiver FIFO Interrupt Operation Receiver Data Available Interrupt When the FIFO mode is enabled (FCR0 = 1) and receiver interrupt (RX Data Available) is enabled (IER0 = 1), receiver interrupt operation is as follows: 1. 2. The Receiver Data Available Flag (LSR0) is set as soon as a received data character is available in the RX FIFO. LSR0 is cleared when the RX FIFO is empty. The Receiver Data Available interrupt code (IIR0-IIR4 = 4h) is set whenever the number of received data bytes in the RX FIFO reaches the trigger level specified by FCR6-FCR7 bits; it is cleared whenever the number of received data bytes in the RX FIFO drops below the trigger level specified by FCR6-FCR7 bits. The HINT interrupt is asserted whenever the number of received data bytes in the RX FIFO reaches the trigger level specified by FCR6-FCR7 bits. HINT interrupt is de-asserted when the number of received data bytes in the RX FIFO drops below the trigger level specified by FCR6-FCR7 bits. 3. 5-10 Conexant 102228A CX06833-3x/4x SMXXD Modem Data Sheet 5.3.2 Receiver Character Timeout Interrupts When the FIFO mode is enabled (FCR0 = 1) and receiver interrupt (Receiver Data Available) is enabled (IER0 = 1), receiver character timeout interrupt operation is as follows: 1. A Receiver character timeout interrupt code (IIR0-IIR3 = Ch) is set if at least one received character is in the RX FIFO, the most recent received serial character was longer than four continuous character times ago (if 2 stop bits are specified, the second stop bit is included in this time period), and the most recent host read of the RX FIFO was longer than four continuous character times ago. 5.4 5.4.1 Transmitter FIFO Interrupt Operation Transmitter Empty Interrupt When the FIFO mode is enabled (FCR0 = 1) and transmitter interrupt (TX Buffer Empty) is enabled (IER0 = 1), transmitter interrupt operation is as follows: 1. The TX Buffer Empty interrupt code (IIR0-IIR3 = 2h) will occur when the TX Buffer is empty; it is cleared when the TX Buffer is written to (1 to 16 characters) or the IIR is read. The TX Buffer Empty indications will be delayed 1 character time minus the last stop bit time whenever the following occur: THRE = 1 and there have not been at least two bytes at the same time in the TX FIFO Buffer since the last setting of THRE was set. The first transmitter interrupt after setting FCR0 will be immediate. 2. 102228A Conexant 5-11 CX06833-3x/4x SMXXD Modem Data Sheet This page is intentionally blank. 5-12 Conexant 102228A NOTES www.conexant.com General Information: U.S. and Canada: (800) 854-8099 International: (949) 483-6996 Headquarters – Newport Beach 4311 Jamboree Rd. Newport Beach, CA. 92660-3007