CCLD-912-155.520

CCLD-912 Model 9X14 mm SMD, 3.3V, LVDS Frequency Range: Frequency Stability: Temperature Range: (Option M) (Option X) Storage: Input Voltage: Input Current: Output: Symmetry: Rise/Fall Time: Load: 100 Ohms Logic: Output Voltage Levels Disable Time Enable Time 12KHz to 20MHz ree dF ea oHS nt L R plia m Co Differential LVDS Clock Oscillator Designed to meet today's requirements for 3.3V LVDS applications. The CCLD-912 is a very low noise, low jitter clock oscillator. Also available in 2.5V model. Available on tape and reel in quantities of 500ea. 77.760MHz to 161MHz ±25ppm to ±100ppm 0°C to 70°C -20°C to 70°C -40°C to 85°C -55°C to 120°C 3.3V ± 0.3V 35mA Typ, 47mA Max Differential LVDS 45/55% Max @ 50% Vdd 1ns Max @ 20% to 80% Vdd Connected between OUT and COUT "0" = 1.10V Typical, 0.90V Min "1" = 1.45V Typical, 1.65V Max 200ns Max 200ns Max 1ps RMS Max Jitter: Aging: