CB3LV-5I-19M440000

Model CB3 & CB3LV HCMOS/TTL Clock Oscillator FEATURES • • • • • • • • • • Standard 7.0mm x 5.0mm 4-Pad Surface Mount Package HCMOS/TTL Compatible Output Fundamental and 3rd Overtone Crystal Designs Frequency Range 1 – 200 MHz Frequency Stability ±50 ppm Standard, ±25 ppm and ±20 ppm Available Operating Voltages +5.0Vdc or +3.3Vdc Operating Temperature to -40°C to +85°C Output Enable Standard Tape & Reel Packaging RoHS/Green Compliant (6/6) APPLICATIONS Applications for Model CB3 and CB3LV include digital video, networking equipment, wireless communications, broadband access, Ethernet/Gigabit Ethernet, microprocessors/DSP/FPGA, storage area networks, fiber channel, computers and peripherals, test and measurement, SONET/SDH/DWDM, base stations and Pico cells. ORDERING INFORMATION CB3 - - M SUPPLY VOLTAGE FREQUENCY IN MHz LV = +3.3Vdc Blank = +5.0Vdc M - indicates MHz and decimal point. FREQUENCY STABILITY 1 6 = ± 20 ppm 5 = ± 25 ppm 3 = ± 50 ppm [std] 7 = ± 32 ppm OPERATING TEMPERATURE RANGE C = -20°C to +70°C [standard] I = -40°C to +85°C 1 2 2 = ± 100 ppm 3 2 1] 6I Stability/Temperature combination is not available. 2] These stabilities are not recommended for new designs. 3] Frequency is recorded with only leading significant digits before the ‘M’ and 4 - 6 significant digits after the ‘M’ (including zeros). [Ex. 3.579545 MHz, code as 3M579545; 14.31818 MHz, code as 14M31818; 125 MHz, code as 125M0000] 4] CTS Distributors may add a -T or -1 at the end of the part number to indicate Tape and Reel packaging. Not all performance combinations and frequencies may be available. Contact your local CTS Representative or CTS Customer Service for availability. PACKAGING INFORMATION [reference] Device quantity is 1,000 pieces maximum per reel. Document No. 008-0256-0 Page 1- 3 www.ctscorp.com Rev. G Model CB3 & CB3LV 7.0mm x 5.0mm Low Cost HCMOS/TTL Clock Oscillator ELECTRICAL CHARACTERISTICS PARAMETER Maximum Supply Voltage Storage Temperature SYMBOL VCC CONDITIONS - MIN -0.5 TYP - MAX +7.0 UNIT V TSTG - -40 - +100 °C fO - 1.5 - 107 MHz - 1.5 - 200 Frequency Range CB3 CB3LV Frequency Stability Aging Operating Temperature Commercial Industrial Supply Voltage CB3 CB3LV Supply Current Δf/fO Δf VCC ELECTRICAL PARAMETERS 20,25,50 or 100 ± ppm 3 5 ± ppm -20 -40 25 +70 +85 °C 4.5 3.0 5.0 3.3 5.5 3.6 V - 10 30 40 7 20 30 - 25 50 80 12 40 60 50 30 15 90%VCC VCC-0.6V - - - - 10%VCC 0.4 - - -16/-8 - - +16/+8 45 - 55 - 8 5 2.5 6 3 1.5 - 10 8 5 8 5 3 10 ms - V - ±10% Frequency Range ICC Logic '0' Level - - Tested load condition noted for typical values. CB3LV Output Voltage Levels Logic '1' Level - First year TA CB3 Output Load See Note 1 and Ordering Information CL VOH VOL 1.5MHz to 20MHz 20.001MHz to 80MHz 80.001MHz to 107MHz 1.5MHz to 20MHz 20.001MHz to 80MHz 80.001MHz to 200MHz 1.5MHz to 50MHz 50.001MHz to 80MHz 80.001MHz to 200MHz CL=50pF CL=50pF CL=15pF CL=15pF CL=15pF CL=15pF CMOS Load 10 TTL LOAD CMOS TTL Load mA pF V Output Current Logic '1' Level IOH VOH = 3.9V/2.2V Logic '0' Level IOL VOL = 0.4V Output Duty Cycle Rise and Fall Time SYM VCC = 4.5V/3.0V VCC = 4.5V/3.0V @ 50% Level @ 10% - 90% Levels mA % Tested load condition noted for typical values. CB3 CL=50pF CL=50pF CL=15pF CL=15pF CL=15pF CL=15pF TS 1.5MHz to 20MHz 20.001MHz to 80MHz 80.001MHz to 200MHz 1.5MHz to 20MHz 20.001MHz to 80MHz 80.001MHz to 200MHz Application of VCC Enable Input Voltage VIH Pin 1 Logic '1', Output Enabled 2.0 - Disable Input Voltage VIL Pin 1 Logic '0', Output Disabled - - 0.8 Enable Time TPLZ Pin 1 Logic '1' - - 200 ns Standby Current IST Pin 1 Logic '0', Output Disabled - - 10 µA Period Jitter, Pk-Pk - - - - 50 Period Jitter, RMS - - - - TR, TF CB3LV Start Up Time ns Enable Function Bandwidth 12kHz - 20MHz Phase Jitter, RMS Notes: 1. Inclusive of initial tolerance at time of shipment, changes in supply voltage, load, temperature and 1st year aging. Document No. 008-0256-0 Page 2 - 3 5 ps 1 Rev. G Model CB3 & CB3LV 7.0mm x 5.0mm Low Cost HCMOS/TTL Clock Oscillator ELECTRICAL CHARACTERISTICS LVCMOS OUTPUT WAVEFORM TEST CIRCUIT, CMOS LOAD ENABLE TRUTH TABLE D.U.T. PIN ASSIGNMENTS PIN SYMBOL PIN 1 Logic ‘1’ Open Logic ‘0’ PIN 3 Output Output High Imp. DESCRIPTION 1 EOH Enable 2 GND Circuit & Package Ground 3 Output 4 VCC RF Output Supply Voltage MECHANICAL SPECIFICATIONS MARKING INFORMATION 1. ** – Manufacturing Site Code. PACKAGE DRAWING [Note a dash may follow the site code and is acceptable.] 2. XXXMXXXXXX – Frequency is marked with only leading significant digits before the ‘M’ and 4 – 6 digits after the ‘M’ (including zeros). CTS**CB3 XXXMXXXXXX ● YYWWSTV Ex. XMXXXXXX [3M579545] XXMXXXXX [14M31818] XXXMXXXX [125M0000] 3. YYWW – Date code, YY – year, WW – week. 4. ST – Frequency stability/temperature code. [Refer to Ordering Information.] 5. V – Voltage code. 3 = 3.3V, 5 = 5.0V. NOTES 1. Termination pads [e4]. Barrier-plating is nickel [Ni] with gold [Au] flash plate. 2. Reflow conditions per JEDEC J-STD-020, 260°C maximum. 3. Moisture Sensitivity Level 1 per JEDEC J-STD-020. SUGGESTED SOLDER PAD GEOMETRY CBYPASS should be ≥ 0.01 uF. Document No. 008-0256-0 Page 3 - 3 Rev. G