CTST571QG

CTST571 Programmable Capacitive Tuning IC SON8, MLP6 FEATURES       Capacitive Tuning Range of 6.6pF to 37.553pF 0.063pF Minimum Step Size Continually Programmable with Register or EEPROM Data Storage May Be Placed in Parallel for Greater Capacitance Values 2.5V to 5.0V Supply Voltage RoHS compliant Pb Free Packages BLOCK DIAGRAM DESCRIPTION The CTST571 is a digitally programmed capacitor designed to tune a filter or crystal/SAW based oscillator to a desired center frequency. Through a bank of registers, the capacitance value is set by a serial data stream and if desired, can be permanently stored in the nonvolatile EEPROM memory. The CTST571 is designed to be a labor and cost saving device within the oscillator production process and provide the desired functionality for tunable filter banks. While incorporating very small step sizes (0.063pF), multiple CTST571 devices can also be used in parallel to obtain higher overall capacitance values. The CTST571 is available in an SON8 package (1.5mm x 1.0mm) for very small form factor designs. Also available in MLP6. ENGINEERING NOTES Capacitor Structure The CTST571 capacitance value is composed of four parallel capacitors banks, CF is a fixed capacitor value of 6.6pF and CHI, CMID and CLO are variable capacitors of differing ranges and resolutions as seen in Table 1. Capacitors composing CHI, CMID and CLO are set with a binary control word through an 11-bit shift register described in “Programming the CTST571” section. The values of each CHI, CMID and CLO stepping are detailed in the complete Nominal Capacitance Binary Mapping spreadsheet. CTOTAL = CF + CHI + CMID + CLO Table 1 – Capacitor Structure Internal Capacitor CF Min Value (pF) Max Value (pF) Step Size (pF) 6.6 6.6 CHI 0 19.2 6.4 CMID 0 9.8 1.4 0.063 CLO 0 1.953 Total 6.6 37.553 n/a North Americas: +1-800-757-6686 • International: +1-508-435-6831 • Asia: +65-655-17551 • www.ctscorp.com/semiconductors Specifications are subject to change without notice. 1 RevA0215 CTST571 Programmable Capacitive Tuning IC SON8, MLP6 CTST571 Functional Mode The CTST571 has two methods for setting the capacitance value on the X1 pin.  Reading the Control Word Directly From the Shift Register In tunable filter applications, reading from the shift register will be desirable as the control word can be constantly varied. New control words can be serially inputted as required to change the capacitance value in real time. (Note: With a serial data input, the capacitance value during transitions between control words is deterministic upon their differences.) The shift register is also useful for testing the capacitance and subsequent oscillator frequency. This mode is active when the CLK pin is left logic high. For the shift register, capacitors are selected when bits are active HIGH.  Reading the Control Word From the Value Contained in the EEPROM If a certain control word needs to be stored, it can be written to the nonvolatile EEPROM memory. This is useful in oscillator applications where it prevents customer adjustment and retains factory programming. This mode is active when the CLK pin is at logic low or not connected. For the EEPROM, capacitors are selected when bits are active LOW. Oscillator Application In oscillator applications, the CTST571 is designed to be used in 2 modes, Programming and Operational. In the Programming mode, the CTST571 is used by the manufacturer to set the capacitance value to control the desired center frequency of the oscillator. The programming phase gives the manufacturer access to pins DA, CLK, and PV where the shift registers are used to first determine the required control word. That control word is then stored in the EEPROM memory. CTS can provide this board (CTS10EL89) along with software that works through all the programming steps/functions described in the next sections (Figure 1). In the Operational mode, the EEPROM internal to the CTST571 has already been programmed with the desired factory settings. Pins DA, CLK, and PV are to be disconnected, thereby allowing the CTST571’s internal pull-downs to place the pins at ground potential. In the operational mode, only 3 pins are necessary for hookup (Figure 2). North Americas: +1-800-757-6686 • International: +1-508-435-6831 • Asia: +65-655-17551 • www.ctscorp.com/semiconductors Specifications are subject to change without notice. 2 RevA0215 CTST571 Programmable Capacitive Tuning IC SON8, MLP6 CTST571 (CTS10EL89) Figure 1 – CTST571 in Programming Mode CTST571 Figure 2 – CTST571 in Operational Mode North Americas: +1-800-757-6686 • International: +1-508-435-6831 • Asia: +65-655-17551 • www.ctscorp.com/semiconductors Specifications are subject to change without notice. 3 RevA0215 CTST571 Programmable Capacitive Tuning IC SON8, MLP6 Programing the CTST570 Control Word The capacitance in the CTST571 is controlled by an 11-bit shift register with the data input bit definitions shown in Table 2. The control word data is inputted serially on the rising edge of the CLK signal with bit-0 first and bit10 last. Table 2 – CTST571 Control Word Definition bit-10 bit-9 bit-8 CHI MSB bit-7 11-bit Control Word bit-6 bit-5 bit-4 MSB --- bit-2 bit-1 bit-0 --- LSB Not Used CLO CMID LSB bit-3 LSB MSB --- --- The control word mapping is a binary word for each of CHI, CMID and CLO where higher number bits are more significant. Figure 3 shows the capacitance value mapping for the CTST571. The detailed Nominal Capacitance Binary Mapping can be located on the CTS website. Figure 3 - CTST571 Capacitance Value Code Mapping North Americas: +1-800-757-6686 • International: +1-508-435-6831 • Asia: +65-655-17551 • www.ctscorp.com/semiconductors Specifications are subject to change without notice. 4 RevA0215 CTST571 Programmable Capacitive Tuning IC SON8, MLP6 Programming from the Shift Register Control word bits are inputted serially through the DA pin timed with the rising edge of the CLK pin. Figure 4 shows the control word 11001100100 has been serially entered into the register. Note that bit-0 is the 1st bit to enter and bit-10 is the last. In the CTST571, bit-0 does not affect the capacitance value but still must be included in the serial bit stream. For the shift register, capacitors are selected when bits are active HIGH. For the CTST571 to read from the shift register, the CLK pin must remain HIGH. Figure 4 – Shift Register Programming Writing Data to the EEPROM Once the desired capacitance value has been determined, the digital control word can be written or re-written into the EEPROM. By storing the control word in the EEPROM, the customer is prevented from making adjustments from the factory set programming data. This is accomplished within the CTST571 with internal pull-downs on the DA, PV, and CLK pins. The detailed sequence for writing data to the EEPROM within the CTST571 is described in Table 5. Note that with EEPROM, capacitors are selected when bits are active LOW. Table 3 – Data Writing Sequence for EEPROM Step 1 Action Determine the desired capacitor control word with the operational power supply voltage and desired oscillator conditions. 2 Set the VDD supply voltage to +5.0V. 3 If EEPROM is not already erased, erase EEPROM (see “Erasing the EEPROM” section). 4 Read the current state of the EEPROM bits (see “Reading Back from the EEPROM” section). 6 Compare the desired control word to the stored EEPROM control word. Count the number of differences so as to prevent double/redundant writing. One bit at a time, load the first desired control word bit (bit selection for EEPROM is active LOW). 7 Set the PV pin to +6V (≥5.6V, ≤6.1V) with the pulse and idle shown in timing diagram (Figure 7). 8 Progress through all necessary control word bits by repeating steps 5 & 6 until all bits are set to the desired control word. 9 Verify the correct EEPROM contents by reading back the individual bits. 5 North Americas: +1-800-757-6686 • International: +1-508-435-6831 • Asia: +65-655-17551 • www.ctscorp.com/semiconductors Specifications are subject to change without notice. 5 RevA0215 CTST571 Programmable Capacitive Tuning IC SON8, MLP6 For an example of writing bits into the EEPROM, suppose the desired capacitance is 3.43pF. The control word becomes ‘00000010100’ (Figure 5). Also suppose the EEPROM bits have been erased and therefore logic high (The CTST571 is initially shipped in this condition). Since bit-0 is the first bit to be loaded, the bit sequence becomes 0-0-1-0-1-0-0-0-0-0-0. However, as described before, selecting bits for the EEPROM are active LOW, which will invert the logical values in the sequence to 1-1-0-1-0-1-1-1-1-1-1 (Figure 6). Note the differences between the EEPROM bits and the converted control word. Since there are 2 differences, two write cycles are required as only 1 bit should be written at a time. Figure 7 shows the timing for bit-2 while Figure 8 shows the timing for bit-4. Figure 5 – Desired Control Word Figure 6 – Converted control word and differences from known EEPROM states Figure 7 – First Programming Cycle to Program bit-2 into the EEPROM North Americas: +1-800-757-6686 • International: +1-508-435-6831 • Asia: +65-655-17551 • www.ctscorp.com/semiconductors Specifications are subject to change without notice. 6 RevA0215 CTST571 Programmable Capacitive Tuning IC SON8, MLP6 Figure 8 – Second Programming Cycle to Program bit-4 into the EEPROM Reading Back from the EEPROM During programming, the PV pin is used to program the necessary control bits into the EEPROM. However, it is also used to read the bits currently programmed into the EEPROM. When the PV pin is not used during programming, the CTST571 provides a weak pull-up and pull-down on the pin. This allows the EEPROM data to be shifted out to the PV pin and read after the CLK sequence is complete and when the DA & CLK pins are high (Figure 9). Each EEPROM bit is selected by setting the DA signal low (EEPROM selection is active low) during the CLK sequence. With an external 68kΩ resistor pull-up to VDD on the PV pin, a low EEPROM bit produces ≤ 0.4*VDD level while a high EEPROM bit produces a ≥ 0.6*VDD level. Figure 9 – Timing Diagram to Read bits from EEPROM North Americas: +1-800-757-6686 • International: +1-508-435-6831 • Asia: +65-655-17551 • www.ctscorp.com/semiconductors Specifications are subject to change without notice. 7 RevA0215 CTST571 Programmable Capacitive Tuning IC SON8, MLP6 Erasing the EEPROM The EEPROM can be erased by initiating a programming cycle with all DA bits set high, including bit-9 and bit10. After the programming cycle, all the EEPROM bits are set low (logical high) except for the check bit (bit-0), which remains high. Table 4 – Erase Sequence for EEPROM Step Action 1 Set the VDD supply voltage to +5.0V. 2 Load the programming word bits all high. 3 Set the PV pin to +6V (≥5.6V, ≤6.1V) with the pulse and idle shown in timing diagram (Figure 10). 4 Verify the correct EEPROM contents by reading back the individual bits. Figure 10 – Programming Sequence for Erasing the EEPROM Programming Voltage Limit Circuit Some existing programming circuits use a current source connected to a 6.5 – 8.0V supply. That circuit produces an excessive voltage on the PV pin, which can damage the CTST571. A simple modification eliminates the issue and maintains full programming compatibility with existing programming methods. A 5.6V, ½ watt Zener, 1N5232B or equivalent, placed between the PV pin and ground will limit the voltage while still allowing the programming circuit to generate the current required for programming fuse link type parts. North Americas: +1-800-757-6686 • International: +1-508-435-6831 • Asia: +65-655-17551 • www.ctscorp.com/semiconductors Specifications are subject to change without notice. 8 RevA0215 CTST571 Programmable Capacitive Tuning IC SON8, MLP6 ELECTRICAL SPECIFICATIONS Table 5 – Absolute Maximum Ratings Parameter 1 Description Conditions Min VDD Power Supply Supply voltages between 4.0V-4.5V may not allow for reliable operation VABSOLUTE 1 VI TA Power Supply Input Voltage Operating Temperature Range 2.375 4.5 0 -0.5 -40 Typ Max 3.63 5.5 6.5 VDD + 0.5 +125 TSTG ESDHBM ESDMM ESDCDM Storage Temperature Range Human Body Model Machine Model Charged Device Model -65 2000 200 2000 +150 Unit V V V °C °C V V V PV pin can exceed VDD by 1.2V during the programming interval. Table 6 – DC Characteristics DC Characteristics (VDD = 2.375V to 5.5V unless otherwise specified, TA = -40 to +125°C) Symbol Characteristic Min Typ Max Unit +15 % ±150 ppm/V CVV CTV Capacitance variation across temperature 100MHz – Zero Code 100MHz – Mid Code1 100MHz – Full Scale VIH Input HIGH Voltage DA, CLK 0.8 * VDD V VIL RPD,D RPD,CLK RPD,PV Pull-down Resistor Pull-down Resistor Pull-down Resistor Pull-down Resistor DA, CLK DA CLK PV 0.2 * VDD 55k 75k 170k V Ω Ω Ω VOH Output HIGH Voltage 0.6 * VDD V VOL Output LOW Voltage Programming Voltage (VDD = 5.0V) PV pin when reading EEPROM bits 68kΩ pull-up resistors to VDD 0.4 * VDD V CPV VPP 1 Conditions Capacitance variation across process Capacitance variation across output voltage IDD Power Supply Current IDDPROG Power Supply Current tMEM EEPROM Data Retention tPROG Programming Temperature CyPROG Programming Cycle -15 Voltage variation at X1 pin, 100MHz PV pin when programming EEPROM Normal Operation, VDD 3.63V Programming Mode 325 40 130 5.6 Recommended 10 ppm/°C 6.0 6.1 10.0 20.0 35 70 20 V µA µA 20 yrs 25 °C k bit-4, bit-7 High. North Americas: +1-800-757-6686 • International: +1-508-435-6831 • Asia: +65-655-17551 • www.ctscorp.com/semiconductors Specifications are subject to change without notice. 9 RevA0215 CTST571 Programmable Capacitive Tuning IC SON8, MLP6 Table 8 – AC Characteristics AC Characteristics (VDD = 2.375V to 5.5V unless otherwise specified, TA = -40 to +125°C) Symbol Characteristic CF Fixed Capacitance 6.6 Step Size 6.4 Max Value 19.2 Step Size 1.4 Max Value 9.8 Step Size 0.063 Max Value 1.953 CHI CMID CLO Min Typ Max Unit pF pF pF pF CLK Max CLK Rate TPROG Programming Time (VDD = 5.0V, PV = 6.0V) Q Conditions 50% duty cycle 100 10.0 20MHz – Full Scale 200 320 20MHz – Mid Scale 100 200 100MHz – Full Scale 50 80 100MHz – Mid Scale 50 70 200MHz – Full Scale 25 40 200MHz – Mid Scale 35 50 800MHz – Full Scale 8 12 800MHz – Mid Scale 10 15 kHz ms Q Value North Americas: +1-800-757-6686 • International: +1-508-435-6831 • Asia: +65-655-17551 • www.ctscorp.com/semiconductors Specifications are subject to change without notice. 10 RevA0215 CTST571 Programmable Capacitive Tuning IC SON8, MLP6 Pin Description and Configuration Pin Assignments for SON8 Package Pin Name Type Function 1 X1 Output Capacitance 2 NC n/a Not connected 3 VSS Power Negative Supply (GND) 4 VDD Power Positive Supply 5 DA Input Programming Data Input 6 CLK Input Programming Clock Input 7 NC n/a Not connected 8 PV Input Programming Voltage SON8 Pin Assignments for 6MLP Pin Name Type Function 1 X1 Output Capacitance 2 VSS Power Negative Supply (GND) 3 VDD Power Positive Supply 4 DA Input Programming Data Input 5 CLK Input Programming Clock Input 6 PV Input Programming Voltage MLP6 North Americas: +1-800-757-6686 • International: +1-508-435-6831 • Asia: +65-655-17551 • www.ctscorp.com/semiconductors Specifications are subject to change without notice. 11 RevA0215 CTST571 Programmable Capacitive Tuning IC SON8, MLP6 PACKAGE DIMENSIONS North Americas: +1-800-757-6686 • International: +1-508-435-6831 • Asia: +65-655-17551 • www.ctscorp.com/semiconductors Specifications are subject to change without notice. 12 RevA0215 CTST571 Programmable Capacitive Tuning IC SON8, MLP6 PACKAGE DIMENSIONS PART ORDERING INFORMATION Part Number Package Marking CTST571QG SON8 Y YM CTST571MG MLP6 Y1G / YM North Americas: +1-800-757-6686 • International: +1-508-435-6831 • Asia: +65-655-17551 • www.ctscorp.com/semiconductors Specifications are subject to change without notice. 13 RevA0215