BCM20732YT

Please note that Cypress is an Infineon Technologies Company. The document following this cover page is marked as “Cypress” document as this is the company that originally developed the product. Please note that Infineon will continue to offer the product to new and existing customers as part of the Infineon product portfolio. Continuity of document content The fact that Infineon offers the following product as part of the Infineon product portfolio does not lead to any changes to this document. Future revisions will occur when appropriate, and any changes will be set out on the document history page. Continuity of ordering part numbers Infineon continues to support existing part numbers. Please continue to use the ordering part numbers listed in the datasheet for ordering. www.infineon.com PRELIMINARY CYW20732Y Bluetooth Low Energy SiP Module General Description The Cypress CYW20732Y is a Bluetooth Low-Energy (BLE)-only System-in-Package (SiP). The CYW20732Y radio has been designed to provide low power, low cost, and robust communications for applications operating in the globally available 2.4 GHz unlicensed Industrial, Scientific, and Medical (ISM) band. The highly integrated module requires minimal external components to make a standalone 32-bit ARM™ Cortex™ M3 and 1 Mbit EEPROM BLE SiP module. The CYW20732Y is available in a 27-pin 3.5 mm × 3.2 mm x 1.0 mm maximum 27-LGA package. Features ■ Bluetooth Low-Energy (BLE)-compliant ■ Infrared modulator ■ IR learning ■ Supports Adaptive Frequency Hopping (AFH) ■ Excellent receiver sensitivity ■ 10-bit auxiliary ADC with nine analog channels ■ On-chip support for serial peripheral interface (master and slave modes) ■ Broadcom Serial Control (BSC) interface (compatible with NXP I2C slaves) 32-bit ARM™ Cortex™ M3 microcontroller unit (MCU) ■ Embedded 1 Mbit I2C Memory capacity EEPROM memory capacity ■ UART diverse serial interface ■ Sensor applications support for I2C, GPIO, and PCM ■ ■ MAC/BB/RF functionality on a single chip ■ 2.4 GHz frequency band support ■ BLE network standard compliance with Bluetooth Special Interest Group (SIG) requirements ■ Compliance with Moisture Sensitivity Level (MSL) 3 for semiconductor packaging and handling precautions ■ Programmable output power control ■ Integrated ARM Cortex-M3 based microprocessor core ■ On-chip power-on reset (POR) ■ FCC and CE certification and compliance ■ Support for EEPROM and serial flash interfaces ■ RoHS compliant ■ Integrated Low Drop Out (LDO) regulator ■ ■ On-chip, software controlled power management unit Satisfies MSL3 and J-STD-020 specification requirements (peak temperature 260° C) and is capable of 260° C peak reflow. ■ Programmable key scan matrix interface, up to 8 × 20 key-scanning matrix ■ Satisfies Restriction of Hazardous Substances (RoHS) Directive 2002/95/EC and 2011/65/EU. ■ 27-pin 27-Land Grid Array (LGA) (3.5 mm × 3.2 mm x 1.0 mm) package. Cypress Semiconductor Corporation Document No. 002-14838 Rev. *C • 198 Champion Court • San Jose, CA 95134-1709 • 408-943-2600 Revised November 9, 2017 PRELIMINARY CYW20732Y Figure 1. Functional Block Diagram VBAT VDDC VDBL UART interface BT_RF I2 C CYW20732Y GPIOs with ARM Cortex M 3 microprocessor core 2.4 MHz VDBL_EE PCM XTAL Flash 1 Mbit I2C Introduction This data sheet provides a description of the major blocks, interfaces, pin assignments, and specifications of the CYW20732Y singlechip Bluetooth low energy (BLE) SoC. This is a required document for designers responsible for adding the CYW20732Y BLE SoC to wireless input device applications including heart-rate monitors, blood-pressure monitors, proximity sensors, temperature sensors, and battery monitors. Cypress Part Numbering Scheme Cypress is converting the acquired IoT part numbers from Cypress to the Cypress part numbering scheme. Due to this conversion, there is no change in form, fit, or function as a result of offering the device with Cypress part number marking. The table provides Cypress ordering part number that matches an existing IoT part number. Table 1. Mapping Table for Part Number between Broadcom and Cypress Broadcom Part Number Cypress Part Number BCM20732Y CYW20732Y BCM20732YB3ISLGH (T) CYW20732YB3ISLGH (T) Acronyms and Abbreviations In most cases, acronyms and abbreviations are defined upon first use. For a more complete list of acronyms and other terms used in Cypress documents, go to: http://www.cypress.com/glossary. IoT Resources Cypress provides a wealth of data at http://www.cypress.com/internet-things-iot to help you to select the right IoT device for your design, and quickly and effectively integrate the device into your design. Cypress provides customer access to a wide range of information, including technical documentation, schematic diagrams, product bill of materials, PCB layout information, and software updates. Customers can acquire technical documentation and software from the Cypress Support Community website (https://community.cypress.com/). Document No. 002-14838 Rev. *C Page 2 of 26 PRELIMINARY CYW20732Y Contents 1. Functional Description ..................................... 4 1.1 4.2 RF Transmitter Specifications ............................10 Bluetooth Baseband Core ................................... 4 1.1.1 Frequency Hopping Generator ................ 4 1.1.2 E0 Encryption .......................................... 4 1.1.3 Link Control Layer ................................... 4 1.1.4 Adaptive Frequency Hopping .................. 4 1.1.5 Bluetooth Low Energy Profiles ................ 4 1.1.6 Test Mode Support .................................. 5 5. Timing Specifications..................................... 11 1.2 Infrared Modulator ............................................... 5 5.2.4 Crystal Oscillator ....................................14 1.3 Infrared Learning ................................................. 5 6. Mechanical ...................................................... 15 1.4 Serial Peripheral Interface ................................... 5 6.1 Dimensions ........................................................15 1.5 Microprocessor Unit ............................................ 6 1.5.1 EEPROM Interface .................................. 6 1.5.2 Serial Flash Interface ............................... 6 6.2 Recommended Footprint ....................................16 6.3 Recommended Stencil .......................................17 6.4 Recommended Reflow Profile ............................18 2. Pin Assignments............................................... 7 2.1 Pin Descriptions .................................................. 7 2.2 Pin Definition ....................................................... 8 3. Electrical Specifications................................... 9 3.1 Absolute Maximum Ratings ................................ 9 3.2 Recommended Operating Conditions ................. 9 3.2.1 Temperature and Humidity ...................... 9 5.1 External Reset ....................................................11 5.2 Timing and AC Characteristics ...........................12 5.2.1 SPI Timing ..............................................12 5.2.2 BSC Interface Timing .............................13 5.2.3 UART Timing ..........................................14 7. Packaging and Storage .................................. 19 7.1 Package Dimensioning ......................................19 7.2 Laser Mark .........................................................20 7.3 Pin 1 Location in the Tape/Reel .........................20 7.4 Moisture Sensitive Level (MSL) .........................21 7.5 SiP Module Tray .................................................22 7.6 Product Qualification Report ..............................23 3.2.2 Voltage .................................................... 9 3.2.3 Current Consumption .............................. 9 8. Ordering Information...................................... 24 4. RF Specifications............................................ 10 Document History Page ................................................. 25 4.1 RF Performance ................................................ 10 Document No. 002-14838 Rev. *C Sales, Solutions, and Legal Information ...................... 26 Page 3 of 26 PRELIMINARY CYW20732Y 1. Functional Description 1.1 Bluetooth Baseband Core The Bluetooth Baseband Core (BBC) implements all of the time-critical functions required for high performance Bluetooth operation. The BBC manages the buffering, segmentation, and data routing for all connections. It also buffers data that passes through it, handles data flow control, schedules ACL TX/RX transactions, monitors Bluetooth slot usage, optimally segments and packages data into baseband packets, manages connection status indicators, and composes and decodes HCI packets. In addition to these functions, it independently handles HCI event types and HCI command types. The following transmit and receive functions are also implemented in the BBC hardware to increase TX/RX data reliability and security before sending over the air: ■ Receive Functions: symbol timing recovery, data deframing, forward error correction (FEC), header error control (HEC), cyclic redundancy check (CRC), data decryption, and data dewhitening. ■ Transmit Functions: data framing, FEC generation, HEC generation, CRC generation, link key generation, data encryption, and data whitening. 1.1.1 Frequency Hopping Generator The frequency hopping sequence generator selects the correct hopping channel number depending on the link controller state, Bluetooth clock, and device address. 1.1.2 E0 Encryption The encryption key and the encryption engine are implemented using dedicated hardware to reduce software complexity and provide minimal processor intervention. 1.1.3 Link Control Layer The link control layer is part of the Bluetooth link control functions that are implemented in dedicated logic in the link control unit (LCU). This layer consists of the Command Controller, which takes software commands, and other controllers that are activated or configured by the Command Controller to perform the link control tasks. Each task performs a different Bluetooth link controller state. STANDBY and CONNECTION are the two major states. In addition, there are five substates: page, page scan, inquiry, and inquiry scan. 1.1.4 Adaptive Frequency Hopping The CYW20732Y gathers link quality statistics on a channel-by-channel basis to facilitate channel assessment and channel map selection. The link quality is determined by using both RF and baseband signal processing to provide a more accurate frequency hop map. 1.1.5 Bluetooth Low Energy Profiles The CYW20732Y supports Bluetooth low-energy, including the following profiles that are supported1 in ROM: ■ Battery status ■ Blood pressure monitor ■ Find me ■ Heart rate monitor ■ Proximity ■ Thermometer ■ Weight scale ■ Time 1.Full qualification and use of these profiles may require firmware updates from Cypress. Some of these profiles are under development/approval at the Bluetooth SIG and conformity with the final approved version is pending. Contact your supplier for updates and the latest list of profiles. Document No. 002-14838 Rev. *C Page 4 of 26 PRELIMINARY CYW20732Y The following additional profiles can be supported1 from RAM: ■ Blood glucose monitor ■ Temperature alarm ■ Location ■ Custom profile 1.1.6 Test Mode Support The CYW20732Y fully supports Bluetooth Test mode, as described in the Bluetooth low energy specification. 1.2 Infrared Modulator The CYW20732Y includes hardware support for infrared TX. The hardware can transmit both modulated and unmodulated waveforms. For modulated waveforms, hardware inserts the desired carrier frequency into all IR transmissions. IR TX can be sourced from firmware-supplied descriptors, a programmable bit, or the peripheral UART transmitter. If descriptors are used, they include IR on/off state and the duration between 1 and 32,767 µsec. The CYW20732Y IR TX firmware driver inserts this information in a hardware FIFO and makes sure that all descriptors are played out without a glitch due to underrun. 1.3 Infrared Learning The CYW20732Y includes hardware support for infrared learning. The hardware can detect both modulated and unmodulated signals. For modulated signals, the CYW20732Y can detect carrier frequencies between 10 kHz– 500 kHz and the duration that the signal is present or absent. The CYW20732Y firmware driver supports further analysis and compression of learned signal. The learned signal can then be played back through the CYW20732Y IR TX subsystem. 1.4 Serial Peripheral Interface The CYW20732Y has two independent SPI interfaces. One is a master-only interface and the other can be either a master or a slave. Each interface has a 16-byte transmit buffer and a 16-byte receive buffer. To support more flexibility for user applications, the CYW20732Y has optional I/O ports that can be configured individually and separately for each functional pin. Document No. 002-14838 Rev. *C Page 5 of 26 PRELIMINARY CYW20732Y 1.5 Microprocessor Unit The CYW20732Y microprocessor unit (µPU) executes software from the link control (LC) layer up to the application layer components. The microprocessor is based on an ARM Cortex-M3, 32-bit RISC processor with embedded ICE-RT debug and JTAG interface units. The µPU has 320 KB of ROM for program storage and boot-up, 60 KB of RAM for scratch-pad data, and patch RAM code. The SoC has a total storage of 380 KB, including RAM and ROM. The internal boot ROM provides power-on reset flexibility, which enables the same device to be used in different HID applications with an external serial EEPROM or with an external serial flash memory. At power-up, the lowest layer of the protocol stack is executed from the internal ROM memory. External patches may be applied to the ROM-based firmware to provide flexibility for bug fixes and feature additions. The device can also support the integration of user applications. 1.5.1 EEPROM Interface The CYW20732Y provides a Broadcom Serial Control (BSC) master interface. BSC is programmed by the CPU to generate four types of bus transfers: read-only, write-only, combined read/write, and combined write/read. BSC supports both low-speed and fast mode devices. BSC is compatible with an NXP I2C slave device, except that master arbitration (multiple I2C masters contending for the bus) is not supported. The EEPROM can contain customer application configuration information including application code, configuration data, patches, pairing information, BD_ADDR, baud rate, SDP service record, and file system information used for code. Native support for the Microchip 24LC128, Microchip 24AA128, and the STMicroelectronics M24128-BR is included. 1.5.2 Serial Flash Interface The CYW20732Y includes an SPI master controller that can be used to access serial flash memory. The SPI master contains an AHB slave interface, transmit and receive FIFOs, and the SPI core PHY logic. Devices natively supported include the following: ■ Atmel® AT25BCM512B ■ MXIC MX25V512ZUI-20G Document No. 002-14838 Rev. *C Page 6 of 26 PRELIMINARY CYW20732Y 2. Pin Assignments 2.1 Pin Descriptions Table 1. Pin Descriptions Pin Number Pin Name I/O Type Description 1 VBAT I RF Power Supply 2 GND GND GND 3 GND GND GND 4 BT _RF I/O Antenna Port for Bluetooth Tx/Rx. 5 GND GND GND 6 XIN I Crystal oscillator input. See Table 11 for options. 7 XOUT O Crystal oscillator output. 8 VDDC_input I Baseband power supply 9 VDBL I IO pad and core supply 10 SCL I/O PU Clock signal for an external I2C device 11 SDA I/O PU Data signal for an external I2C device 12 UART_TX O PU UART_TX 13 UART_RX I UART_RX 14 RESET_N I/O PU Active-low system reset with open-drain output and internal pull-up resistor. 15 PUART_RX GPIO: P0 – Peripheral UART: puart_tx Default Direction: Input After POR State: Input Floating Alternate Function Description: 1. A/D converter input 2. SPI_2: MOSI (master and slave) 3. IR_RX 4. 60Hz_main 5. GPIO: P0 Not available during TMC=1 16 PUART_TX GPIO: P33 – Peripheral UART: puart_rx Default Direction: Input After POR State: Input Floating Alternate Function Description: 1. A/D converter input 2. SPI_2: MOSI (slave only) 3. Auxiliary clock output: ACLK1 4. GPIO: P33 17 VDBL_EE I EEPORM power supply 18 PCM_SERO GPIO: P25 – SPI_2: MISO (master and slave) Default Direction: Input After POR State: Input Floating Alternate Function Description: 1. Peripheral UART: puart_rx 2. GPIO: P25 19 PCM_CLK GPIO: P24 – SPI_2: SPI_CLK (master and slave) Default Direction: Input After POR State: Input Floating Alternate Function Description: 1. SPI_2: SPI_CLK (master and slave) 2. SPI_1: MISO (master only) 3. Peripheral UART: puart_tx 4. GPIO: P25 Document No. 002-14838 Rev. *C Page 7 of 26 PRELIMINARY CYW20732Y Table 1. Pin Descriptions (Cont.) Pin Number Pin Name I/O Type Description 20 PCM_SERI P GPIO: P4 – SPI_2: MOSI (master and slave) Default Direction: Input After POR State: Input Floating Alternate Function Description: 1. Peripheral UART: puart_rx 2. IR_TX 3. GPIO: P4 21 PCM_FR GPIO: P26 PWM0 – SPI_2: SPI_CS (slave only) Default Direction: Input After POR State: Input Floating Alternate Function Description: 1. SPI_1: MISO (master only) 2. GPIO: P26 Provides 16 mA drive strength at 3.3V supply 22 GPIO: P11 – Default Direction: Input After POR State: Input Floating Alternate Function Description: 1.A/D converter input 23 GND GND Ground 24 GND GND Ground 25 GND GND Ground 26 GND GND Ground 27 EEWEN I 2.2 Pin Definition Figure 1 shows the 27-pin number land grid array (LGA) sequence definition. Figure 1. 27-Pin LGA Sequence Definition Document No. 002-14838 Rev. *C Page 8 of 26 PRELIMINARY CYW20732Y 3. Electrical Specifications 3.1 Absolute Maximum Ratings Table 2. Absolute Maximum Ratings Requirement Power Storage Temperature – Min Max –40° C 125°C Voltage ripple – Max. Values not exceeding Operating voltage (+/- 2%) Power Supply Absolute Maximum Ratings VBAT - 1.4V Power Supply Absolute Maximum Ratings VDDC_Input - 1.4V Power Supply Absolute Maximum Ratings VDBL - 3.8V Power Supply Absolute Maximum Ratings VDBL_EE - 3.8V 3.2 Recommended Operating Conditions 3.2.1 Temperature and Humidity The CYW20732Y module must withstand the operational requirements shown in Table 3. Table 3. Temperature and Humidity Condition Rating Description Operating Temperature –30°C to 85°C – Humidity range Maximum 95% Non condensing, relative humidity 3.2.2 Voltage The power supply for the CYW20732Y module is provided by the host via the power pins. Table 4. Recommended Voltages Symbol Parameter Min Typ Max Unit VBAT – 1.14 1.2 1.26 V VDDC_Input – 1.14 1.2 1.26 – VDBL – 1.62 – 3.63 – VDBL_EE – 1.70 – 3.63 V 3.2.3 Current Consumption The current consumption ratings will be based on an operating temperature condition of 25°C. Table 5. Current Consumption Item Condition Min Nom Max Unit Receive Receiver and baseband are both operating at 100% 19.0 – 20.8 mA Transmit Transmitter and baseband are both operating at 100% 19.0 – 19.7 mA Sleep – 1.2 – 1.5 μA Document No. 002-14838 Rev. *C Page 9 of 26 PRELIMINARY CYW20732Y 4. RF Specifications 4.1 RF Performance Table 6. RF Performance Parameter Mode and Conditions Min. Typ. Max. Unit Receiver Section Frequency range RX sensitivity (standard) Packets: 200, Payload: PRBS 9, Length: 37 Bytes, Dirty Transmitter: off. PER: 30.8% Maximum input 2402 – 2480 MHz –92 – – dBm –10 – – dBm 4.2 RF Transmitter Specifications Table 7. RF Transmitter Specifications Parameter Mode and Conditions Min. Typ. Max. Unit Transmitter Section Frequency range – 2402 – 2480 MHz Output power adjustment range – -20 – 4 dBm Output power – – 3 – dBm Output power variation – – 2 – dB - – – ±150 KHz Frequency drift – – – ±50 kHz Drift rate – – – 20 kHz/50 µs Average deviation in payload (sequence used is 00001111) – 225 – 275 kHz Average deviation in payload (sequence used is 10101010) – 185 – – kHz Channel spacing – – 2 – MHz LO Performance Initial carrier frequency tolerance Frequency Drift Frequency Deviation Note: The RF transmitter specification compliance is to the BT 4.0 standard with conductive measurements. Document No. 002-14838 Rev. *C Page 10 of 26 PRELIMINARY CYW20732Y 5. Timing Specifications 5.1 External Reset Figure 2. External Reset Timing Document No. 002-14838 Rev. *C Page 11 of 26 PRELIMINARY CYW20732Y 5.2 Timing and AC Characteristics 5.2.1 SPI Timing Figure 3. SPI Timing: Modes 0 and 2 Figure 4. SPI Timing: Modes 1 and 3 Table 8. SPI Interface Timing Specifications Reference Characteristics Min Typ Max 1 Time from CSN asserted to first clock edge 1 SCK 100 ∞ 2 Master setup time – 1/2SCK – 3 Master hold time 1/2SCK – – 4 Slave setup time – 1/2 SCK – 5 Slave hold time 1/2 SCK – – 6 Time from last clock edge to CSN deasserted SCK 10 SCK 100 Document No. 002-14838 Rev. *C Page 12 of 26 PRELIMINARY CYW20732Y 5.2.2 BSC Interface Timing Figure 5. BSC Interface Timing Table 9. BSC Interface Timing Specifications Reference 1 Characteristics Clock frequencies Min Max Unit – 100 KHz – 400 KHz – 800 KHz – 1000 KHz 2 START condition setup time 650 – ns 3 START condition hold time 280 – ns 4 Clock low time 650 – ns 5 Clock high time 280 – ns 6 Data input hold time 0 – ns 7 Data input setup time 100 – ns 8 STOP condition setup time 280 – ns 9 Output valid from clock – 400 ns 10 Bus free time 650 – ns Document No. 002-14838 Rev. *C Page 13 of 26 PRELIMINARY CYW20732Y 5.2.3 UART Timing Figure 6. UART Timing Table 10. UART Timing Specifications Reference Characteristics Min Max Unit 1 Delay time, UART_CTS_N low to UART_TXD valid – 24 Baudout cycles 2 Setup time, UART_CTS_N high before midpoint of stop bit – 10 ns 3 Delay time, midpoint of stop bit to UART_RTS_N high – 2 Baudout cycles 5.2.4 Crystal Oscillator The CYW20732Y is set with a crystal frequency of 24 MHz. The crystal oscillator requires a crystal with an accuracy of ±20 ppm as defined by the Bluetooth specification. Two external load capacitors in the range of 5 pF to 30 pF are required to function with the crystal oscillator. The selection of the load capacitors is crystal dependent. Table 11 shows the recommended crystal specification. Table 11. Crystal Oscillator Parameter Symbol Conditions Min Typ Max Unit Frequency – – – 24.000 – Oscillation Mode – Fundamental – – – Frequency tolerance @25°C – – ±10 – ppm Tolerance stability over temp @-20°C to +85°C – – ±10 – ppm Equivalent series resistance – – – – 50 Ω Load Capacitance – – – 12 – pF Document No. 002-14838 Rev. *C MHz Page 14 of 26 PRELIMINARY CYW20732Y 6. Mechanical 6.1 Dimensions The physical dimensions of the CYW20732Y module are 3.5 mm (W) x 3.2 mm (L) x 1.0 mm (H). Tolerance: ± 0.1 mm The mechanical dimensions of the CYW20732Y module are 3.5 x 3.2 x 1.0 mm3. Figure 7. BCM20732Y Mechanical Drawing Document No. 002-14838 Rev. *C Page 15 of 26 PRELIMINARY CYW20732Y 6.2 Recommended Footprint The CYW20732Y module dimension measurement is in mm. Figure 8. BCM20732Y Recommended Footprint Notes: 1. Use the NCMD standard to design the main board footprint. 2. There are three types of pads in the module: a. Type A: pad size: 0.275 x 0.25 mm with a solder mask opening of 0.375 x 0.35 mm. b. Type B: pad size: 0.3 x 0.25 mm with a solder mask opening of 0.4 x 0.35 mm. c. Type C: pad size: 0.25 x 0.25 mm with a solder mask opening of 0.35 x 0.35 mm. Document No. 002-14838 Rev. *C Page 16 of 26 PRELIMINARY CYW20732Y 6.3 Recommended Stencil The CYW20732Y module dimension measurement is in mm. Figure 9. BCM20732Y Recommended Stencil Notes: 1. Stencil thickness is 0.08~0.1 mm 2. Type 4 solder paste is recommended. Document No. 002-14838 Rev. *C Page 17 of 26 PRELIMINARY CYW20732Y 6.4 Recommended Reflow Profile Figure 10. Recommended Reflow Profile 0 245 C Temperature 0 217 C 0 200 C 0 150 C Pre- heating Time Document No. 002-14838 Rev. *C 90~120 sec Soldering 60~90 sec Page 18 of 26 PRELIMINARY CYW20732Y 7. Packaging and Storage 7.1 Package Dimensioning Figure 11. Package Dimensioning Document No. 002-14838 Rev. *C Page 19 of 26 PRELIMINARY CYW20732Y 7.2 Laser Mark Figure 12. Laser Mark 7.3 Pin 1 Location in the Tape/Reel Figure 13. Pin 1 Location in the Tape/Reel Document No. 002-14838 Rev. *C Page 20 of 26 PRELIMINARY CYW20732Y 7.4 Moisture Sensitive Level (MSL) Figure 14. Moisture Sensitive Level (MSL) Level 3 䫱䳂3 260ɗ!㓅㮷!371⹎ 168 hours 168⮷㗪 MMMDDYYYY 㚰+㖍+大⃫⸜ Document No. 002-14838 Rev. *C Page 21 of 26 PRELIMINARY CYW20732Y 7.5 SiP Module Tray The CYW20732Y SiP module tray is shown in Figure 15. The tray dimensions are 3.2 mm x 3.5 mm. Figure 15. SiP Module Tray Document No. 002-14838 Rev. *C Page 22 of 26 PRELIMINARY CYW20732Y 7.6 Product Qualification Report Table 12 shows the official results for CYW20732Y Bluetooth Connectivity product qualification. The package type is a 3.2 mm x 3.5 mm 27-pin SLG. Table 12. Product Qualification Report Test Specification Conditions Sample Size Read Point in hours/cycles Results Biased Highly Accelerated Stress Test (BHAST) JESD22-A110 130°C, 85% RH 77 96 hours Pass Unbiased Highly Accelerated Stress Test (UHAST) JESD22-A118 130°C, 85% RH, No bias 77 96 hours Pass Temperature Cycle (TC) JESD22-A104 –55°C to 125°C air-to-air 77 300 cycles Pass 500 cycles Pass 1000 cycles Pass 1500 cycles Pass 2000 cycles Pass 500 hours Pass 1000 hours Pass 1500 cycles Pass High Temperature Storage Life (HTSL) Thermal Shock (TS) Moisture Sensitivity Level (MSL) JESD22-A103 JESD22-A106 JESD22-A113 TA=+150°C 77 –55°C to 125°C liquid-to-liquid 77 Level 3 (30°C, 85% RH) 308 2000 cycles Pass 300 cycles Pass 500 cycles Pass 192 hours Pass Note: This is a turn-key module and qualification for this device was completed by the module partner. Document No. 002-14838 Rev. *C Page 23 of 26 PRELIMINARY CYW20732Y 8. Ordering Information Table 13. Ordering Information Part Number CYW20732YB3ISLGH (T) Note: T represents Tape and Reel. Document No. 002-14838 Rev. *C Package 27-pin 27-LGA (3.5 mm × 3.2 mm x 1.0 mm) package Description Bluetooth Low Energy SiP Module Ambient Operating Temperature –55°C to +125°C° Page 24 of 26 PRELIMINARY CYW20732Y Document History Page Document Title: CYW20732Y Bluetooth Low Energy SiP Module Document Number: 002-14838 Revision ** ECN Orig. of Change - - Submission Date 06/10/2015 Description of Change 20732Y-DS100-R Initial release *A - - 03/07/2016 20732Y-DS101-R Updated: • “Features” on cover page. • Table5. “Current Consumption" Added: • “Features” on cover page. • “SiP Module Tray”. • “Product Qualification Report”. • Section 8. “Ordering Information” *B 5484081 UTSAV 10/20/2016 *C 5962423 AESATMP9 11/09/2017 Document No. 002-14838 Rev. *C Added Cypress Part Numbering Scheme and Mapping Table on Page 1. Updated to Cypress template. Updated logo and copyright. Page 25 of 26 PRELIMINARY CYW20732Y Sales, Solutions, and Legal Information Worldwide Sales and Design Support Cypress maintains a worldwide network of offices, solution centers, manufacturer’s representatives, and distributors. To find the office closest to you, visit us at Cypress Locations. PSoC® Solutions Products ® ® ARM Cortex Microcontrollers Automotive Clocks & Buffers Interface Internet of Things Memory cypress.com/arm cypress.com/automotive cypress.com/clocks cypress.com/interface cypress.com/iot cypress.com/memory Microcontrollers cypress.com/mcu PSoC cypress.com/psoc Power Management ICs cypress.com/pmic Touch Sensing USB Controllers Wireless Connectivity PSoC 1 | PSoC 3 | PSoC 4 | PSoC 5LP | PSoC 6 Cypress Developer Community Forums | WICED IoT Forums | Projects | Video | Blogs | Training | Components Technical Support cypress.com/support cypress.com/touch cypress.com/usb cypress.com/wireless © Cypress Semiconductor Corporation, 2015-2017. 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You shall indemnify and hold Cypress harmless from and against all claims, costs, damages, and other liabilities, including claims for personal injury or death, arising from or related to any Unintended Uses of Cypress products. Cypress, the Cypress logo, Spansion, the Spansion logo, and combinations thereof, WICED, PSoC, CapSense, EZ-USB, F-RAM, and Traveo are trademarks or registered trademarks of Cypress in the United States and other countries. For a more complete list of Cypress trademarks, visit cypress.com. Other names and brands may be claimed as property of their respective owners. Document No. 002-14838 Rev. *C Revised November 9, 2017 Page 26 of 26