CY25901SC-1T

CY25901 Spread Spectrum Clock Generator Features • • • • • • • Supports clock requirements for Spread Spectrum 40-MHz Spread Spectrum clock output Reference clock output Two spread bandwidths: 1%, 3% External clock or Cera-Lock input 3.3V operation 8-pin SOIC package Description The CY25901 clock generator provides a low-electromagnetic interference (EMI) clock output. It features Spread Spectrum technology, a modulation technique designed specifically for reducing EMI at the fundamental frequency and its harmonics. Table 1. Function Table CLKOUT (Spread Spectrum) SSSEL 0 1 X (don’t care) SSON 0 0 1 REFOUT XIN XIN XIN CY25901SC = XIN ± 0.35% (0.7% center) = XIN ± 1.20% (2.4% center) = XIN (No Spread) CY25901SC-1 = XIN ± 0.5% (1.0% center) = XIN ± 1.5% (3.0% center) = XIN (No Spread) Block Diagram Pin Configuration XIN Oscillator XOUT REFOUT CLKOUT VDD VSS XIN 1 2 3 4 8 7 6 5 SSON# REFOUT SSSEL XOUT SSON SSSEL PLL CLKOUT SSCG Cypress Semiconductor Corporation Document #: 38-07521 Rev. ** • 3901 North First Street • San Jose, CA 95134 • 408-943-2600 Revised February 18, 2003 CY25901 Pin Description Pin No. 1 2 3 4 5 6 7 8 Name CLKOUT VDD VSS XIN XOUT SSSEL REFOUT SSON# I/O O PWR PWR I O I O I Power Supply. Common Ground. Oscillator Buffer Input. Connect to an external parallel resonant crystal or externally generated reference clock. Oscillator Buffer Output. Connect to an external parallel resonant crystal. Do not connect when an externally generated reference clock is applied at XIN. Spread Spectrum Select Input. See Table 1. internally pulled up. Buffered Output of XIN. Spread Spectrum Enable Input. When asserted low, Spread Spectrum is enabled. Internally pulled down. radiated energy over the spectrum. This technique is achieved by modulating the clock around or below the center of its reference frequency by a certain percentage (which also determines the energy distribution bandwidth). The SSCG function is enabled when SSON pin is set to low. Resulting in a spread bandwidth that is center spread, amount as selected by SSSEL (see Table 1). Description Spread Spectrum Clock Output. See Table 1 for frequency selections. Spread Spectrum Clock Generator Spread Spectrum Clock Generator (SSCG) is a frequency modulation technique used to reduce EMI radiation generated by repetitive digital signals, mainly clocks. A clock radiates EM energy at its fundamental frequency as well as its harmonics. Spread Spectrum distributes this energy over a small frequency bandwidth, and decreasing the peak value of Figure 1. Modulation Frequency Profile Spread Spectrum 0 -10 -20 -30 dBm SS-ON SS-OFF -50 -40 -60 -70 -80 38 38 39 39 40 Frequency(MHz) 41 41 42 43 Figure 2. Spread Spectrum Document #: 38-07521 Rev. ** Page 2 of 5 CY25901 Absolute Maximum Ratings Parameter VDD VIN TS TA TJ ESDHBM UL–94 MSL Input Voltage Temperature, Storage Temperature, Operating Ambient Temperature, Junction ESD Protection (Human Body Model) Flammability Rating Moisture Sensitivity Level Description Core Supply Voltage Relative to VSS Non Functional Functional Functional MIL-STD-883, Method 3015 @1/8 in. Condition Min. –0.5 –0.5 –65 –10 – 2000 V– 0 1 Max. 4.6 VDD+0.5 150 85 150 – Unit V VDC °C °C °C V DC Specifications Parameter VDD VIL VIH VthXIN IDD IIL IIH VOL VOH CIN CX PU/PD Input Low Description Operating Voltage Voltage[1] Input High Voltage[1] XIN Threshold Voltage Dynamic Supply Current Input Low Current Input High Current Output Low Voltage Output High Voltage Input Capacitance XIN, XOUT Capacitance[2] Pull-up/Pull-down Resistance [1] Condition 3.3V @ ±10% SSON# and SSSEL Inputs XIN VDD = 3.3V and CL = 0 SSSEL = VSS SSON = VDD IOL = 4.0 mA IOH = –4.0 mA SSON# and SSSEL Inputs XIN and XOUT SSON# and SSSEL Inputs Min. 2.97 – 2.2 – –55 – – 2.4 – – 50 Typ. 3.3 – – 20 –30 30 – – 5 5 100 Max. 3.63 0.8 – 25 – 55 0.4 – 10 – 200 Unit V V V V mA µA µA V V pF pF kΩ 0.3*VDDC 0.5*VDDC 0.7*VDDC AC Specifications[3] Parameter FIR ERXIN TDCXIN TR TF BW%1 BW%2 BW%3 BW%4 TPU TDC TCCJ TCCJ Fmod Description Input Frequency Range XIN Edge Rate XIN Duty Cycle Outputs Rise Time[4] Outputs Fall Time[4] CY25901SC, Spread % CY25901SC, Spread % CY25901SC–1, Spread % CY25901SC–1, Spread % Power up to Stable Output[5] CLKOUT Duty Cycle[5] XIN driven by external clock XIN driven by external clock REFOUT, CLKOUT REFOUT, CLKOUT SSON=0,SSSEL = 0 SSON=0,SSSEL = 1 SSON=0,SSSEL = 0 SSON=0,SSSEL = 1 All output clocks CL = 15pF Condition Min. 36 – 40 – – 0.5 1.7 0.7 2.1 – 45 – – – Typ. 40 1 50 – – 0.7 2.4 1 3 – 50 110 110 31 Max. 44 – 60 3 3 0.9 3.1 1.3 3.9 3 55 200 200 – Unit MHz V/nS % ns ns % % % % ms % ps ps kHz REFOUT Cycle to Cycle jitter[5] CL = 15pF CLKOUT Cycle to Cycle jitter[5] CL = 15pF Frequency Modulation Rate SSON# = GND Internally pulled down Notes: 1. SSSEL has internal pull-up and SSON has pull-down resistors. 2. In applications if a crystal is used for the input reference clock, refer to crystal manufacturer’s specifications for the required crystal load capacitor value. 3. Parameters are guaranteed by design and characterization. Not 100% tested in production. All parameters specified with fully loaded outputs. All outputs loaded with 15 pF. 4. Measured between 0.2*VDD and 0.8*VDD Volts. 5. Triggering is done at 1.5V VDDC. Document #: 38-07521 Rev. ** Page 3 of 5 CY25901 Application Schematic R1 CLKOUT 1 2 3 4 CLKOUT SSON# 8 R2 VDD(3.3V) 0.1µF VDD REFOUT 7 6 5 REFOUT VSS SSSEL XIN XOUT CL1 XTAL CL2 Figure 3. Application Schematic Use crystal or cera-lock filter manufacturer ’s recommended values for CL1 and CL2 load capacitors. 0.1-µF bypass capacitor for power pins should always be used and placed close to their VDD pin. R1 and R2 are series termination resistors for impedance matching. Ordering Information Part Number CY25901SC–1 CY25901SC–1T CY25901SC CY25901SCT 8-pin SOIC 8-pin SOIC – Tape and Reel 8-pin SOIC 8-pin SOIC –Tape and Reel Package Type Production Flow Commercial, –10°C to +85°C Commercial, –10°C to +85°C Commercial, –10°C to +85°C Commercial, –10°C to +85°C Package Drawing and Dimensions 8-lead (150-Mil) SOIC S8 51-85066-A All product and company names mentioned in this document are the trademarks of their respective holders. Document #: 38-07521 Rev. ** Page 4 of 5 © Cypress Semiconductor Corporation, 2003. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress Semiconductor product. Nor does it convey or imply any license under patent or other rights. Cypress Semiconductor does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges. CY25901 Document History Page Document Title: CY25901 Spread Spectrum Clock Generator Document Number: 38-07521 REV. ** ECN NO. 124075 Issue Date 02/19/03 Orig. of Change RGL New Data Sheet Description of Change Document #: 38-07521 Rev. ** Page 5 of 5