CY2V014FLXIT

CY2V014 LVPECL Voltage Controlled Crystal Oscillator (VCXO) Features Benefits ■ High-frequency VCXO with LVPECL output ■ Eliminates the need for external crystal ■ Any output frequency from 50 MHz to 690 MHz ■ Low-noise internal PLL ■ Available either factory configured or field programmable ■ Fast time to market ■ Integrated phase-locked loop (PLL) ■ Suitable for HDDs, consumer and networking applications ■ 1 ps typical RMS Phase Jitter ■ Small footprint ■ Output Enable or Power-down function ■ Application compatibility in standard and low-power systems ■ Supply voltage: 3.3 V or 2.5 V ■ Field-programmable for reduced inventory ■ Pb-free package: 5.0 × 3.2 mm LCC ■ Commercial and industrial temperature ranges Logic Block Diagram Low Noise PLL Crystal Oscillator 4 PROGRAMMABLE CONFIGURATION OUTPUT DIVIDER 1 CLK 5 CLK# VIN 2 Pull-up OE/PD# Cypress Semiconductor Corporation Document #: 001-06458 Rev. *B • 6 3 VDD VSS 198 Champion Court • San Jose, CA 95134-1709 • 408-943-2600 Revised December 2, 2010 [+] Feedback CY2V014 Pinouts Figure 1. 6-Pin Ceramic LCC VIN 1 OE/PD# 2 VSS 3 6 VDD 5 CLK# 4 CLK Pin Definitions Pin Name I/O Type Description 1 VIN Analog Input VCXO control voltage. Positive slope. 2 OE/PD# CMOS Input, internal pull-up Output Enable pin: Active HIGH. If OE = 1, CLK is enabled. Power-down pin: Active LOW. If PD# = 0, Power-down is enabled. The functionality of this pin is programmable. 3 VSS Power Power supply ground 4, 5 CLK, CLK# Output Clock output. LVPECL outputs. CLK# is the complement of CLK. 6 VDD Power Positive power supply: 2.5 V or 3.3 V Functional Description The CY2V014 is a high-performance high-frequency voltage-controlled crystal oscillator (VCXO). The device uses a Cypress proprietary low-noise PLL to synthesize the frequency from an embedded crystal. The output frequency is user adjustable by means of an analog control voltage applied to the VIN pin. VCXO Control Voltage (VIN, pin 1) VIN is an analog input that is used to adjust the output frequency. The nominal output frequency is defined when VIN = VDD/2. Increasing the voltage on VIN increases the output frequency, while decreasing the voltage on VIN decreases the output frequency. Any voltage between VSS and VDD is allowed on VIN. The voltage/frequency slope is very linear over most of the control voltage range. Programming Description Field-Programmable CY2V014 Field-programmable devices are shipped unprogrammed, and must be programmed before use. Customers can use CyberClocks™ Online Software to specify the device configuration and generate a .JED programming file. Programming of samples and prototype quantities is available using the CY3672 programmer. Third-party vendors manufacture programmers for small to large volume applications. Cypress’s value-added distribution partners also provide programming services. Field-programmable devices are designated with an “F” in the part number, and are intended for quick prototyping and inventory reduction. Document #: 001-06458 Rev. *B Factory-Configured CY2V014 For customers wanting ready-to-use devices, the CY2V014 is available factory-configured, with no programming required. All requests must be submitted to the local Cypress Field Application Engineer (FAE) or sales representative. Once the request has been processed, you will receive a new part number, samples, and data sheet with the programmed values. This part number will be used for additional sample requests and production orders. Programming Variables Output Frequency Any frequency between 50 MHz and 690 MHz may be specified. Absolute Pull Range The absolute pull range (APR) may be specified. Pin 2: Output Enable or Power-Down (OE/PD#) Pin 2 can be programmed as either output enable (OE) or Power-down (PD#). The OE function is used to enable or disable the CLK output very quickly, but it does not reduce core power consumption. The PD# function puts the device into a low-power state, but wake-up takes longer because the PLL must reacquire lock. Page 2 of 9 [+] Feedback CY2V014 Absolute Maximum Conditions Parameter Description Min Max Unit –0.5 4.4 V Relative to VSS –0.5 VDD+0.5 VDC Non Functional –55 150 °C Temperature, Junction –40 125 °C ESD Protection (Human Body Model) MIL-STD-883, Method 3015 2000 VCC Supply Voltage VIN Input Voltage TS Temperature, Storage TJ ESDHBM UL–94 Flammability Rating MSL Moisture Sensitivity Level Condition At 1/8 in. V V–0 1 Note: The voltage on any input or I/O pin cannot exceed the power pin during power-up. Operating Conditions Parameter Description Min Typ Max Unit VDD Supply Voltage Range 3.0 2.25 3.3 2.5 3.6 2.75 V TPU Power-up Time for VDD to Reach Minimum Specified Voltage (power ramp must be monotonic) 0.05 – 500 ms TA Ambient Temperature (Commercial) TA Ambient Temperature (Industrial) 0 – 70 °C –40 – 85 °C Min Typ Max Unit DC Electrical Characteristics Parameter Description Condition VOH LVPECL High Output Voltage VDD = 3.3 V or 2.5 V, RTERM = 50 Ω to VDD – 1.15 VDD – 2.0 V – VDD – 0.75 V VOL LVPECL Low Output Voltage VDD = 3.3 V or 2.5 V, RTERM = 50 Ω to VDD – 2.0 VDD – 2.0 V – VDD – 1.625 V VOD1 LVPECL Output Voltage Swing (VOH – VOL) VDD = 3.3 V or 2.5 V, RTERM = 50 Ω to VDD – 2.0 V 600 – 1000 mV VOD2 LVPECL Output Voltage Swing (VOH – VOL) VDD = 2.5 V, RTERM = 50 Ω to VDD – 1.4 V 500 – 1000 mV VOCM LVPECL Output Common Mode Voltage (VOH + VOL)/2 VDD = 2.5 V, RTERM = 50 Ω to VDD – 1.4 V 1.2 – – V VIH CMOS Input High Voltage 0.7 × VDD – – V VIL CMOS Input Low Voltage – – 0.3 × VDD V RUP Internal Pull-up Resistor – 100 – kΩ IIH CMOS Input High Current VIN = VDD – – 10 μA IIL CMOS Input Low Current VIN = VSS VVIN VIN Input Voltage IIVIN VIN Input Current LIN VIN to fOUT Linearity IOZ Output Leakage Current Three-state output, PD#/OE = VSS IDD Operating Supply Current VDD = 3.3 V or 2.5 V, CLK = 150 MHz, CLOAD = 0, PD#/OE = VDD ISB Standby Supply Current PD# = VSS Document #: 001-06458 Rev. *B – – 120 μA 0 – VDD V VSS ≤ VIN ≤ VDD – – 10 μA 0.2 × VDD ≤ VIN ≤ 0.8 × VDD – 1 – % –35 – 35 μA – – 100 mA – – 1 mA Page 3 of 9 [+] Feedback CY2V014 AC Electrical Characteristics Parameter Description Min Typ Max Unit 50 – 690 MHz VIN = VDD/2 [1] –60 – 60 ppm FSFIELD Frequency Stability – field program- VIN = VDD/2 [1] mable devices –100 – 100 ppm APR Absolute Pull Range VIN = VDD to VSS, relative to nominal fOUT, across operating temperature and voltage range[2] ±100 ±50 – – – – ppm BW Modulation Bandwidth (VIN) –3 dB 10 – – kHz DC Output Duty Cycle Measured at zero crossing 45 50 55 % TR, TF Output Rise and Fall Time 20% and 80% of full output swing – 350 – ps TOE1 Output Disable Time Time from falling edge on OE to stopped outputs (Asynchronous) – _ 100 ns TOE2 Output Enable Time Time from rising edge on OE to outputs at a valid frequency (Asynchronous) – – 100 ns TLOCK Start-up Time Time for CLK to reach valid frequency measured from the time VDD = VDD(Min) or from PD# rising edge. – – 10 ms TJ1 RMS Phase Jitter fOUT = 106.25 MHz (12 kHz–20 MHz) – 1 – ps TJ2 Peak-to-peak Period Jitter fOUT = 106.25 MHz – 30 – ps fOUT Output Frequency FSFACT Frequency Stability – factory programmed devices Condition Notes 1. Frequency stability is the maximum variation in frequency from F0. It includes initial accuracy, plus variation from temperature, supply voltage, shock, vibration and first year aging. 2. APR is the minimum pull range under all conditions over the device lifetime, including aging for 10 years. APR is relative to F0. Document #: 001-06458 Rev. *B Page 4 of 9 [+] Feedback CY2V014 Switching Waveforms Figure 2. Duty Cycle Timing (DC = t1A/t1B) t1A CLK t1B Figure 3. Output Differential Voltage VA CLK V OD V OCM = (V A + V B )/2 CLK# VB Figure 4. Output Rise/Fall Time steady state high CLK, CLK# steady state low Tr Tf Output Rise time (Tr) =20 to 80% of full output swing Output Fall time (Tf) = 80 to 20% of full output swing Figure 5. Output Enable/Disable Timing VIH OE / PD# VIL TOE2 High Impedance CLK TOE1 Termination Circuits Figure 6. LVPECL Termination VDD - 2V (VDD = 3.3V) 50Ω 50Ω CLK# Document #: 001-06458 Rev. *B 50Ω 50Ω 50Ω CLK BUF BUF CLK VDD - 2V or 1.4V (VDD = 2.5V) 50Ω 50Ω 50Ω CLK# Page 5 of 9 [+] Feedback CY2V014 Ordering Information Table 1 lists the CY2V014 key package features and ordering codes. The table contains only the parts that are currently available. If you do not see what you are looking for, contact your local sales representative. For more information, visit the Cypress website at www.cypress.com and refer to the product summary page at http://www.cypress.com/products. Table 1. Key Features and Ordering Information Part Number Configuration Package description Product Flow Pb-free CY2V014FLXCT Field programmable 6-Pin Ceramic LCC SMD – Tape and Reel Commercial, 0 °C to 70 °C CY2V014FLXIT Field programmable 6-Pin Ceramic LCC SMD – Tape and Reel Industrial, –40 °C to 85 °C Possible Configurations Some product offerings are factory programmed customer specific devices with customized part numbers. The Possible Configurations table shows the available device types, but not complete part numbers. Contact your local Cypress FAE of Sales Representative for more information. Part Number[3] Configuration Package description Product Flow Pb-free CY2V014LXCxxxT Factory configured 6-Pin Ceramic LCC SMD – Tape and Reel Commercial, 0 °C to 70 °C CY2V014LXIxxxT Factory configured 6-Pin Ceramic LCC SMD – Tape and Reel Industrial, –40 °C to 85 °C Ordering Code Defintions CY 2V014 F LX C xxx T Tape and Reel Custom configuration specific code for factory programmed devices Temperature range: C = Commercial; I = Industrial Pb-free LCC package Field programmable device Base part number Company ID: CY = Cypress Note 3. “xxx” is a factory assigned code that identifies the programming option. Document #: 001-06458 Rev. *B Page 6 of 9 [+] Feedback CY2V014 Package Diagram Figure 7. 6-Pin 3.2 × 5.0 mm Ceramic LCC LZ06A 001-10044 *A Acronyms Document Conventions Table 2. Acronyms Used in this Document Units of Measure Acronym Description Table 3. Units of Measure CMOS complementary metal oxide semiconductor ESD electro-static discharge °C degree celcius FAE field applications engineer KHz kilo hertz HDD hard disk drive KΩ kilo ohm LCC leadless chip carrier MHz mega hertz PLL phase-locked loop µA micro ampere RMS root mean square mA milli ampere SMD surface mount device ms milli second VCXO voltage-controlled crystal oscillator mV milli volt Document #: 001-06458 Rev. *B Symbol Unit of Measure ns nano second Ω ohm ppm parts per million % percent ps pico second V volt Page 7 of 9 [+] Feedback CY2V014 Document History Page Document Title: CY2V014 LVPECL Voltage Controlled Crystal Oscillator (VCXO) Document Number: 001-06458 Revision ECN Orig. of Change Submission Date ** 504458 RGL See ECN New data sheet *A 2899939 CXQ 03/26/10 Updated ordering information table. Updated package diagram. Updated copyright section. *B 3099970 CXQ 12/02/10 Updated template and styles. Changed from Preliminary to Final. Added Acronyms, Units of Measure, and Ordering Code Definitions sections. Changed 700 MHz to 690 MHz in second “Features” bullet. Changed from 700 MHz to 690 MHz in “Programming Variables” section Changed fOUT spec in AC specifications table from 700 max to 690 max. Changed FSfact in AC specifications from +/–60 ppm max to –60ppm min and 60 ppm max. Changed FSfield spec to –100 ppm min and 100 ppm max. Document #: 001-06458 Rev. *B Description of Change Page 8 of 9 [+] Feedback CY2V014 Sales, Solutions, and Legal Information Worldwide Sales and Design Support Cypress maintains a worldwide network of offices, solution centers, manufacturer’s representatives, and distributors. To find the office closest to you, visit us at Cypress Locations. Products Automotive Clocks & Buffers Interface Lighting & Power Control PSoC Solutions cypress.com/go/automotive cypress.com/go/clocks psoc.cypress.com/solutions cypress.com/go/interface PSoC 1 | PSoC 3 | PSoC 5 cypress.com/go/powerpsoc cypress.com/go/plc Memory Optical & Image Sensing PSoC Touch Sensing USB Controllers Wireless/RF cypress.com/go/memory cypress.com/go/image cypress.com/go/psoc cypress.com/go/touch cypress.com/go/USB cypress.com/go/wireless © Cypress Semiconductor Corporation, 2006-2010. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be used for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress. Furthermore, Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges. Any Source Code (software and/or firmware) is owned by Cypress Semiconductor Corporation (Cypress) and is protected by and subject to worldwide patent protection (United States and foreign), United States copyright laws and international treaty provisions. Cypress hereby grants to licensee a personal, non-exclusive, non-transferable license to copy, use, modify, create derivative works of, and compile the Cypress Source Code and derivative works for the sole purpose of creating custom software and or firmware in support of licensee product to be used only in conjunction with a Cypress integrated circuit as specified in the applicable agreement. Any reproduction, modification, translation, compilation, or representation of this Source Code except as specified above is prohibited without the express written permission of Cypress. Disclaimer: CYPRESS MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS MATERIAL, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. Cypress reserves the right to make changes without further notice to the materials described herein. Cypress does not assume any liability arising out of the application or use of any product or circuit described herein. Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress’ product in a life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges. Use may be limited by and subject to the applicable Cypress software license agreement. Document #: 001-06458 Rev. *B Revised December 2, 2010 Page 9 of 9 CyberClocks is a trademark of Cypress Semiconductor Corporation. All other products and company names mentioned in this document may be the trademarks of their respective holders. [+] Feedback