CY39C604
PSR LED Driver IC for LED Lighting
Description
CY39C604 is a Primary Side Regulation (PSR) LED driver IC for LED lighting. Using the information of the primary peak current and
the transformer-energy-zero time, it is able to deliver a well regulated current to the secondary side without using an opto-coupler in
an isolated flyback topology. Operating in critical conduction mode, a smaller transformer is required. In addition, CY39C604 has a
built-in dimmable circuit and can constitute the lighting system for PWM dimming.
It is most suitable for the general lighting applications, for example replacement of commercial and residential incandescent lamps.
Features
PSR topology in an isolated flyback circuit
High power factor (>0.9 : Not dimming) in Single Conversion
High efficiency (>85% : Not dimming) and low EMI by detecting transformer zero energy
PWM Dimmable LED lighting
Highly reliable protection functions
Under
voltage lock out (UVLO)
voltage protection (OVP)
Over current protection (OCP)
Short circuit protection (SCP)
Over temperature protection (OTP)
Over
Switching frequency setting : 30 kHz to 133 kHz
Input voltage range VDD : 9V to 20V
Input voltage for LED lighting applications : AC110VRMS, AC230VRMS
Output power range for LED lighting applications : 5W to 50W
Small Package : SOP-8 (3.9 mm × 5.05 mm × 1.75 mm[Max])
Applications
LED lighting
PWM dimmable LED lighting
Cypress Semiconductor Corporation
Document Number: 002-08441 Rev. *D
•
198 Champion Court
•
San Jose, CA 95134-1709
•
408-943-2600
Revised January 21, 2019
CY39C604
Contents
1. Pin Assignment ............................................................... 3
2. Pin Descriptions .............................................................. 3
3. Block Diagram ................................................................. 4
4. Absolute Maximum Ratings ........................................... 5
5. Recommended Operating Conditions ........................... 6
6. Electrical Characteristics ............................................... 7
7. Standard Characteristics................................................ 9
8. Function Explanations.................................................. 10
8.1
LED Current Control by PSR (Primary Side
Regulation) ................................................................ 10
8.2
PFC (Power Factor Correction) Function .................. 11
8.3
Dimming Function ..................................................... 11
8.4
Power-On Sequence ................................................. 12
8.5
Power-Off Sequence ................................................. 13
Document Number: 002-08441 Rev. *D
8.6
IP_PEAK Detection Function.......................................... 13
8.7
Zero Voltage Switching Function ............................... 13
8.8
Protection Functions .................................................. 14
9. I/O Pin Equivalent Circuit Diagram .............................. 15
10. Application Examples ................................................... 17
10.1 50W Isolated and PWM Dimming Application............ 17
10.2 5W Non-Isolated and Non-Dimming Application ........ 23
11. Usage Precautions ........................................................ 28
12. RoHS Compliance Information..................................... 28
13. Ordering Information .................................................... 28
14. Package Dimensions .................................................... 29
15. Major Changes............................................................... 30
Document History ............................................................... 31
Sales, Solutions, and Legal Information ........................... 32
Page 2 of 32
CY39C604
1. Pin Assignment
Figure 1. Pin Assignment
(TOP VIEW)
VDD 1
8 DRV
TZE 2
7 GND
6 CS
COMP 3
5 ADJ
DIM 4
(SOB008)
2. Pin Descriptions
Table 1. Pin Descriptions
Pin No.
Pin Name
I/O
Description
1
VDD
-
Power supply pin.
2
TZE
I
Transformer Zero Energy detecting pin.
3
COMP
O
External Capacitor connection pin for the compensation.
4
DIM
I
Dimming control pin.
5
ADJ
O
Pin for adjusting the switch-on timing.
6
CS
I
Pin for detecting peak current of transformer primary winding.
7
GND
-
Ground pin.
8
DRV
O
External MOSFET gate connection pin.
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CY39C604
3. Block Diagram
Figure 2. Block Diagram (Isolated Flyback Application)
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Page 4 of 32
CY39C604
4. Absolute Maximum Ratings
Table 2. Absolute Maximum Rating
Parameter
Power Supply Voltage
Symbol
Rating
Condition
Min
Unit
Max
VVDD
VDD pin
-0.3
+25
V
VCS
CS pin
-0.3
+6.0
V
VTZE
TZE pin
-0.3
+6.0
V
VDIM
DIM pin
-0.3
+6.0
V
VDRV
DRV pin
-0.3
+25
V
IADJ
ADJ pin
-1
-
mA
IDRV
DRV pin
-50
+50
mA
Power Dissipation
PD
Ta ≤ +25°C
-
800 (*1)
mW
Storage temperature
TSTG
-
-55
+125
°C
ESD Voltage 1
VESDH
Human Body Model
-2000
+2000
V
ESD Voltage 2
VESDC
Charged Device Model
-1000
+1000
V
Input Voltage
Output Voltage
Output Current
DC level
*1: The value when using two layers PCB.
Reference: θja (wind speed 0m/s): 125°C/W
Figure 3. Power Dissipation
1000
Power Dissipation [mW]
900
800
700
600
500
400
300
200
100
0
-50
-25
0
25
50
75
100
125
150
Ta [°C]
WARNING:
1. Semiconductor devices may be permanently damaged by application of stress (including, without limitation, voltage, current or
temperature) in excess of absolute maximum ratings. Do not exceed any of these ratings.
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CY39C604
5. Recommended Operating Conditions
Table 3. Recommended Operating Conditions
Parameter
Symbol
Value
Condition
VDD pin Input Voltage
VDD
VDD pin
DIM pin Input Voltage
VDIM
DIM pin
DIM pin Input Current
IDIM
DIM pin
TZE pin Resistance
RTZE
ADJ pin Resistance
Min
Typ
Max
Unit
9
-
20
V
After UVLO release
0
-
5
V
Before UVLO release
0
-
2.5
µA
TZE pin
50
-
200
kΩ
RADJ
ADJ pin
9.3
-
185.5
kΩ
COMP pin Capacitance
CCOMP
COMP pin
-
4.7
-
µF
VDD pin Capacitance
CBP
Set between VDD pin and GND pin
-
100
-
µF
Operating Junction Temperature
Tj
-
-40
-
+125
°C
WARNING:
1. The recommended operating conditions are required in order to ensure the normal operation of the semiconductor device. All of
the device's electrical characteristics are warranted when the device is operated under these conditions.
2. Any use of semiconductor devices will be under their recommended operating condition.
3. Operation under any conditions other than these conditions may adversely affect reliability of device and could result in device
failure.
4. No warranty is made with respect to any use, operating conditions or combinations not represented on this data sheet. If you
are considering application under any conditions other than listed herein, please contact sales representatives beforehand.
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Page 6 of 32
CY39C604
6. Electrical Characteristics
Table 4. Electrical Characteristics
(Ta = +25°C, VVDD = 12V)
Parameter
UVLO
TRANSFORMER
ZERO ENERGY
DETECTION
Symbol
Pin
Condition
Min
Value
Typ
Max
Unit
UVLO Turn-on
threshold voltage
VTH
VDD
-
12.25
13
13.75
V
UVLO Turn-off
threshold voltage
VTL
VDD
-
7.55
7.9
8.5
V
Startup current
ISTART
VDD
VVDD = 7V
-
65
160
µA
Zero energy
threshold voltage
VTZETL
TZE
TZE = "H" to "L"
-
20
-
mV
Zero energy
threshold voltage
VTZETH
TZE
TZE = "L" to "H"
0.6
0.7
0.8
V
TZE clamp voltage
VTZECLAMP
TZE
ITZE = -10 µA
-200
-160
-100
mV
OVP threshold voltage
VTZEOVP
TZE
-
4.15
4.3
4.45
V
OVP blanking time
tOVPBLANK
TZE
-
0.6
1
1.7
µs
TZE input current
ITZE
TZE
VTZE = 5V
-1
-
+1
µA
Source current
ISO
COMP
VCOMP = 2V, VCS = 0V
VDIM = 1.85V
-
-27
-
µA
Trans conductance
gm
COMP
VCOMP = 2.5V, VCS = 1V
-
96
-
µA/V
ADJ voltage
VADJ
ADJ
-
1.81
1.85
1.89
V
ADJ source current
IADJ
ADJ
VADJ = 0V
-650
-450
-250
µA
ADJ time
TADJ
TZE
DRV
TADJ (RADJ = 51 kΩ)
- TADJ (RADJ = 9.1 kΩ)
490
550
610
ns
Minimum switching
period
TSW
TZE
DRV
-
6.75
7.5
8.25
µs
OCP threshold voltage
VOCPTH
CS
-
1.9
2
2.1
V
OCP delay time
tOCPDLY
CS
-
-
400
500
ns
CS input current
ICS
CS
VCS = 5V
-1
-
+1
µA
COMPENSATION
ADJUSTMENT
CURRENT
SENSE
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Page 7 of 32
CY39C604
(Ta = +25°C, VVDD = 12V)
Parameter
Symbol
Pin
Condition
Min
Value
Typ
Max
Unit
DRV high voltage
VDRVH
DRV
VDD = 18V, IDRV = -30 mA
7.6
9.4
-
V
DRV low voltage
VDRVL
DRV
VDD = 18V, IDRV = 30 mA
-
130
260
mV
Rise time
tRISE
DRV
VDD = 18V,
CLOAD = 1 nF
-
94
-
ns
Fall time
tFALL
DRV
VDD = 18V,
CLOAD = 1 nF
-
16
-
ns
Minimum on time
tONMIN
DRV
TZE trigger
300
500
700
ns
Maximum on time
tONMAX
DRV
-
27
44
60
µs
Minimum off time
tOFFMIN
DRV
-
1
1.5
1.93
µs
Maximum off time
tOFFMAX
DRV
TZE = GND
270
320
370
µs
OTP threshold
TOTP
-
Tj, temperature rising
-
150
-
°C
OTP hysteresis
TOTPHYS
-
Tj, temperature falling,
degrees below TOTP
-
25
-
°C
DIM input current
IDIM
DIM
VDIM = 5V
-0.1
-
+0.1
µA
DIMCMP
threshold voltage
VDIMCMPVTH
DIM
-
135
150
165
mV
DIMCMP hysteresis
VDIMCMPHYS
DIM
-
-
70
-
mV
IVDD(STATIC)
VDD
VVDD = 20V, VTZE = 1V
-
3
3.6
mA
IVDD(OPERATING)
VDD
VVDD = 20V, Qg = 20 nC,
fSW = 133 kHz
-
5.6
-
mA
DRV
OTP
DIMMING
POWER SUPPLY
CURRENT
Power supply current
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CY39C604
7. Standard Characteristics
Figure 4. Standard Characteristics
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CY39C604
8. Function Explanations
8.1
LED Current Control by PSR (Primary Side Regulation)
CY39C604 regulates the average LED current (ILED) by feeding back the information based on Primary Winding peak current
(IP_PEAK) and Secondary Winding energy discharge time (TDIS) and switching period (TSW). Figure 5 shows the operating waveform in
steady state. IP is Primary Winding current and IS is Secondary Winding current. ILED as an average current of the Secondary
Winding is described by the following equation.
ILED =
TDIS
1
× IS_PEAK ×
2
TSW
Using IP_PEAK and the transformer Secondary to Primary turns ratio (NP/NS), Secondary Winding peak current (IS_PEAK) is described
by the following equation.
IS_PEAK =
NP
× IP_PEAK
NS
Therefore,
ILED=
TDIS
1 NP
×
×IP_PEAK×
2 NS
TSW
CY39C604 detects TDIS by monitoring the TZE pin and IP_PEAK by monitoring the CS pin and then controls ILED. An internal Err Amp
sinks gm current proportional to IP_PEAK from the COMP pin during TDIS period. In steady state, since the average of the gm current is
equal to internal reference current (ISO), the voltage on the COMP pin (VCOMP) is nearly constant.
IP_PEAK × RCS × gm × TDIS = ISO × TSW
In above equation, gm is transconductance of the Err Amp and RCS is a sense resistance.
Eventually, ILED can be calculated by the following equation.
ILED=
1 NP ISO
1
× ×
×
2 NS gm RCS
Figure 5. LED Current Control Waveform
IP_PEAK
System Power supply
through Diode Bridge
(VBULK)
IP
IP
LP
VAUX
CY39C604
ADJ
IS_PEAK
ILED
TON
CS
CD
GND
TDIS
TSW
DRV
RCS
ILED
IS
VD
VTZE
TZE
IS
TZE threshold
VD
(VAUX)
1/4 x TRING
VTZE
1/4 x TRING
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CY39C604
8.2
PFC (Power Factor Correction) Function
Switching on time (TON) is generated by comparing VCOMP with an internal sawtooth waveform (refer to Figure 2). Since VCOMP is
slow varying with connecting an external capacitor (CCOMP) from the COMP pin to the GND pin, TON is nearly constant within an AC
line cycle. In this state, IP_PEAK is nearly proportional to the AC Line voltage (VBULK). It can bring the phase differences between the
input voltage and the input current close to zero, so that high Power Factor can be achieved.
8.3
Dimming Function
CY39C604 has the built-in dimmable circuit to control ILED by changing a reference of Err Amp based on the input voltage level on
the DIM pin (VDIM), and realizes dimming. Figure 6 shows ILED dimming ratio based on VDIM.
Figure 7 shows the input circuit to the DIM pin for PWM dimming. PWM signal is divided and filtered into an analog voltage with RC
network. It is possible to configurate PWM dimmable system by inputting the voltage to the DIM pin.
Figure 6. Dimming Curve
Figure 7. DIM Pin Input Circuit
110%
100%
90%
80%
ILED ratio
70%
60%
50%
40%
30%
20%
10%
0%
0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0
VDIM [V]
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CY39C604
8.4
Power-On Sequence
When the AC line voltage is supplied, VBULK is powered from the AC line through a diode bridge, and the VDD pin is charged from
VBULK through an external source-follower BiasMOS.(Figure 8 red path)
When the VDD pin is charged up and the voltage on the VDD pin (VVDD) rises above the UVLO threshold voltage, an internal Bias
circuit starts operating, and CY39C604 starts the dimming control. After the UVLO is released, this device enables switching and is
operating in a forced switching mode (TON = 1.5 µs, TOFF = 78 µs to 320 µs). When the voltage on the TZE pin reaches the Zero
energy threshold voltage (VTZETH = 0.7V), CY39C604 enters normal operation mode. After the switching begins, the VDD pin is also
charged from Auxiliary Winding through an external diode (DBIAS).(Figure 8 blue path)
Around zero cross points of the AC line voltage VVDD is not supplied from VBULK or Auxiliary Winding. It is necessary to set an
appropriate capacitor of the VDD pin in order to keep VVDD above the UVLO threshold voltage in this period. An external diode (D1)
between BiasMOS and the VDD pin is used to prevent discharge from the VDD pin to VBULK at the zero cross points.
Figure 8. VDD Supply Path at Power-On
Figure 9. Power-On Waveform
VBULK
UVLO Vth = 13V
VDD
Force switching (TON=1.5us/TOFF=78us~320us)
Normal switching
Switching start
DRV
VLED
VTZETH = 0.7V
TZE
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CY39C604
8.5
Power-Off Sequence
After the AC line voltage is removed, VBULK is discharged by switching operation. Since any Secondary Winding current does not
flow, ILED is supplied only from output capacitors and decreases gradually. VVDD also decreases because there is no current supply
from both Auxiliary Winding and VBULK. When VVDD falls below the UVLO threshold voltage, CY39C604 shuts down.
Figure 10. Power-Off Waveform
AC line removed
VBULK
UVLO Vth = 7.9V
VDD
Shutdown
DRV
VLED
8.6
IP_PEAK Detection Function
CY39C604 detects Primary Winding peak current (IP_PEAK) of Transformer. ILED is set by connecting a sense resistance (Rcs)
between the CS pin and the GND pin. Maximum IP_PEAK (IP_PEAKMAX) limited by Over Current Protection (OCP) can also be set with
the resistance.
Using the Secondary to Primary turns ratio (NP/NS) and ILED, RCS is set as the following equation (refer to 8.1)
RCS=
NP 0.14
×
NS ILED
In addition, using the OCP threshold voltage (VOCPTH) and RCS, IP_PEAKMAX is calculated with the following equation.
IP_PEAKMAX =
8.7
VOCPTH
RCS
Zero Voltage Switching Function
CY39C604 has built-in zero voltage switching function to minimize switching loss of the external switching MOSFET. This device
detects a zero crossing point through a resistor divider connected from the TZE pin to Auxiliary Winding. A zero energy detection
circuit detects a negative crossing point of the voltage on the TZE pin to Zero energy threshold voltage (VTZETL). On-timing of
switching MOSFET is decided with waiting an adjustment time (tADJ) after the negative crossing occurs.
tADJ is set by connecting an external resistance (RADJ) between the ADJ pin and the GND pin. Using Primary Winding inductance
(LP) and the parasitic drain capacitor of switching MOSFET (CD), tADJ is calculated with the following equation.
tADJ =
π LP × CD
2
Using tADJ, RADJ is set as the following equation.
RADJ [kΩ] = 0.0927 × tADJ [ns]
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CY39C604
8.8
Protection Functions
Under Voltage Lockout Protection (UVLO)
The under voltage lockout protection (UVLO) prevents IC from a malfunction in the transient state during VVDD startup and a
malfunction caused by a momentary drop of VVDD, and protects the system from destruction/deterioration. An UVLO comparator
detects the voltage decrease below the UVLO threshold voltage on the VDD pin, and then the DRV pin is turned to “L” and the
switching stops. CY39C604 automatically returns to normal operation mode when VVDD increases above the UVLO threshold
voltage.
Over Voltage Protection (OVP)
The over voltage protection (OVP) protects Secondary side components from an excessive voltage stress. If the LED is
disconnected, the output voltage of Secondary Winding rises up. The output overvoltage can be detected by monitoring the TZE pin.
During Secondary Winding energy discharge time, VTZE is proportional to VAUX and the voltage of Secondary Winding (refer to 8.1).
When VTZE rises higher than the OVP threshold voltage for 3 continues switching cycles, the DRV pin is turned to “L”, and the
switching stops (latch off). When VVDD drops below the UVLO threshold voltage, the latch is removed.
Over Current Protection (OCP)
The over current protection (OCP) prevents inductor or transformer from saturation. The drain current of the external switching
MOSFET is limited by OCP. When the voltage on the CS pin reaches the OCP threshold voltage, the DRV pin is turned to “L” and
the switching cycle ends. After zero crossing is detected on the TZE pin again, the DRV pin is turned to “H” and the next switching
cycle begins.
Short Circuit Protection (SCP)
The short circuit protection (SCP) protects the transformer and the Secondary side diode from an excessive current stress. When
the short circuit between LED terminals occurs, the output voltage decreases. If the voltage on the TZE pin falls below SCP
threshold voltage, VCOMP is discharged and fixed at 1.5V and then the switching enters a low frequency mode.(TON = 1.5 µs /TOFF =
78 µs to 320 µs)
Over Temperature Protection (OTP)
The over temperature protection (OTP) protects IC from thermal destruction. When the junction temperature reaches +150°C, the
DRV pin is turned to “L”, and the switching stops. It automatically returns to normal operation mode if the junction temperature falls
back below +125°C.
Table 5. Protection Functions Table
Function
DRV
PIN Operation
COMP
ADJ
Return
Condition
Detection Condition
Remarks
Normal Operation
Active
Active
Active
-
-
-
Under Voltage Lockout
Protection (UVLO)
L
L
L
VDD < 7.9V
VDD > 13V
Auto Restart
Over Voltage Protection (OVP)
L
1.5V
fixed
Active
TZE > 4.3V
VDD < 7.9V
→ VDD > 13V
Latch off
Over Current Protection (OCP)
L
Active
Active
CS > 2V
Cycle by cycle
Auto Restart
Short Circuit Protection (SCP)
Active
1.5V
fixed
Active
TZE (peak) < 0.7V
TZE (peak) > 0.7V
Auto Restart
Over Temperature Protection
(OTP)
L
1.5V
fixed
Active
Tj > +150°C
Tj < +125°C
Auto Restart
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CY39C604
9. I/O Pin Equivalent Circuit Diagram
Figure 11. I/O Pin Equivalent Circuit Diagram
Pin No.
Pin
Name
2
TZE
3
COMP
4
DIM
Document Number: 002-08441 Rev. *D
Equivalent Circuit Diagram
Page 15 of 32
CY39C604
Pin No.
5
Pin
Name
Equivalent Circuit Diagram
ADJ
6
CS
8
DRV
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Page 16 of 32
CY39C604
10. Application Examples
10.1 50W Isolated and PWM Dimming Application
Input: AC85VRMS to 265VRMS, Output: 1.5A/27V to 36V
Figure 12. 50W EVB Schematic
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Page 17 of 32
CY39C604
Table 6. 50W BOM List
No.
Component
1
M1
Driver IC for LED Lighting, SO-8
CY39C604
Cypress
2
Q1
MOSFET, N-channel, 800V, 5.5A, TO-220F
FQPF8N80C
Fairchild
3
Q2
MOSFET, N-channel, 600V, 2.8A, TO-251
FQU5N60C
Fairchild
4
BR1
Bridge rectifier, 3A, 600V, GBU-4L
GBU4J
Fairchild
5
D2
Diode, ultra fast rectifier, 10A, 200V, TO-220F
FFPF10UP20S
Fairchild
6
D3
Diode, fast rectifier, 1A, 800V, DO-41
UF4006
Fairchild
7
D5
Diode, 200 mA, 200V, SOT-23
MMBD1404
Fairchild
8
ZD1
Diode, Zener, 20V, 500 mW, SOD-123
MMSZ20T1G
ON Semiconductor
9
ZD2
Diode, Zener, 18V, 500 mW, SOD-123
MMSZ18T1G
ON Semiconductor
10
T1
Transformer, 200 μH, Np/Ns = 3.5/1 Np/Na = 7/1
PQ-2625
-
11
L1
Common mode choke, 47.0 mH
LF2429NP-T473
Sumida
12
L3
Inductor, 1.0 mH, 0.65A, 0.9Ω, ϕ12.5 × 16.0
RCH1216BNP-102K
Sumida
13
C1
Capacitor, X2, 305VAC, 0.1 μF
B32921C3104M
EPCOS
14
C2
Capacitor, polyester film, 220 nF, 400V, 18.5 × 5.9
ECQ-E4224KF
Panasonic
15
C3,C4
Capacitor, ceramic, 10 μF, 50V, X7S, 1210
C3225X7S1H106K250AB
TDK
16
C5,C6,C7
Capacitor, aluminum electrolytic, 470 μF 50V, ϕ10.0 × 20
EKMG500ELL471MJ20S
NIPPON-CHEMI-CON
17
C8
Capacitor, ceramic, 33 nF, 250V, 1206
C3216X7R2E333K160AA
TDK
18
C9
Capacitor, ceramic, 2.2 nF, X1/Y1 radial
DE1E3KX222M
muRata
19
C12,C16
Capacitor, ceramic, 0.1 μF, 25V, 0603
-
-
20
C13
Capacitor, aluminum, 47 μF, 25V
-
-
21
C14
Capacitor, ceramic, 4.7 μF, 16V, 0805
-
-
22
R1
Resistor, chip, 1.00 MΩ, 1/4W, 1206
-
-
23
R3,R21
Resistor, 100 kΩ, 2W
-
-
24
R4
Resistor, chip, 68 kΩ, 1/10W, 0603
-
-
25
R5
Resistor, chip, 1.0 MΩ, 1/10W, 0603
-
-
26
R7
Resistor, chip, 10Ω, 1/8W, 0805
-
-
27
R8
Resistor, chip, 22Ω, 1/10W, 0603
-
-
28
R9
Resistor, chip, 91 kΩ, 1/10W, 0603
-
-
29
R10
Resistor, chip, 24 kΩ, 1/10W, 0603
-
-
30
R13
Resistor, chip, 27 kΩ, 1/10W, 0603
-
-
31
R14,R22
Resistor, chip, 0.68Ω, 1/4W, 1206
-
-
32
R15
Resistor, chip, 30 kΩ, 1/10W, 0603
-
-
33
R20
Resistor, chip, 100 kΩ, 1/10W, 0603
-
-
34
VR1
Varistor, 275VAC, 7 mm DISK
ERZ-V07D431
Panasonic
35
F1
Fuse, 2A, 300VAC
3691200000
Littelfuse
Fairchild
On Semiconductor
Sumida
EPCOS
Panasonic
TDK
NIPPON-CHEMI-CON
muRata
Littelfuse
Description
:
:
:
:
:
:
:
:
:
Part No.
Vendor
Fairchild Semiconductor International, Inc.
ON Semiconductor
SUMIDA CORPORATION
EPCOS AG
Panasonic Corporation
TDK Corporation
Nippon Chemi-Con Corporation
Murata Manufacturing Co., Ltd.
Littelfuse, Inc.
Document Number: 002-08441 Rev. *D
Page 18 of 32
CY39C604
Figure 13. 50W Reference Data
Power Factor
VDIM=3.3V, LED: OSW4XAHDE1E
Efficiency
VDIM=3.3V, LED: OSW4XAHDE1E
95.0%
0.95
90.0%
0.90
85.0%
0.85
PF
1.00
Efficiency [%]
100.0%
80.0%
75.0%
0.80
0.75
70.0%
0.70
50Hz
65.0%
50Hz
0.65
60Hz
60.0%
60Hz
0.60
80
120
160
200
240
80
280
120
200
240
280
34
36
Load Regulation
VDIM=3.3V
Line Regulation
VDIM=3.3V, LED: OSW4XAHDE1E
1700
1700
1650
1650
1600
1600
1550
1550
IOUT [mA]
IOUT [mA]
160
VIN [VRMS]
VIN [VRMS]
1500
1450
1500
1450
1400
1400
220V/50Hz
50Hz
1350
1350
60Hz
100V/60H
1300
1300
80
120
160
200
VIN [VRMS]
Document Number: 002-08441 Rev. *D
240
280
26
28
30
32
VOUT [V]
Page 19 of 32
CY39C604
Output Ripple Waveform
VIN=100VRMS / 60Hz
VDIM=3.3V, LED:OSW4XAHDE1E
VBULK(BR1+)
Switching Waveform
VIN=100VRMS / 60Hz
VDIM=3.3V, LED:OSW4XAHDE1E
VSW(Q1 Drain)
VOUT
IOUT
IOUT
Turn-On Waveform
VIN=100VRMS / 60Hz
VDIM=3.3V, LED:OSW4XAHDE1E
Turn-Off Waveform
VIN=100VRMS / 60Hz
VDIM=3.3V, LED:OSW4XAHDE1E
VBULK(BR1+)
VBULK(BR1+)
VDD(M1 VDD)
VDD(M1 VDD)
VOUT
VOUT
IOUT
Document Number: 002-08441 Rev. *D
IOUT
Page 20 of 32
CY39C604
Output Ripple Waveform
VIN=220VRMS / 50Hz
VDIM=3.3V, LED:OSW4XAHDE1E
Switching Waveform
VIN=220VRMS / 50Hz
VDIM=3.3V, LED:OSW4XAHDE1E
VBULK(BR1+)
VSW(Q1 Drain)
VOUT
IOUT
IOUT
Turn-On Waveform
VIN=220VRMS / 50Hz
VDIM=3.3V, LED:OSW4XAHDE1E
Turn-Off Waveform
VIN=220VRMS / 50Hz
VDIM=3.3V, LED:OSW4XAHDE1E
VBULK(BR1+)
VBULK(BR1+)
VDD(M1 VDD)
VDD(M1 VDD)
VOUT
VOUT
IOUT
Document Number: 002-08441 Rev. *D
IOUT
Page 21 of 32
CY39C604
Dimming Curve
VIN=100VRMS / 60Hz
LED: OSW4XAHDE1E
Dimming Curve
VIN=220VRMS / 50Hz
LED: OSW4XAHDE1E
Total Harmonic Distortion (THD)
VDIM=3.3V, LED: OSW4XAHDE1E
Document Number: 002-08441 Rev. *D
Page 22 of 32
CY39C604
10.2 5W Non-Isolated and Non-Dimming Application
Input: AC85VRMS to 145VRMS, Output: 70mA/67V to 82V
Figure 14. 5W EVB Schematic
Document Number: 002-08441 Rev. *D
Page 23 of 32
CY39C604
Table 7. 5W BOM List
No.
Component
1
M1
Driver IC for LED Lighting, SO-8
CY39C604
Cypress
2
Q1
MOSFET, N-channel, 600V, 2.8A, TO-251
FQU5N60C
Fairchild
3
BR1
Bridge rectifier, 1A, 600V, Micro-DIP
MDB6S
Fairchild
4
D1
Diode, ultra fast rectifier, 1A, 600V, SMA
ES1J
Fairchild
5
D2
Diode, 200 mA, 200V, SOT-23
MMBD1404
Fairchild
6
ZD1
Diode, Zener, 18V, 500 mW, SOD-123
MMSZ18T1G
ON Semiconductor
7
T1
Transformer, Lp = 430 µH, Np/Na = 5.33/1
EE808
-
8
L1
Inductor 470 µH 0.31A ϕ7.2 mm × 10.5 mm
22R474C
muRata
9
C1
Capacitor, polyester film, 100 nF, 630V, 18.5 × 6.3
ECQ-E6104KF
Panasonic
10
C2
Capacitor, polyester film, 100 nF, 250V, 7.9 × 5.9
ECQE2104KB
Panasonic
11
C3
Capacitor, aluminum electrolytic, 100 µF 100V, ϕ10.0 × 20
EKMG101ELL101MJ20S
NIPPON-CHEMI-CON
12
C4
Capacitor, ceramic, 0.1 µF, 25V, 0603
-
-
13
C5
Capacitor, aluminum, 47 µF, 25V
-
-
14
C6
Capacitor, ceramic, 4.7 µF, 16V, 0805
-
-
15
C7
Capacitor, ceramic, 0.1 µF, 25V, 0603
-
-
16
R1
Resistor, 510Ω, 1/2W
-
-
17
R2
Resistor, chip, 10Ω, 1/8W, 0805
-
-
18
R3
Resistor, chip, 110 kΩ, 1/10W, 0603
-
-
19
R4
Resistor, chip, 30 kΩ, 1/10W, 0603
-
-
20
R5
Resistor, chip, 22 kΩ, 1/10W, 0603
-
-
21
R6
Resistor, 2Ω, 1W
-
-
22
R7
Resistor, chip, 100 kΩ, 1/10W, 0603
-
-
23
R8
Resistor, 47 kΩ, 2W
-
-
Fairchild
On Semiconductor
Panasonic
NIPPON-CHEMI-CON
muRata
Description
:
:
:
:
:
Part No.
Vendor
Fairchild Semiconductor International, Inc.
ON Semiconductor
Panasonic Corporation
Nippon Chemi-Con Corporation
Murata Manufacturing Co., Ltd.
Document Number: 002-08441 Rev. *D
Page 24 of 32
CY39C604
Figure 15. 5W Reference Data
Power Factor
LED:27pcs in series
Efficiency
LED: 27pcs in series
1.00
95.0%
0.95
90.0%
0.90
85.0%
0.85
PF
Efficiency [%]
100.0%
80.0%
75.0%
0.80
0.75
70.0%
0.70
50Hz
50Hz
65.0%
0.65
60Hz
60Hz
60.0%
0.60
80
90
100
110
120
130
140
150
80
90
100
VIN [VRMS]
120
130
140
150
VIN [VRMS]
Line Regulation
LED: 27pcs in series
Load Regulation
VIN=100VRMS
90
80
85
70
80
60
75
50
IOUT [mA]
IOUT [mA]
110
70
65
40
30
20
60
50Hz
55
50Hz
10
60Hz
60Hz
0
50
80
90
100
110
120
VIN [VRMS]
Document Number: 002-08441 Rev. *D
130
140
150
65
70
75
80
85
VOUT [V]
Page 25 of 32
CY39C604
Output Ripple Waveform
VIN=100VRMS / 50Hz
LED:27pcs in series
Switching Waveform
VIN=100VRMS / 50Hz
LED:27pcs in series
VBULK(BR1+)
VSW(Q1 Drain)
VOUT
IOUT
IOUT
Turn-On Waveform
VIN=100VRMS / 50Hz
LED:27pcs in series
Turn-Off Waveform
VIN=100VRMS / 50Hz
LED:27pcs in series
VBULK(BR1+)
VBULK(BR1+)
VDD(M1 VDD)
VDD(M1 VDD)
VOUT
VOUT
IOUT
Document Number: 002-08441 Rev. *D
IOUT
Page 26 of 32
CY39C604
Total Harmonic Distortion (THD)
LED: 27pcs in series
20
18
16
14
THD [%]
12
10
8
6
4
50Hz
2
60Hz
0
80
90
100
110
120
130
140
150
VIN [VRMS]
Document Number: 002-08441 Rev. *D
Page 27 of 32
CY39C604
11. Usage Precautions
Do not configure the IC over the maximum ratings.
If the IC is used over the maximum ratings, the LSI may be permanently damaged.
It is preferable for the device to normally operate within the recommended usage conditions. Usage outside of these conditions can
have an adverse effect on the reliability of the LSI.
Use the device within the recommended operating conditions.
The recommended values guarantee the normal LSI operation under the recommended operating conditions.
The electrical ratings are guaranteed when the device is used within the recommended operating conditions and under the
conditions stated for each item.
Printed circuit board ground lines should be set up with consideration for common impedance.
Take appropriate measures against static electricity.
Containers for semiconductor materials should have anti-static protection or be made of conductive material.
After mounting, printed circuit boards should be stored and shipped in conductive bags or containers.
Work platforms, tools, and instruments should be properly grounded.
Working personnel should be grounded with resistance of 250 kΩ to 1 MΩ in serial between body and ground.
Do not apply negative voltages.
The use of negative voltages below - 0.3 V may make the parasitic transistor activated to the LSI, and can cause malfunctions.
12. RoHS Compliance Information
This product has observed the standard of lead, cadmium, mercury, Hexavalent chromium, polybrominated biphenyls (PBB), and
polybrominated diphenyl ethers (PBDE).
13. Ordering Information
Table 8. Ordering Information
Part Number
Package
CY39C604PNF-G-JNEFE1
Shipping Form
Emboss
8-pin plastic SOP
(SOB008)
CY39C604PNF-G-JNE1
Document Number: 002-08441 Rev. *D
Tube
Page 28 of 32
CY39C604
14. Package Dimensions
Package Code: SOB008
002-15856 Rev. **
Document Number: 002-08441 Rev. *D
Page 29 of 32
CY39C604
15. Major Changes
Spansion Publication Number: MB39C604_DS405-00016
Page
Revision 1.0
Revision 2.0
16
32
-
Section
11. Function Explanations
11.7 Zero Voltage Switching Function
15. Ordering Information
-
Revision 2.0
8
7. Absolute Maximum Ratings
Labeling Sample
17. Recommended mounting condition [JEDEC
34
Level3] Lead Free
Descriptions
Initial release
Corrected the RADJ formula
Added Shipping in Table 15-1
Rewrote entire document for improving the ease of understanding
(the original intentions are remained unchanged).
Removed ESD Voltage (Machine Model) from Table 7-1
Removed section of Labeling Sample
Changed Recommended Condition from three conditions to one
condition “JEDEC LEVEL3”
NOTE: Please see “Document History” about later revised information.
Document Number: 002-08441 Rev. *D
Page 30 of 32
CY39C604
Document History
Document Title: CY39C604 PSR LED Driver IC for LED Lighting
Document Number: 002-08441
Revision
ECN
**
-
Orig. of
Submission
Change
Date
HSAT
02/20/2015
Description of Change
Migrated to Cypress and assigned document number 002-08441.
No change to document contents or format.
*A
5141647
HSAT
02/22/2016
Updated to Cypress format.
Updated Pin Assignment:
Change the package name from FPT-8P-M02 to SOB008
Added RoHS Compliance Information
Updated Ordering Information:
*B
5740103
HIXT
05/22/2017
Change the package name from FPT-8P-M02 to SOB008
Deleted “Marking Format”
Deleted “Recommended Mounting Condition [JEDEC Level3] Lead Free”
Updated Package Dimensions: Updated to Cypress format
Updated the Sales information and legal.
*C
6059028
YOST
02/05/2018
Completing Sunset Review.
*D
6437385
ATTS
Document Number: 002-08441 Rev. *D
01/21/2019
Changed part number to CY39C604
Page 31 of 32
CY39C604
Sales, Solutions, and Legal Information
Worldwide Sales and Design Support
Cypress maintains a worldwide network of offices, solution centers, manufacturer’s representatives, and distributors. To find the
office closest to you, visit us at Cypress Locations.
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Arm and Cortex are registered trademarks of Arm Limited (or its subsidiaries) in the US and/or elsewhere.
© Cypress Semiconductor Corporation, 2014-2019. This document is the property of Cypress Semiconductor Corporation and its subsidiaries, including Spansion LLC (“Cypress”). This document,
including any software or firmware included or referenced in this document (“Software”), is owned by Cypress under the intellectual property laws and treaties of the United States and other countries
worldwide. Cypress reserves all rights under such laws and treaties and does not, except as specifically stated in this paragraph, grant any license under its patents, copyrights, trademarks, or
other intellectual property rights. If the Software is not accompanied by a license agreement and you do not otherwise have a written agreement with Cypress governing the use of the Software,
then Cypress hereby grants you a personal, non-exclusive, nontransferable license (without the right to sublicense) (1) under its copyright rights in the Software (a) for Software provided in source
code form, to modify and reproduce the Software solely for use with Cypress hardware products, only internally within your organization, and (b) to distribute the Software in binary code form
externally to end users (either directly or indirectly through resellers and distributors), solely for use on Cypress hardware product units, and (2) under those claims of Cypress’s patents that are
infringed by the Software (as provided by Cypress, unmodified) to make, use, distribute, and import the Software solely for use with Cypress hardware products. Any other use, reproduction,
modification, translation, or compilation of the Software is prohibited.
TO THE EXTENT PERMITTED BY APPLICABLE LAW, CYPRESS MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS DOCUMENT OR ANY SOFTWARE
OR ACCOMPANYING HARDWARE, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. No computing
device can be absolutely secure. Therefore, despite security measures implemented in Cypress hardware or software products, Cypress does not assume any liability arising out of any security
breach, such as unauthorized access to or use of a Cypress product. In addition, the products described in these materials may contain design defects or errors known as errata which may cause
the product to deviate from published specifications. To the extent permitted by applicable law, Cypress reserves the right to make changes to this document without further notice. Cypress does not
assume any liability arising out of the application or use of any product or circuit described in this document. Any information provided in this document, including any sample design information or
programming code, is provided only for reference purposes. It is the responsibility of the user of this document to properly design, program, and test the functionality and safety of any application
made of this information and any resulting product. Cypress products are not designed, intended, or authorized for use as critical components in systems designed or intended for the operation of
weapons, weapons systems, nuclear installations, life-support devices or systems, other medical devices or systems (including resuscitation equipment and surgical implants), pollution control or
hazardous substances management, or other uses where the failure of the device or system could cause personal injury, death, or property damage (“Unintended Uses”). A critical component is
any component of a device or system whose failure to perform can be reasonably expected to cause the failure of the device or system, or to affect its safety or effectiveness. Cypress is not liable,
in whole or in part, and you shall and hereby do release Cypress from any claim, damage, or other liability arising from or related to all Unintended Uses of Cypress products. You shall indemnify
and hold Cypress harmless from and against all claims, costs, damages, and other liabilities, including claims for personal injury or death, arising from or related to any Unintended Uses of Cypress
products.
Cypress, the Cypress logo, Spansion, the Spansion logo, and combinations thereof, WICED, PSoC, CapSense, EZ-USB, F-RAM, and Traveo are trademarks or registered trademarks of Cypress in
the United States and other countries. For a more complete list of Cypress trademarks, visit cypress.com. Other names and brands may be claimed as property of their respective owners.
Document Number: 002-08441 Rev. *D
January 21, 2019
Page 32 of 32