CY62136VLL-55BAI

CY62136V MoBL™ 128K x 16 Static RAM Features • Low voltage range: — CY62136V: 2.7V-3.6V • Ultra-low active, standby power • Easy memory expansion with CE and OE features • TTL-compatible inputs and outputs • Automatic power-down when deselected • CMOS for optimum speed/power HIGH), outputs are disabled (OE HIGH), BHE and BLE are disabled (BHE, BLE HIGH), or during a write operation (CE LOW, and WE LOW). Writing to the device is accomplished by taking Chip Enable (CE) and Write Enable (WE) inputs LOW. If Byte Low Enable (BLE) is LOW, then data from I/O pins (I/O0 through I/O7), is written into the location specified on the address pins (A0 through A16). If Byte High Enable (BHE) is LOW, then data from I/O pins (I/O8 through I/O15) is written into the location specified on the address pins (A0 through A16). Reading from the device is accomplished by taking Chip Enable (CE) and Output Enable (OE) LOW while forcing the Write Enable (WE) HIGH. If Byte Low Enable (BLE) is LOW, then data from the memory location specified by the address pins will appear on I/O0 to I/O7. If Byte High Enable (BHE) is LOW, then data from memory will appear on I/O8 to I/O15. See the Truth Table at the back of this data sheet for a complete description of read and write modes. The CY62136V is available in 48-ball FBGA and standard 44-pin TSOP Type II (forward pinout) packaging. Functional Description The CY62136V is a high-performance CMOS static RAM organized as 131,072 words by 16 bits. This device features advanced circuit design to provide ultra-low active current. This is ideal for providing More Battery Life™ (MoBL™) in portable applications such as cellular telephones. The device also has an automatic power-down feature that significantly reduces power consumption by 99% when addresses are not toggling. The device can also be put into standby mode when deselected (CE HIGH). The input/output pins (I/O0 through I/O15) are placed in a high-impedance state when: deselected (CE Logic Block Diagram Pin Configurations TSOP II (Forward) Top View A4 A3 A2 A1 A0 CE I/O0 I/O1 I/O2 I/O3 VCC VSS I/O4 I/O5 I/O6 I/O7 WE A16 A15 A14 A13 A12 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 DATA IN DRIVERS A8 A7 A6 A5 A4 A3 A2 A1 A0 128K x 16 RAM Array 1024 X 2048 I/O0–I/O7 I/O8–I/O15 COLUMN DECODER BHE WE CE OE BLE A5 A6 A7 OE BHE BLE I/O15 I/O14 I/O13 I/O12 VSS VCC I/O11 I/O10 I/O9 I/O8 NC A8 A9 A10 A11 NC ROW DECODER MoBL and More Battery Life are trademarks of Cypress Semiconductor Corporation. Cypress Semiconductor Corporation Document #: 38-05087 Rev. ** A9 A10 A11 A12 A13 A14 A15 A16 • SENSE AMPS 3901 North First Street • San Jose • CA 95134 • 408-943-2600 Revised September 5, 2000 CY62136V MoBL™ Pin Configurations (continued) FBGA Top View 1 BLE I/O8 I/O9 VSS VCC I/O14 I/O15 NC 2 OE BHE I/O10 I/O11 I/O12 I/O13 NC A8 3 A0 A3 A5 NC NC A14 A12 A9 4 A1 A4 A6 A7 A16 A15 A13 A10 5 A2 CE I/O1 I/O3 I/O4 I/O5 WE A11 6 NC I/O0 I/O2 VCC VSS I/O6 I/O7 NC A B C D E F G H Maximum Ratings (Above which the useful life may be impaired. For user guidelines, not tested.) Storage Temperature ..................................–65°C to +150°C Ambient Temperature with Power Applied............................................. –55°C to +125°C Supply Voltage to Ground Potential................–0.5V to +4.6V DC Voltage Applied to Outputs in High Z State[1]....................................–0.5V to VCC + 0.5V DC Input Voltage[1].................................–0.5V to VCC + 0.5V Output Current into Outputs (LOW)..............................20 mA Static Discharge Voltage............................................>2001V (per MIL-STD-883, Method 3015) Latch-Up Current.....................................................>200 mA Operating Range Device CY62136V Industrial Range Ambient Temperature −40°C to +85°C VCC 2.7V to 3.6V Product Portfolio Power Dissipation (Industrial) VCC Range Product CY62136V VCC(min.) 2.7V VCC(typ.) 3.0V [2] Operating (ICC) VCC(max.) 3.6V Power LL Typ. [2] Standby (ISB2) Typ. [2] Maximum 15 mA Maximum 15 µA 7 mA 1 µA Notes: 1. VIL(min) = –2.0V for pulse durations less than 20 ns. 2. Typical values are included for reference only and are not guaranteed or tested. Typical values are measured at VCC = VCC Typ, TA = 25°C. Document #: 38-05087 Rev. ** Page 2 of 12 CY62136V MoBL™ Electrical Characteristics Over the Operating Range CY62136V Parameter VOH VOL VIH VIL IIX IOZ ICC Description Output HIGH Voltage Output LOW Voltage Input HIGH Voltage Input LOW Voltage Input Load Current Output Leakage Current VCC Operating Supply Current GND < VI < VCC GND < VO < VCC, Output Disabled IOUT = 0 mA, f = fMAX = 1/tRC, CMOS levels IOUT = 0 mA, f = 1 MHz, CMOS Levels ISB1 Automatic CE Power-Down Current— CMOS Inputs Automatic CE Power-Down Current— CMOS Inputs CE > VCC−0.3V, VIN > VCC−0.3V or VIN < 0.3V, f = fMAX CE > VCC−0.3V VIN > VCC−0.3V or VIN < 0.3V, f = 0 VCC = 3.6V LL 1 VCC = 3.6V Test Conditions IOH = −1.0 mA IOL = 2.1 mA VCC = 2.7V VCC = 2.7V VCC = 3.6V VCC = 2.7V 2.2 −0.5 −1 −1 +1 +1 7 Min. 2.4 0.4 VCC + 0.5V 0.8 +1 +1 15 Typ.[2] Max. Unit V V V V µA µA mA 1 2 mA 100 µA ISB2 15 µA Capacitance[3] Parameter CIN COUT Description Input Capacitance Output Capacitance Test Conditions TA = 25°C, f = 1 MHz, VCC= VCC(typ) Max. 6 8 Unit pF pF Thermal Resistance Description Thermal Resistance (Junction to Ambient)[3] Thermal Resistance (Junction to Case)[3] Note: 3. Tested initially and after any design or process changes that may affect these parameters. Test Conditions Still Air, soldered on a 4.25 x 1.125 inch, 4-layer printed circuit board Symbol ΘJA ΘJC BGA 55 16 TSOPII 60 22 Unit °C/W °C/W Document #: 38-05087 Rev. ** Page 3 of 12 CY62136V MoBL™ AC Test Loads and Waveforms R1 VCC OUTPUT 30 pF INCLUDING JIG AND SCOPE R2 VCC OUTPUT GND 5 pF INCLUDING JIG AND SCOPE R2 Rise Time: 1 V/ns R1 VCC Typ 10% ALL INPUT PULSES 90% 90% 10% Fall Time: 1 V/ns (a) (b) (c) Equivalent to: THÉVENIN EQUIVALENT RTH OUTPUT V Parameters R1 R2 RTH VTH 3.0V 1105 1550 645 1.75V UNIT Ohms Ohms Ohms Volts Data Retention Characteristics (Over the Operating Range) Parameter VDR ICCDR Description VCC for Data Retention Data Retention Current VCC = 1.0V CE > VCC − 0.3V, VIN > VCC − 0.3V or VIN < 0.3V No input may exceed VCC+0.3V LL Conditions[5] Min. 1.0 0.5 Typ.[2] Max. 3.6 7.5 Unit V µA tCDR[3] tR[4] Chip Deselect to Data Retention Time Operation Recovery Time 0 70 ns ns Data Retention Waveform DATA RETENTION MODE VCC VCC(min.) tCDR VDR > 1.0 V VCC(min.) tR CE Notes: 4. Full device operation requires linear VCC ramp from VDR to VCC(min) > 100 ms or stable at VCC(min) > 100 ms. 5. Test conditions assume signal transition time of 5 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to VCC typ., and output loading of the specified IOL/IOH and 30-pF load capacitance. Document #: 38-05087 Rev. ** Page 4 of 12 CY62136V MoBL™ Switching Characteristics Over the Operating Range[5] 55 ns Parameter READ CYCLE tRC tAA tOHA tACE tDOE tLZOE tHZOE tLZCE tHZCE tPU tPD tDBE tLZBE tHZBE WRITE CYCLE tWC tSCE tAW tHA tSA tPWE tBW tSD tHD tHZWE tLZWE [8, 9] 70 ns Max. Min. 70 55 70 10 55 25 70 35 5 25 25 10 25 25 0 55 25 70 35 5 25 25 70 60 60 0 0 50 60 30 0 20 25 10 Max. Unit ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns Description Read Cycle Time Address to Data Valid Data Hold from Address Change CE LOW to Data Valid OE LOW to Data Valid OE LOW to Low Z [6] [6, 7] Min. 55 10 5 10 0 OE HIGH to High Z CE HIGH to High Z CE LOW to Low Z[6] [6, 7] CE LOW to Power-Up CE HIGH to Power-Down BLE / BHE LOW to Data Valid BLE / BHE LOW to Low Z [6, 7] [8] 5 BLE / BHE HIGH to High Z Write Cycle Time CE LOW to Write End 55 45 45 0 0 40 50 25 0 5 Address Set-Up to Write End Address Hold from Write End Address Set-Up to Write Start WE Pulse Width BLE / BHE LOW to Write End Data Set-Up to Write End Data Hold from Write End WE LOW to High Z [6, 7] [6] WE HIGH to Low Z Switching Waveforms Read Cycle No. 1 [10, 11] tRC ADDRESS tOHA DATA OUT PREVIOUS DATA VALID tAA DATA VALID Notes: 6. At any given temperature and voltage condition, tHZCE is less than tLZCE, tHZOE is less than tLZOE, and tHZWE is less than tLZWE for any given device. 7. tHZOE, tHZCE, and tHZWE are specified with CL = 5 pF as in part (b) of AC Test Loads. Transition is measured ±500 mV from steady-state voltage. 8. The internal write time of the memory is defined by the overlap of CE LOW and WE LOW. Both signals must be LOW to initiate a write and either signal can terminate a write by going HIGH. The data input set-up and hold timing should be referenced to the rising edge of the signal that terminates the write. 9. The minimum write cycle time for write cycle #3 (WE controlled, OE LOW) is the sum of tHZWE and tSD. 10. Device is continuously selected. OE, CE = VIL. 11. WE is HIGH for read cycle. Document #: 38-05087 Rev. ** Page 5 of 12 CY62136V MoBL™ Switching Waveforms (continued) Read Cycle No. 2 [11, 12] CE tACE OE tDOE BHE/BLE tLZOE tHZBE tDBE tLZBE DATA OUT HIGH IMPEDANCE tLZCE VCC SUPPLY CURRENT tPU 50% 50% ISB ICC DATA VALID HIGH IMPEDANCE tHZOE tRC tPD tHZCE [8, 13, 14] Write Cycle No. 1 (WE Controlled) tWC ADDRESS CE tAW WE tSA tPWE tHA BHE/BLE tBW OE tSD DATA I/O NOTE 15 tHZOE Notes: 12. Address valid prior to or coincident with CE transition LOW. 13. Data I/O is high impedance if OE = VIH. 14. If CE goes HIGH simultaneously with WE HIGH, the output remains in a high-impedance state. 15. During this period, the I/Os are in output state and input signals should not be applied. tHD DATA VALID IN Document #: 38-05087 Rev. ** Page 6 of 12 CY62136V MoBL™ Switching Waveforms (continued) Write Cycle No. 2 (CE Controlled) [8, 13, 14] tWC ADDRESS CE tSA tAW tHA tSCE BHE/BLE tBW WE tPWE tSD tHD DATA I/O DATAIN VALID Write Cycle No. 3 (WE Controlled, OE LOW) [9, 14] tWC ADDRESS CE tAW tBW tSA tHA BHE/BLE WE tSD DATA I/O NOTE 15 tHZWE DATAIN VALID tHD tLZWE Document #: 38-05087 Rev. ** Page 7 of 12 CY62136V MoBL™ Switching Waveforms (continued) Write Cycle No. 4 (BHE/BLE Controlled, OE LOW) [15] tWC ADDRESS CE tAW tBW tSA WE tSD DATA I/O NOTE 15 tHA BHE/BLE tHD DATAIN VALID tHZWE tLZWE Document #: 38-05087 Rev. ** Page 8 of 12 CY62136V MoBL™ Typical DC and AC Characteristics Normalized Operating Current vs. Supply Voltage Standby Current vs. Supply Voltage 35 MoBL 30 25 ISB (µA) 20 15 10 5 0 2.2 2.7 3.2 SUPPLY VOLTAGE (V) 3.7 1.0 2.7 2.8 3.7 1.9 SUPPLY VOLTAGE (V) 1.4 1.2 MoBL 1.0 ICC 0.8 0.6 0.4 0.2 0.0 1.7 Access Time vs. Supply Voltage 80 70 60 50 TAA (ns) 40 30 20 10 1.0 1.9 2.7 2.8 3.7 MoBL SUPPLY VOLTAGE (V) Truth Table CE H L L L L L L L L L L WE X H H H H H H H L L L OE X L L L L H H H X X X BHE X L H L H L H L L H L BLE X L L H H L L H L L H Inputs/Outputs High Z Data Out (I/OO–I/O15) Data Out (I/OO–I/O7); I/O8–I/O15 in High Z Data Out (I/O8–I/O15); I/O0–I/O7 in High Z High Z High Z High Z High Z Data In (I/OO–I/O15) Data In (I/OO–I/O7); I/O8–I/O15 in High Z Data In (I/O8–I/O15); I/O0 –I/O7 in High Z Read Read Read Deselect/Output Disabled Deselect/Output Disabled Deselect/Output Disabled Deselect/Output Disabled Write Write Write Mode Deselect/Power-Down Power Standby (ISB) Active (ICC) Active (ICC) Active (ICC) Active (ICC) Active (ICC) Active (ICC) Active (ICC) Active (ICC) Active (ICC) Active (ICC) Document #: 38-05087 Rev. ** Page 9 of 12 CY62136V MoBL™ Ordering Information Speed (ns) 55 70 Ordering Code CY62136VLL-55ZI CY62136VLL-55BAI CY62136VLL-70ZI CY62136VLL-70BAI Package Name Z44 BA48 Z44 BA48 44-Pin TSOP II 48-Ball Fine Pitch BGA 44-Pin TSOP II 48-Ball Fine Pitch BGA Package Type Operating Range Industrial Package Diagrams 48-Ball (7.00 mm x 7.00 mm) FBGA BA48 51-85096-D Document #: 38-05087 Rev. ** Page 10 of 12 62136V: 8/2000 Revision: February 2, 2001 CY62136V MoBL™ Package Diagrams (continued) 44-Pin TSOP II Z44 51-85087-A Document #: 38-05087 Rev. ** Page 11 of 12 © Cypress Semiconductor Corporation, 2001. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress Semiconductor product. Nor does it convey or imply any license under patent or other rights. Cypress Semiconductor does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges. CY62136V MoBL™ Document Title: CY62136V MoBL™ 128K x 16 Static RAM Document Number: 38-05087 REV. ** ECN NO. 107347 Issue Date 05/25/01 Oreg. of Change SZV Description of Change Change from Spec #: 38-00728 to 38-05087 Document #: 38-05087 Rev. ** Page 12 of 12