CY62137FV30 MoBL®Automotive
2-Mbit (128 K × 16) Static RAM
2-Mbit (128 K × 16) Static RAM
Features
Functional Description
■
Very high speed: 45 ns
■
Temperature ranges
❐ Automotive-A: –40 °C to +85 °C
❐ Automotive-E: –40 °C to +125 °C
■
Wide voltage range: 2.20 V–3.60 V
■
Pin
compatible
with
CY62137CV/CV25/CV30/CV33,
CY62137V, and CY62137EV30
■
Ultra low standby power
❐ Typical standby current: 1 A (Automotive-A)
❐ Maximum standby current: 5 A (Automotive-A)
■
Ultra low active power
❐ Typical active current: 1.6 mA at f = 1 MHz (45 ns speed)
■
Easy memory expansion with CE and OE features
■
Automatic power down when deselected
■
Complementary metal oxide semiconductor (CMOS) for
optimum speed and power
■
Byte power down feature
■
Available in 44-pin thin small outline package (TSOP) II
package
The CY62137FV30 is a high performance CMOS static RAM
organized as 128K words by 16 bits. This device features
advanced circuit design to provide ultra low active current. This
is ideal for providing More Battery Life™ (MoBL®) in portable
applications such as cellular telephones. The device also has an
automatic power down feature that significantly reduces power
consumption when addresses are not toggling. Placing the
device into standby mode reduces power consumption by more
than 99% when deselected (CE HIGH or both BLE and BHE are
HIGH). The input and output pins (I/O0 through I/O15) are placed
in a high impedance state in the following conditions when the
device is deselected (CE HIGH), the outputs are disabled (OE
HIGH), both the Byte High Enable and the Byte Low Enable are
disabled (BHE, BLE HIGH), or during an active write operation
(CE LOW and WE LOW).
Write to the device by taking Chip Enable (CE) and Write Enable
(WE) inputs LOW. If Byte Low Enable (BLE) is LOW, then data
from I/O pins (I/O0 through I/O7) is written into the location
specified on the address pins (A0 through A16). If Byte High
Enable (BHE) is LOW, then data from I/O pins (I/O8 through
I/O15) is written into the location specified on the address pins
(A0 through A16).
Read from the device by taking Chip Enable (CE) and Output
Enable (OE) LOW, while forcing the Write Enable (WE) HIGH. If
Byte Low Enable (BLE) is LOW, then data from the memory
location specified by the address pins appear on I/O0 to I/O7. If
Byte High Enable (BHE) is LOW, then data from memory
appears on I/O8 to I/O15. See the Truth Table on page 11 for a
complete description of read and write modes.
For a complete list of related resources, click here.
Logic Block Diagram
SENSE AMPS
A10
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
ROW DECODER
DATA IN DRIVERS
128K x 16
RAM Array
Cypress Semiconductor Corporation
Document Number: 001-66190 Rev. *E
•
A16
A15
A14
A13
A11
A12
CE
BHE
BLE
198 Champion Court
I/O8–I/O15
BHE
WE
CE
OE
BLE
COLUMN DECODER
POWER DOWN
CIRCUIT
I/O0–I/O7
•
San Jose, CA 95134-1709
•
408-943-2600
Revised January 3, 2018
CY62137FV30 MoBL®Automotive
Contents
Product Portfolio .............................................................. 3
Pin Configuration ............................................................. 3
Maximum Ratings ............................................................. 4
Operating Range ............................................................... 4
Electrical Characteristics ................................................. 4
Capacitance ...................................................................... 5
Thermal Resistance .......................................................... 5
AC Test Loads and Waveforms ....................................... 5
Data Retention Characteristics ....................................... 6
Data Retention Waveform ................................................ 6
Switching Characteristics ................................................ 7
Switching Waveforms ...................................................... 8
Truth Table ...................................................................... 11
Document Number: 001-66190 Rev. *E
Ordering Information ...................................................... 12
Ordering Code Definitions ......................................... 12
Package Diagrams .......................................................... 13
Acronyms ........................................................................ 14
Document Conventions ................................................. 14
Units of Measure ....................................................... 14
Document History Page ................................................. 15
Sales, Solutions, and Legal Information ...................... 16
Worldwide Sales and Design Support ....................... 16
Products .................................................................... 16
PSoC® Solutions ...................................................... 16
Cypress Developer Community ................................. 16
Technical Support ..................................................... 16
Page 2 of 16
CY62137FV30 MoBL®Automotive
Product Portfolio
Power Dissipation
Product
VCC Range (V)
Range
Min
Typ [1]
Speed
(ns)
Max
Operating ICC (mA)
f = 1MHz
Typ [1]
Max
Standby ISB2
(A)
f = fmax
Typ [1]
Max
Typ [1]
Max
CY62137FV30LL Automotive-A
2.2 V
3.0 V
3.6 V
45
1.6
2.5
13
18
1
5
Automotive-E
2.2 V
3.0 V
3.6 V
55
2
3
15
25
1
20
Pin Configuration
Figure 1. 44-pin TSOP II pinout [2]
A4
A3
A2
A1
A0
CE
I/O0
I/O1
I/O2
I/O3
VCC
VSS
I/O4
I/O5
I/O6
I/O7
WE
A16
A15
A14
A13
A12
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
A5
A6
A7
OE
BHE
BLE
I/O15
I/O14
I/O13
I/O12
VSS
VCC
I/O11
I/O10
I/O9
I/O8
NC
A8
A9
A10
A11
NC
Notes
1. Typical values are included for reference only and are not guaranteed or tested. Typical values are measured at VCC = VCC(typ), TA = 25 °C.
2. NC pins are not connected on the die.
Document Number: 001-66190 Rev. *E
Page 3 of 16
CY62137FV30 MoBL®Automotive
Maximum Ratings
Output current into outputs (LOW) ............................. 20 mA
Exceeding the maximum ratings may impair the useful life of the
device. These user guidelines are not tested.
Storage temperature ............................... –65 °C to + 150 °C
Ambient temperature
with power applied .................................. –55 °C to + 125 °C
Supply voltage to ground potential [3, 4] .........–0.3 V to 3.9 V
DC voltage applied to outputs
in High Z state [3, 4] ........................................–0.3 V to 3.9 V
DC input voltage [3, 4] .....................................–0.3 V to 3.9 V
Static discharge voltage
(MIL-STD-883, method 3015) ................................ > 2001 V
Latch up current ..................................................... > 200 mA
Operating Range
Ambient
VCC[5]
Temperature
CY62137FV30LL Automotive-A –40 °C to +85 °C 2.2 V to
Automotive-E –40 °C to +125 °C 3.6 V
Device
Range
Electrical Characteristics
Over the Operating Range
Parameter
VOH
VOL
Description
Test Conditions
VIL
Min
Typ
[6]
55 ns (Automotive-E)
Max
Min
Typ [6]
Max
Unit
Output high voltage
2.2 < VCC < 2.7 IOH = –0.1 mA
2.0
–
–
2.0
–
–
V
2.4
–
–
2.4
–
–
V
Output low voltage
2.7 < VCC < 3.6 IOH = –1.0 mA
2.2 < VCC < 2.7 IOL = 0.1 mA
–
–
0.4
–
–
0.4
V
–
–
0.4
–
–
0.4
V
2.2 < VCC < 2.7
1.8
–
VCC + 0.3
1.8
–
VCC + 0.3
V
2.7 < VCC < 3.6
2.2
–
VCC + 0.3
2.2
–
VCC + 0.3
V
2.2 < VCC < 2.7
–0.3
–
0.6
–0.3
–
0.6
V
2.7 < VCC < 3.6
–0.3
–
0.8
–0.3
–
0.8
V
2.7 < VCC < 3.6 IOL = 2.1 mA
VIH
45 ns (Automotive-A)
Input high voltage
Input low voltage
IIX
Input leakage current
–1
–
+1
–4
–
+4
A
IOZ
Output leakage current GND < VO < VCC, Output disabled
–1
–
+1
–4
–
+4
A
ICC
VCC operating supply
current
–
13
18
–
15
25
mA
–
1.6
2.5
–
2
3
–
1
5
–
1
20
A
–
1
5
–
1
20
A
ISB1[7]
GND < VI < VCC
f = fmax = 1/tRC
f = 1 MHz
VCC = VCC(max)
IOUT = 0 mA
CMOS levels
Automatic power down CE > VCC –0.2 V or
current – CMOS inputs
(BHE and BLE) > VCC – 0.2 V,
VIN > VCC – 0.2 V, VIN < 0.2 V,
f = fmax (address and data only),
f = 0 (OE and WE),
VCC = VCC(max)
ISB2 [7]
Automatic power down CE > VCC – 0.2 V or
current – CMOS inputs
(BHE and BLE) > VCC–0.2 V,
VIN > VCC – 0.2 V or VIN < 0.2 V,
f = 0, VCC = VCC(max)
Notes
3. VIL(min) = –2.0 V for pulse durations less than 20 ns.
4. VIH(max) = VCC + 0.75 V for pulse durations less than 20 ns.
5. Full device AC operation assumes a minimum of 100 s ramp time from 0 to VCC(min) and 200 s wait time after VCC stabilization.
6. Typical values are included for reference only and are not guaranteed or tested. Typical values are measured at VCC = VCC(typ), TA = 25 °C.
7. Chip enable (CE) and byte enables (BHE and BLE) need to be tied to CMOS levels to meet the ISB1 / ISB2 / ICCDR specification. Other inputs can be left floating.
Document Number: 001-66190 Rev. *E
Page 4 of 16
CY62137FV30 MoBL®Automotive
Capacitance
Parameter [8]
Description
CIN
Input capacitance
COUT
Output capacitance
Test Conditions
TA = 25 °C, f = 1 MHz, VCC = VCC(typ)
Max
Unit
10
pF
10
pF
Thermal Resistance
Parameter [8]
Description
JA
Thermal resistance
(junction to ambient)
JC
Thermal resistance
(junction to case)
Test Conditions
TSOP II
Unit
Still air, soldered on a 3 × 4.5 inch, four-layer printed circuit
board
57.92
C/W
17.44
C/W
AC Test Loads and Waveforms
Figure 2. AC Test Loads and Waveforms
R1
VCC
OUTPUT
VCC
10%
GND
Rise Time = 1 V / ns
R2
30 pF
INCLUDING
JIG AND
SCOPE
ALL INPUT PULSES
90%
90%
10%
Fall Time = 1 V / ns
Equivalent to: THÉVENIN EQUIVALENT
RTH
OUTPUT
VTH
Parameters
2.5 V (2.2 V to 2.7 V)
3.0 V (2.7 V to 3.6 V)
Unit
R1
16667
1103
R2
15385
1554
RTH
8000
645
VTH
1.20
1.75
V
Note
8. Tested initially and after any design or process changes that may affect these parameters.
Document Number: 001-66190 Rev. *E
Page 5 of 16
CY62137FV30 MoBL®Automotive
Data Retention Characteristics
Over the Operating Range
Parameter
Min
Typ [9]
Max
Unit
1.5
–
–
V
Automotive-A
–
–
4
A
Automotive-E
–
–
12
–
0
–
–
ns
CY62137FV30LL-45
45
–
–
ns
CY62137FV30LL-55
55
Conditions
VCC for data retention
VDR
ICCDR
Description
[10]
Data retention current
VCC = 1.5 V,
CE > VCC – 0.2 V or
(BHE and BLE) > VCC – 0.2 V
VIN > VCC – 0.2 V or VIN < 0.2 V
tCDR [11]
Chip deselect to data
retention time
tR [12]
Operation recovery time
Data Retention Waveform
Figure 3. Data Retention Waveform [13]
VCC
CE or
VCC(min)
tCDR
DATA RETENTION MODE
VDR > 1.5 V
VCC(min)
tR
BHE.BLE
Notes
9. Typical values are included for reference only and are not guaranteed or tested. Typical values are measured at VCC = VCC(typ), TA = 25 °C
10. Chip enable (CE) and byte enables (BHE and BLE) need to be tied to CMOS levels to meet the ISB1 / ISB2 / ICCDR specification. Other inputs can be left floating.
11. Tested initially and after any design or process changes that may affect these parameters.
12. Full device operation requires linear VCC ramp from VDR to VCC(min) > 100 s or stable at VCC(min) > 100 s.
13. BHE.BLE is the AND of both BHE and BLE. Deselect the chip by either disabling chip enable signals or by disabling both BHE and BLE.
Document Number: 001-66190 Rev. *E
Page 6 of 16
CY62137FV30 MoBL®Automotive
Switching Characteristics
Parameter [14, 15]
Description
45 ns (Automotive-A)
55 ns (Automotive-E)
Min
Max
Min
Max
Unit
Read Cycle
tRC
Read cycle time
45
–
55
–
ns
tAA
Address to data valid
–
45
–
55
ns
tOHA
Data hold from address change
10
–
10
–
ns
tACE
CE LOW to data valid
–
45
–
55
ns
tDOE
OE LOW to data valid
–
22
–
25
ns
tLZOE
OE LOW to low Z [16]
5
–
5
–
ns
tHZOE
OE HIGH to high Z [16, 17]
–
18
–
20
ns
tLZCE
CE LOW to low Z [16]
10
–
10
–
ns
tHZCE
CE HIGH to high Z [16, 17]
–
18
–
20
ns
tPU
CE LOW to power-up
0
–
0
–
ns
tPD
CE HIGH to power-down
–
45
–
55
ns
tDBE
BLE/BHE LOW to data valid
–
45
–
55
ns
tLZBE
BLE/BHE LOW to low Z [16, 18]
5
–
10
–
ns
BLE/BHE HIGH to high Z [16, 17]
–
18
–
20
ns
tHZBE
Write Cycle
[19, 20]
tWC
Write cycle time
45
–
55
–
ns
tSCE
CE LOW to write end
35
–
40
–
ns
tAW
Address setup to write end
35
–
40
–
ns
tHA
Address hold from write end
0
–
0
–
ns
tSA
Address setup to write start
0
–
0
–
ns
tPWE
WE pulse width
35
–
40
–
ns
tBW
BLE/BHE LOW to write end
35
–
40
–
ns
tSD
Data setup to write end
25
–
25
–
ns
tHD
Data hold from write end
0
–
0
–
ns
tHZWE
WE LOW to high Z [16, 17]
–
18
–
20
ns
tLZWE
WE HIGH to low Z [16]
10
–
10
–
ns
Notes
14. Test conditions for all parameters, other than tristate parameters, assume signal transition time of 3 ns (1 V/ns) or less, timing reference levels of VCC(typ)/2, input
pulse levels of 0 to VCC(typ), and output loading of the specified IOL/IOH as shown in Figure 2 on page 5.
15. AC timing parameters are subject to byte enable signals (BHE or BLE) not switching when chip is disabled. Please see application note AN13842 for further clarification.
16. At any temperature and voltage condition, tHZCE is less than tLZCE, tHZBE is less than tLZBE, tHZOE is less than tLZOE, and tHZWE is less than tLZWE for any device.
17. tHZOE, tHZCE, tHZBE, and tHZWE transitions are measured when the outputs enter a high impedance state.
18. If both byte enables are toggled together, this value is 10 ns.
19. The internal write time of the memory is defined by the overlap of WE, CE = VIL, BHE and/or BLE = VIL. All signals are ACTIVE to initiate a write and any of these
signals terminate a write by going INACTIVE. The data input setup and hold timing are referenced to the edge of the signal that terminates the write.
20. The minimum write cycle pulse width required for the Write Cycle No. 3 (WE Controlled, OE LOW) should be equal to sum of tSD and tHZWE.
Document Number: 001-66190 Rev. *E
Page 7 of 16
CY62137FV30 MoBL®Automotive
Switching Waveforms
Figure 4. Read Cycle 1: Address Transition Controlled [21, 22]
tRC
ADDRESS
tOHA
DATA OUT
tAA
PREVIOUS DATA VALID
DATA VALID
Figure 5. Read Cycle 2: OE Controlled [22, 23]
ADDRESS
tRC
CE
tPD
tHZCE
tACE
OE
tHZOE
tDOE
tLZOE
BHE/BLE
tHZBE
tDBE
tLZBE
DATA OUT
HIGHIMPEDANCE
HIGH
IMPEDANCE
DATA VALID
tLZCE
tPU
VCC
SUPPLY
CURRENT
50%
50%
ICC
ISB
Notes
21. The device is continuously selected. OE, CE = VIL, BHE and/or BLE = VIL.
22. WE is HIGH for read cycle.
23. Address valid before or similar to CE and BHE, BLE transition LOW.
Document Number: 001-66190 Rev. *E
Page 8 of 16
CY62137FV30 MoBL®Automotive
Switching Waveforms (continued)
Figure 6. Write Cycle 1: WE Controlled [24, 25, 26]
tWC
ADDRESS
tSCE
CE
tAW
tHA
tSA
tPWE
WE
tBW
BHE/BLE
OE
DATA I/O
tSD
NOTE 27
tHD
DATAIN
tHZOE
Figure 7. Write Cycle 2: CE Controlled [24, 25, 26]
tWC
ADDRESS
tSCE
CE
tSA
tAW
tHA
tPWE
WE
tBW
BHE/BLE
OE
tSD
DATA I/O
tHD
DATAIN
NOTE 27
tHZOE
Notes
24. The internal write time of the memory is defined by the overlap of WE, CE = VIL, BHE and/or BLE = VIL. All signals are ACTIVE to initiate a write and any of these
signals terminate a write by going INACTIVE. The data input setup and hold timing are referenced to the edge of the signal that terminates the write.
25. Data I/O is high impedance if OE = VIH.
26. If CE goes HIGH simultaneously with WE = VIH, the output remains in a high impedance state.
27. During this period, the I/Os are in output state. Do not apply input signals.
Document Number: 001-66190 Rev. *E
Page 9 of 16
CY62137FV30 MoBL®Automotive
Switching Waveforms (continued)
Figure 8. Write Cycle 3: WE Controlled, OE LOW [28, 29]
tWC
ADDRESS
tSCE
CE
tBW
BHE/BLE
tAW
tHA
tSA
WE
tPWE
tSD
DATA I/O
NOTE 30
tHD
DATAIN
tLZWE
tHZWE
Figure 9. Write Cycle 4: BHE/BLE Controlled, OE LOW [28]
tWC
ADDRESS
CE
tSCE
tAW
tHA
tBW
BHE/BLE
tSA
tPWE
WE
tHZWE
DATA I/O
NOTE 30
tSD
tHD
DATAIN
tLZWE
Notes
28. If CE goes HIGH simultaneously with WE = VIH, the output remains in a high impedance state.
29. The minimum write cycle pulse width should be equal to sum of tSD and tHZWE.
30. During this period, the I/Os are in output state. Do not apply input signals.
Document Number: 001-66190 Rev. *E
Page 10 of 16
CY62137FV30 MoBL®Automotive
Truth Table
CE
X
WE
OE
BHE
BLE
[31]
[31]
High Z
Deselect or power-down
Standby (ISB)
X
X
Inputs or Outputs
Mode
Power
H
X
X
[31]
X
X
H
H
High Z
Deselect or power-down
Standby (ISB)
L
H
L
L
L
Data out (I/O0–I/O15)
Read
Active (ICC)
L
H
L
H
L
Data out (I/O0–I/O7);
I/O8–I/O15 in High Z
Read
Active (ICC)
L
H
L
L
H
Data out (I/O8–I/O15);
I/O0–I/O7 in High Z
Read
Active (ICC)
L
H
H
L
L
High Z
Output disabled
Active (ICC)
L
H
H
H
L
High Z
Output disabled
Active (ICC)
L
H
H
L
H
High Z
Output disabled
Active (ICC)
L
L
X
L
L
Data in (I/O0–I/O15)
Write
Active (ICC)
L
L
X
H
L
Data in (I/O0–I/O7);
I/O8–I/O15 in High Z
Write
Active (ICC)
L
L
X
L
H
Data in (I/O8–I/O15);
I/O0–I/O7 in High Z
Write
Active (ICC)
Note
31. The ‘X’ (Don’t care) state for the Chip enable (CE) and Byte enables (BHE and BLE) in the truth table refer to the logic state (either HIGH or LOW). Intermediate
voltage levels on these pins is not permitted.
Document Number: 001-66190 Rev. *E
Page 11 of 16
CY62137FV30 MoBL®Automotive
Ordering Information
Speed
(ns)
Ordering Code
45
CY62137FV30LL-45ZSXA
55
CY62137FV30LL-55ZSXE
Package
Diagram
Package Type
51-85087 44-pin TSOP II (Pb-free)
Operating
Range
Automotive-A
Automotive-E
Contact your local Cypress sales representative for availability of these parts.
Ordering Code Definitions
CY 621
3
7
F V30 LL - XX ZS X
X
Temperature Range: X = A or E
A = Automotive-A; E = Automotive-E
Pb-free
Package Type: ZS = 44-pin TSOP II
Speed Grade: XX = 45 ns or 55 ns
Low Power
Voltage Range: V30 = 3 V Typical
Process Technology: F = 90 nm
Bus width: 7 = ×16
Density: 3 = 2 Mbit
Family Code: 621 = MoBL SRAM family
Company ID: CY = Cypress
Document Number: 001-66190 Rev. *E
Page 12 of 16
CY62137FV30 MoBL®Automotive
Package Diagrams
Figure 10. 44-pin TSOP Z44-II Package Outline, 51-85087
51-85087 *E
Document Number: 001-66190 Rev. *E
Page 13 of 16
CY62137FV30 MoBL®Automotive
Acronyms
Acronym
Document Conventions
Description
Units of Measure
BHE
Byte High Enable
BLE
Byte Low Enable
°C
degree Celsius
CE
Chip Enable
MHz
megahertz
CMOS
Complementary Metal Oxide Semiconductor
A
microampere
I/O
Input/Output
µs
microsecond
OE
Output Enable
mA
milliampere
SRAM
Static Random Access Memory
ns
nanosecond
TSOP
Thin Small Outline Package
ohm
WE
Write Enable
pF
picofarad
V
volt
W
watt
Document Number: 001-66190 Rev. *E
Symbol
Unit of Measure
Page 14 of 16
CY62137FV30 MoBL®Automotive
Document History Page
Document Title: CY62137FV30 MoBL® Automotive, 2-Mbit (128 K × 16) Static RAM
Document Number: 001-66190
Rev.
ECN No.
Issue Date
Orig. of
Change
Description of Change
**
3124003
01/12/2011
RAME
Created new Automotive datasheet from document number 001-07141 Rev. *H
*A
3503362
01/20/2012
TAVA
Updated Functional Description.
Updated Package Diagrams.
Updated to new template.
*B
4250476
01/17/2014
VINI
Updated Package Diagrams:
spec 51-85087 – Changed revision from *D to *E.
Updated to new template.
Completing Sunset Review.
*C
4658311
02/11/2015
VINI
Updated Maximum Ratings:
Referred Notes 3, 4 in “Supply voltage to ground potential“.
Referred Note 3 in “DC input voltage”.
Updated AC Test Loads and Waveforms:
Updated Figure 2.
Updated Switching Characteristics:
Added Note 20 and referred the same note in “Write Cycle”.
Updated Switching Waveforms:
Added Note 29 and referred the same note in Figure 8.
Completing Sunset Review.
*D
4729375
06/05/2015
PSR
Updated Functional Description:
Added “For a complete list of related resources, click here.” at the end.
Updated Thermal Resistance:
Replaced “two layer” with “four-layer” in “Test Conditions” column.
Changed value of JA parameter from 77 C/W to 57.92 C/W.
Changed value of JC parameter from 13 C/W to 17.44 C/W.
Updated to new template.
*E
6007662
01/03/2018
Document Number: 001-66190 Rev. *E
AESATP12 Updated logo and copyright.
Page 15 of 16
CY62137FV30 MoBL® Automotive
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