CY62146G MoBL® Automotive
4-Mbit (256K words × 16 bit) Static RAM
with Error-Correcting Code (ECC)
4-Mbit (256K words × 16 bit) Static RAM with Error-Correcting Code (ECC)
Features
Functional Description
■
AEC-Q100 qualified
■
High speed: 45 ns
■
Temperature Range
❐ Automotive-A: -40 C to +85 C
■
Ultra-low standby power
❐ Typical standby current: 3.5 A
CY62146G is high-performance CMOS low-power (MoBL)
SRAM devices with embedded ECC.
Device is accessed by asserting the chip enable (CE) input LOW.
■
Embedded ECC for single-bit error correction[1]
■
Voltage range: 2.2 V to 3.6 V, 4.5 V to 5.5 V
■
1.0-V data retention
■
TTL-compatible inputs and outputs
■
Pb-free 44-pin TSOP II package
Data writes are performed by asserting the Write Enable (WE)
input LOW, while providing the data on I/O0 through I/O15 and
address on A0 through A17 pins. The Byte High Enable (BHE)
and Byte Low Enable (BLE) inputs control write operations to the
upper and lower bytes of the specified memory location. BHE
controls I/O8 through I/O15 and BLE controls I/O0 through I/O7.
Data reads are performed by asserting the Output Enable (OE)
input and providing the required address on the address lines.
Read data is accessible on the I/O lines (I/O0 through I/O15).
Byte accesses can be performed by asserting the required byte
enable signal (BHE or BLE) to read either the upper byte or the
lower byte of data from the specified address location.
All I/Os (I/O0 through I/O15) are placed in a HI-Z state when the
device is deselected (CE HIGH), or control signals are
de-asserted (OE, BLE, BHE).
The logic block diagram is on page 2.
Product Portfolio
Power Dissipation
Product
CY62146G30
Features and Options
(see Pin Configuration –
CY62146G on page 4)
Single Chip Enable
Range
Automotive-A
CY62146G
Operating ICC (mA)
VCC Range (V) Speed
Standby, ISB2 (µA)
(ns)
f = fmax
2.2 V–3.6 V
45
Typ[2]
Max
Typ[2]
Max
15
20
3.5
8.7
4.5 V–5.5 V
Notes
1. This device does not support automatic write-back on error detection.
2. Typical values are included for reference only and are not guaranteed or tested. Typical values are measured at VCC = 3 V (for VCC range of 2.2 V–3.6 V) and VCC = 5 V
(for VCC range of 4.5 V–5.5 V), TA = 25 °C.
Cypress Semiconductor Corporation
Document Number: 002-03594 Rev. *C
•
198 Champion Court
•
San Jose, CA 95134-1709
•
408-943-2600
Revised November 24, 2017
CY62146G MoBL® Automotive
Logic Block Diagram – CY62146G
ECC DECODER
MEMORY
ARRAY
INPUT BUFFER
SENSE
AMPLIFIERS
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
ROW DECODER
ECC ENCODER
I/O0‐I/O7
I/O8‐I/O15
A10
A11
A12
A13
A14
A15
A16
A17
COLUMN DECODER
BHE
WE
OE
CE
BLE
Document Number: 002-03594 Rev. *C
Page 2 of 19
CY62146G MoBL® Automotive
Contents
Pin Configuration – CY62146G ........................................ 4
Maximum Ratings ............................................................. 5
Operating Range ............................................................... 5
DC Electrical Characteristics .......................................... 5
Capacitance ...................................................................... 7
Thermal Resistance .......................................................... 7
AC Test Loads and Waveforms ....................................... 7
Data Retention Characteristics ....................................... 8
Data Retention Waveform ................................................ 8
AC Switching Characteristics ......................................... 9
Switching Waveforms .................................................... 10
Truth Table – CY62146G ................................................ 14
Ordering Information ...................................................... 15
Document Number: 002-03594 Rev. *C
Ordering Code Definitions ......................................... 15
Package Diagrams .......................................................... 16
Acronyms ........................................................................ 17
Document Conventions ................................................. 17
Units of Measure ....................................................... 17
Document History Page ................................................. 18
Sales, Solutions, and Legal Information ...................... 19
Worldwide Sales and Design Support ....................... 19
Products .................................................................... 19
PSoC®Solutions ....................................................... 19
Cypress Developer Community ................................. 19
Technical Support ..................................................... 19
Page 3 of 19
CY62146G MoBL® Automotive
Pin Configuration – CY62146G
Figure 1. 44-pin TSOP II pinout – CY62146G [3]
A4
A3
A2
A1
A0
/CE1
I/O0
I/O1
I/O2
I/O3
VCC
VSS
I/O4
I/O5
I/O6
I/O7
/ WE
A17
A16
A15
A14
A13
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
44- TSOP-II
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
A5
A6
A7
/OE
/ BHE
/ BLE
I/O15
I/O14
I/O13
I/O12
VSS
VCC
I/O11
I/O10
I/O9
I/O8
NC
A8
A9
A10
A11
A12
Note
3. NC pins are not connected internally to the die and are typically used for address expansion to a higher-density device. Refer to the respective datasheets for pin
configuration.
Document Number: 002-03594 Rev. *C
Page 4 of 19
CY62146G MoBL® Automotive
DC input voltage[4] .............................. –0.3 V to VCC + 0.3 V
Maximum Ratings
Exceeding maximum ratings may shorten the useful life of the
device. User guidelines are not tested.
Storage temperature ............................... –65 °C to + 150 °C
Ambient temperature
with power applied .................................. –55 °C to + 125 °C
Supply voltage
to ground potential[4] ........................... –0.3 V to VCC + 0.3 V
Output current into outputs (in low state) .................... 20 mA
Static discharge voltage
(MIL-STD-883, Method 3015) ................................. >2001 V
Latch-up current ..................................................... >140 mA
Operating Range
DC voltage applied to outputs
in HI-Z state[4] ...................................... –0.3 V to VCC + 0.3 V
Grade
Ambient Temperature
VCC
Automotive-A
–40 C to +85 C
2.2 V to 3.6 V
4.5 V to 5.5 V
DC Electrical Characteristics
Over the operating range
Parameter
VOH
Description
Output HIGH
voltage
VIH
VIL
Output LOW
voltage
Input HIGH
voltage
Input LOW
voltage
45 ns (Automotive-A)
Min
Typ
Max
2.2 V to 2.7 V
VCC = Min, IOH = –0.1 mA
2
–
–
2.7 V to 3.6 V
VCC = Min, IOH = –1.0 mA
2.4
–
–
4.5 V to 5.5 V
VCC = Min, IOH = –1.0 mA
2.4
–
–
–
–
4.5 V to 5.5 V
VOL
Test Conditions
VCC = Min, IOH = –0.1 mA
VCC –
0.5[5]
V
2.2 V to 2.7 V
VCC = Min, IOL = 0.1 mA
–
–
0.4
2.7 V to 3.6 V
VCC = Min, IOL = 2.1 mA
–
–
0.4
4.5 V to 5.5 V
VCC = Min, IOL = 2.1 mA
–
–
0.4
2.2 V to 2.7 V
–
1.8
–
VCC + 0.3[4]
0.3[4]
2.7 V to 3.6 V
–
2
–
VCC +
4.5 V to 5.5 V
–
2.2
–
VCC + 0.5[4]
2.2 V to 2.7 V
–
–0.3[4]
–
0.6
–
–0.3
[4]
–
0.8
–0.5
[4]
2.7 V to 3.6 V
Unit
V
V
V
–
0.8
IIX
Input leakage current
GND < VIN < VCC
–1
–
+1
A
IOZ
Output leakage current
GND < VOUT < VCC,
Output disabled
–1
–
+1
A
ICC
VCC operating supply current
Max VCC,
IOUT = 0 mA,
CMOS levels
f = fMAX
–
15
20
mA
f = 1 MHz
–
3.5
6
4.5 V to 5.5 V
–
Note
4. VIL(min) = –2.0 V and VIH(max) = VCC + 2 V for pulse durations of less than 20 ns.
5. This parameter is guaranteed by design and not tested.
Document Number: 002-03594 Rev. *C
Page 5 of 19
CY62146G MoBL® Automotive
DC Electrical Characteristics (continued)
Over the operating range
Parameter
ISB1[6]
Description
Test Conditions
Automatic power down
CE1 > VCC – 0.2 V or CE2 < 0.2 V
current – CMOS inputs;
VCC = 2.2 V to 3.6 V and 4.5 V to VIN > VCC – 0.2 V or VIN < 0.2 V,
5.5 V
f = fmax (address and data only),
45 ns (Automotive-A)
Unit
Min
Typ
Max
–
3.5
8.7
A
–
3.5
8.7
A
f = 0 (OE, WE, BHE, and BLE),
Max VCC
ISB2[6]
Automatic power down
CE1 > VCC – 0.2 V or CE2 < 0.2 V
current – CMOS inputs
VCC = 2.2 V to 3.6 V and 4.5 V to VIN > VCC – 0.2 V or VIN < 0.2 V,
5.5 V
f = 0, Max VCC
Notes
6. Chip enable (CE) must be tied to CMOS levels to meet the ISB1/ISB2/ICCDR spec. Other inputs can be left floating.
Document Number: 002-03594 Rev. *C
Page 6 of 19
CY62146G MoBL® Automotive
Capacitance
Parameter [7]
Description
CIN
Input capacitance
COUT
Output capacitance
Test Conditions
TA = 25 °C, f = 1 MHz, VCC = VCC(typ)
Max
Unit
10
pF
10
pF
Thermal Resistance
Parameter [7]
Description
JA
Thermal resistance
(junction to ambient)
JC
Thermal resistance
(junction to case)
Test Conditions
44-pin TSOP II Unit
Still air, soldered on a 3 × 4.5 inch, four-layer printed circuit
board
66.82
°C/W
15.97
°C/W
AC Test Loads and Waveforms
Figure 2. AC Test Loads and Waveforms[8]
R1
VCC
OUTPUT
VHIGH
GND
30 pF*
R2
Equivalent to: THÉVENIN EQUIVALENT
OUTPUT
2.5 V
R1
R2
RTH
VTH
Fall Time = 1 V/ns
Rise Time = 1 V/ns
*Including
jig and sope
Parameters
10%
ALL INPUT PULSES
90%
90%
10%
3.0 V
Unit
16667
1103
15385
1554
8000
645
1.20
1.75
V
RTH
VTH
Notes
7. Tested initially and after any design or process changes that may affect these parameters.
8. Full-device operation requires linear VCC ramp from VDR to VCC(min) > 100 s or stable at VCC(min) > 100 s.
Document Number: 002-03594 Rev. *C
Page 7 of 19
CY62146G MoBL® Automotive
Data Retention Characteristics
Over the Operating range
Parameter
Description
Conditions (Automotive-A)
Min
Typ [9]
Max
Unit
VDR
VCC for data retention
–
1
–
–
V
ICCDR[10, 11]
Data retention current
Vcc = 1.2 V
–
–
13
A
CE1 > VCC 0.2 V or CE2 < 0.2 V,
VIN > VCC 0.2 V or VIN < 0.2 V
tCDR[12]
Chip deselect to data retention
time
–
0
–
–
ns
tR[12, 13]
Operation recovery time
–
45
–
–
ns
Data Retention Waveform
Figure 3. Data Retention Waveform
V CC
V C C (m in )
tCDR
D A T A R E T E N T I O N M O D E
V D R = 1 .0 V
V C C (m in )
tR
CE
Notes
9. Typical values are included for reference only and are not guaranteed or tested. Typical values are measured at VCC = 3 V (for VCC range of 2.2 V–3.6 V) and VCC = 5 V
(for VCC range of 4.5 V–5.5 V), TA = 25 °C.
10. Chip enable (CE) must be tied to CMOS levels to meet the ISB1 / ISB2 / ICCDR spec. Other inputs can be left floating.
11. ICCDR is guaranteed only after device is first powered up to VCC(min) and then brought down to VDR.
12. These parameters are guaranteed by design.
13. Full-device operation requires linear VCC ramp from VDR to VCC(min) > 100 s or stable at VCC(min) > 100 s.
Document Number: 002-03594 Rev. *C
Page 8 of 19
CY62146G MoBL® Automotive
AC Switching Characteristics
Parameter [14]
Description
45 ns
Unit
Min
Max
45
–
ns
Read Cycle
tRC
Read cycle time
tAA
Address to data valid
–
45
ns
tOHA
Data hold from address change
10
–
ns
tACE
CE1 LOW and CE2 HIGH to data valid
–
45
ns
tDOE
OE LOW to data valid
–
22
ns
5
–
ns
–
18
ns
impedance[15, 16]
tLZOE
OE LOW to Low
tHZOE
OE HIGH to HI-Z[15, 16, 17]
tLZCE
10
–
ns
CE1 HIGH and CE2 LOW to
HI-Z[15, 16, 17]
–
18
ns
tPU
CE1 LOW and CE2 HIGH to
power-up[16]
0
–
ns
tPD
CE1 HIGH and CE2 LOW to power-down[16]
–
45
ns
tDBE
BLE / BHE LOW to data valid
–
22
ns
5
–
ns
–
18
ns
tHZCE
tLZBE
tHZBE
CE1 LOW and CE2 HIGH to Low
impedance[15, 16]
BLE / BHE LOW to Low
BLE / BHE HIGH to
impedance[15, 16]
HI-Z[15, 16, 17]
Write Cycle [18, 19]
tWC
Write cycle time
45
–
ns
tSCE
CE1 LOW and CE2 HIGH to write end
35
–
ns
tAW
Address setup to write end
35
–
ns
tHA
Address hold from write end
0
–
ns
tSA
Address setup to write start
0
–
ns
tPWE
WE pulse width
35
–
ns
tBW
BLE / BHE LOW to write end
35
–
ns
tSD
Data setup to write end
25
–
ns
tHD
Data hold from write end
0
–
ns
–
18
ns
10
–
ns
tHZWE
tLZWE
WE LOW to
HI-Z[15, 16, 17]
WE HIGH to Low
impedance[15, 16]
Notes
14. Test conditions assume a signal transition time (rise/fall) of 3 ns or less, timing reference levels of 1.5 V (for VCC > 3 V) and VCC/2 (for VCC < 3 V), and input pulse
levels of 0 to 3 V (for VCC > 3 V) and 0 to VCC (for VCC < 3 V). Test conditions for the read cycle use output loading shown in AC Test Loads and Waveforms section, unless
specified otherwise.
15. At any temperature and voltage condition, tHZCE is less than tLZCE, tHZBE is less than tLZBE, tHZOE is less than tLZOE, and tHZWE is less than tLZWE for any device.
16. These parameters are guaranteed by design.
17. tHZOE, tHZCE, tHZBE, and tHZWE transitions are measured when the outputs enter a high-impedance state.
18. The internal write time of the memory is defined by the overlap of WE = VIL, CE1 = VIL, and CE2 = VIH. All signals must be ACTIVE to initiate a write and any of these
signals can terminate a write by going INACTIVE. The data input setup and hold timing must refer to the edge of the signal that terminates the write.
19. The minimum pulse width in Write Cycle No. 3 (WE Controlled, OE LOW) should be equal to sum of tSD and tHZWE.
Document Number: 002-03594 Rev. *C
Page 9 of 19
CY62146G MoBL® Automotive
Switching Waveforms
Figure 4. Read Cycle No. 1 of CY62146G (Address Transition Controlled) [20]
tRC
ADDRESS
tAA
t OHA
PREVIOUS DATA OUT
VALID
DATA I / O
DATA OUT VALID
Figure 5. Read Cycle No. 2 (OE Controlled) [21, 22]
A D D R ES S
tR C
CE
t PD
t H Z CE
tACE
OE
t HZOE
t DO E
t LZ O E
BH E/
B LE
t DB E
t LZ B E
D A TA I / O
H IG H IM PE D A N C E
t H Z BE
D ATA O U T V ALID
H IG H
IM P ED AN C E
t LZ C E
V CC
SU PP LY
CURRENT
tP U
IS B
Notes
20. The device is continuously selected. OE = VIL, CE = VIL, BHE or BLE or both = VIL.
21. WE is HIGH for Read cycle.
22. Address valid prior to or coincident with CE LOW transition.
Document Number: 002-03594 Rev. *C
Page 10 of 19
CY62146G MoBL® Automotive
Switching Waveforms (continued)
Figure 6. Write Cycle No. 1 (WE Controlled) [23, 24]
tWC
ADDRESS
t SCE
CE
tBW
BHE/
BLE
tSA
tAW
tHA
t PWE
WE
t HZWE
DATA I/O
tSD
t LZWE
tHD
DATA IN VALID
Notes
23. The internal write time of the memory is defined by the overlap of WE = VIL, CE1 = VIL, BHE or BLE or both = VIL, and CE2 = VIH. All signals must be ACTIVE to initiate
a write and any of these signals can terminate a write by going INACTIVE. The data input setup and hold timing must refer to the edge of the signal that terminates
the write.
24. Data I/O is in a HI-Z state if CE = VIH, or OE = VIH or BHE, and/or BLE = VIH.
Document Number: 002-03594 Rev. *C
Page 11 of 19
CY62146G MoBL® Automotive
Switching Waveforms (continued)
Figure 7. Write Cycle No. 2 (CE Controlled) [25, 26]
tW C
ADDRESS
tS A
tSCE
CE
tA W
tH A
t PW E
WE
tB W
BHE /
BLE
OE
t HZO E
tH D
tS D
DATA I /O
D A T A IN V A L ID
Figure 8. Write Cycle No. 3 (WE Controlled, OE LOW) [25, 26, 27]
t WC
ADDRESS
t SCE
CE
tBW
BHE /
BLE
tSA
tAW
tHA
t PWE
WE
t LZW E
t HZW E
DATA I /O
tSD
tHD
DATA IN VALID
Notes
25. The internal write time of the memory is defined by the overlap of WE = VIL, CE1 = VIL, BHE or BLE or both = VIL, and CE2 = VIH. All signals must be ACTIVE to initiate
a write and any of these signals can terminate a write by going INACTIVE. The data input setup and hold timing must refer to the edge of the signal that terminates
the write.
26. Data I/O is in HI-Z state if CE = VIH, or OE = VIH or BHE, and/or BLE = VIH.
27. The minimum write pulse width for Write Cycle No. 3 (WE Controlled, OE LOW) should be sum of tHZWE and tSD.
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Page 12 of 19
CY62146G MoBL® Automotive
Switching Waveforms (continued)
Figure 9. Write Cycle No. 4 (BHE/BLE Controlled) [28, 29]
tWC
ADDRESS
tSCE
CE
tAW
tSA
tHA
tBW
BHE/
BLE
tPWE
WE
tHZWE
DATA I/O
tSD
tHD
tLZWE
DATAIN VALID
Notes
28. The internal write time of the memory is defined by the overlap of WE = VIL, CE1 = VIL, BHE or BLE or both = VIL, and CE2 = VIH. All signals must be ACTIVE to initiate
a write and any of these signals can terminate a write by going INACTIVE. The data input setup and hold timing must refer to the edge of the signal that terminates
the write.
29. Data I/O is in a HI-Z state if CE = VIH, or OE = VIH or BHE, and/or BLE = VIH.
Document Number: 002-03594 Rev. *C
Page 13 of 19
CY62146G MoBL® Automotive
Truth Table – CY62146G
CE
WE
OE
BHE
BLE
Inputs/Outputs
Mode
Power
H
X
X
X
X
HI-Z
Deselect/Power-down
Standby (ISB)
X[30]
X
X
H
H
HI-Z
Output disabled
Active (ICC)
L
H
L
L
L
Data Out (I/O0–I/O15)
Read
Active (ICC)
L
H
L
H
L
Data Out (I/O0–I/O7);
HI-Z (I/O8–I/O15)
Read
Active (ICC)
L
H
L
L
H
HI-Z (I/O0–I/O7);
Data Out (I/O8–I/O15)
Read
Active (ICC)
L
H
H
X
X
HI-Z
Output disabled
Active (ICC)
L
L
X
L
L
Data In (I/O0–I/O15)
Write
Active (ICC)
L
L
X
H
L
Data In (I/O0–I/O7);
HI-Z (I/O8–I/O15)
Write
Active (ICC)
L
L
X
L
H
HI-Z (I/O0–I/O7);
Data In (I/O8–I/O15)
Write
Active (ICC)
Notes
30. The ‘X’ (Don’t care) state for the chip enables refer to the logic state (either HIGH or LOW). Intermediate voltage levels on these pins is not permitted.
Document Number: 002-03594 Rev. *C
Page 14 of 19
CY62146G MoBL® Automotive
Ordering Information
Speed
(ns)
45
Voltage
Range
Ordering Code
2.2 V–3.6 V
4.5 V–5.5 V
Package
Diagram
Package Type
CY62146G30-45ZSXA
51-85087 44-pin TSOP II
CY62146G30-45ZSXAT
51-85087 44-pin TSOP II, Tape & Reel
CY62146G-45ZSXA
51-85087 44-pin TSOP II
CY62146G-45ZSXAT
51-85087 44-pin TSOP II, Tape & Reel
Operating
Range
Automotive-A
Ordering Code Definitions
CY 621
4
6
G XX - 45
ZS
X
X X
X= blank or T
blank = Bulk; T = Tape & Reel
Temperature Range:
A = Automotive-A
Pb-free
Package Type:
ZS = 44-pin TSOP II
Speed Grade: 45 ns
Voltage Range: XX = 30 or blank
30 = 3 V typ; blank = 5 V typ
Process Technology: G = 65 nm
Bus width: 6 = × 16
Density: 4 = 4-Mbit
Family Code: 621 = MoBL SRAM family
Company ID: CY = Cypress
Document Number: 002-03594 Rev. *C
Page 15 of 19
CY62146G MoBL® Automotive
Package Diagrams
Figure 10. 44-pin TSOP Z44-II Package Outline, 51-85087
51-85087 *E
Document Number: 002-03594 Rev. *C
Page 16 of 19
CY62146G MoBL® Automotive
Acronyms
Acronym
Document Conventions
Description
Units of Measure
BHE
Byte High Enable
BLE
Byte Low Enable
°C
degree Celsius
CE
Chip Enable
MHz
megahertz
CMOS
Complementary Metal Oxide Semiconductor
A
microampere
I/O
Input/Output
s
microsecond
OE
Output Enable
mA
milliampere
SRAM
Static Random Access Memory
mm
millimeter
TSOP
Thin Small Outline Package
ns
nanosecond
VFBGA
Very Fine-Pitch Ball Grid Array
ohm
WE
Write Enable
%
percent
pF
picofarad
V
volt
W
watt
Document Number: 002-03594 Rev. *C
Symbol
Unit of Measure
Page 17 of 19
CY62146G MoBL® Automotive
Document History Page
Document Title: CY62146G MoBL® Automotive, 4-Mbit (256K words × 16 bit) Static RAM with Error-Correcting Code (ECC)
Document Number: 002-03594
Rev.
ECN No.
Orig. of
Change
Submission
Date
*A
5035945
NILE
12/09/2015
Changed status from Preliminary to Final.
*B
5427239
NILE
09/23/2016
Updated Features:
Added “AEC-Q100 qualified”.
Updated Maximum Ratings:
Updated Note 4 (Replaced “2 ns” with “20 ns”).
Updated DC Electrical Characteristics:
Changed minimum value of VOH parameter from 2.2 V to 2.4 V corresponding
to Operating Range “2.7 V to 3.6 V” and Test Condition
“VCC = Min, IOH = –1.0 mA”.
Changed minimum value of VIH parameter from 2.0 V to 1.8 V corresponding
to Operating Range “2.2 V to 2.7 V”.
Updated Ordering Information:
Updated part numbers.
Updated to new template.
Completing Sunset Review.
*C
5975694
AESATMP8
11/24/2017
Updated logo and Copyright.
Document Number: 002-03594 Rev. *C
Description of Change
Page 18 of 19
CY62146G MoBL® Automotive
Sales, Solutions, and Legal Information
Worldwide Sales and Design Support
Cypress maintains a worldwide network of offices, solution centers, manufacturer’s representatives, and distributors. To find the office
closest to you, visit us at Cypress Locations.
PSoC®Solutions
Products
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cypress.com/arm
cypress.com/automotive
Clocks & Buffers
Interface
cypress.com/clocks
cypress.com/interface
Internet of Things
Memory
cypress.com/iot
cypress.com/memory
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cypress.com/mcu
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cypress.com/psoc
Power Management ICs
Cypress Developer Community
Forums | WICED IOT Forums | Projects | Video | Blogs |
Training | Components
Technical Support
cypress.com/support
cypress.com/pmic
Touch Sensing
cypress.com/touch
USB Controllers
Wireless Connectivity
PSoC 1 | PSoC 3 | PSoC 4 | PSoC 5LP | PSoC 6
cypress.com/usb
cypress.com/wireless
© Cypress Semiconductor Corporation, 2015-2017. This document is the property of Cypress Semiconductor Corporation and its subsidiaries, including Spansion LLC (“Cypress”). This document,
including any software or firmware included or referenced in this document (“Software”), is owned by Cypress under the intellectual property laws and treaties of the United States and other countries
worldwide. Cypress reserves all rights under such laws and treaties and does not, except as specifically stated in this paragraph, grant any license under its patents, copyrights, trademarks, or other
intellectual property rights. If the Software is not accompanied by a license agreement and you do not otherwise have a written agreement with Cypress governing the use of the Software, then Cypress
hereby grants you a personal, non-exclusive, nontransferable license (without the right to sublicense) (1) under its copyright rights in the Software (a) for Software provided in source code form, to
modify and reproduce the Software solely for use with Cypress hardware products, only internally within your organization, and (b) to distribute the Software in binary code form externally to end users
(either directly or indirectly through resellers and distributors), solely for use on Cypress hardware product units, and (2) under those claims of Cypress's patents that are infringed by the Software (as
provided by Cypress, unmodified) to make, use, distribute, and import the Software solely for use with Cypress hardware products. Any other use, reproduction, modification, translation, or compilation
of the Software is prohibited.
TO THE EXTENT PERMITTED BY APPLICABLE LAW, CYPRESS MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS DOCUMENT OR ANY SOFTWARE
OR ACCOMPANYING HARDWARE, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. To the extent
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are not designed, intended, or authorized for use as critical components in systems designed or intended for the operation of weapons, weapons systems, nuclear installations, life-support devices or
systems, other medical devices or systems (including resuscitation equipment and surgical implants), pollution control or hazardous substances management, or other uses where the failure of the
device or system could cause personal injury, death, or property damage (“Unintended Uses”). A critical component is any component of a device or system whose failure to perform can be reasonably
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Cypress, the Cypress logo, Spansion, the Spansion logo, and combinations thereof, WICED, PSoC, CapSense, EZ-USB, F-RAM, and Traveo are trademarks or registered trademarks of Cypress in
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Document Number: 002-03594 Rev. *C
Revised November 24, 2017
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