CY62147EV30 MoBL® Automotive
4-Mbit (256K × 16) Static RAM
4-Mbit (256K × 16) Static RAM
current. It is ideal for providing More Battery Life™ (MoBL) in
portable applications such as cellular telephones. The device
also has an automatic power down feature that significantly
reduces power consumption when addresses are not toggling.
Placing the device in standby mode reduces power consumption
by more than 99 percent when deselected (CE HIGH or both BLE
and BHE are HIGH). The input and output pins (I/O0 through
I/O15) are placed in a high-impedance state when:
Features
Very high speed: 45 ns
Temperature ranges
❐ Automotive-A: –40 °C to +85 °C
❐ Automotive-E: –40 °C to +125 °C
■ Wide voltage range: 2.20 V to 3.60 V
■ Pin compatible with CY62147DV30
■ Ultra low standby power
❐ Typical standby current: 1 A
❐ Maximum standby current: 7 A (Automotive-A)
■ Ultra low active power
❐ Typical active current: 2 mA (Automotive-A) at f = 1 MHz
[1] and OE features
■ Easy memory expansion with CE
■
■
■
Automatic power down when deselected
■
Complementary metal oxide semiconductor (CMOS) for
optimum speed and power
■
Available in Pb-free 48-ball very fine ball grid array (VFBGA)
(single/dual CE option) and 44-pin thin small outline package
(TSOP) II packages
■
Byte power-down feature
■
Deselected (CE HIGH)
■
Outputs are disabled (OE HIGH)
■
Both Byte High Enable and Byte Low Enable are disabled
(BHE, BLE HIGH)
■
Write operation is active (CE LOW and WE LOW)
To write to the device, take Chip Enable (CE) and Write Enable
(WE) inputs LOW. If Byte Low Enable (BLE) is LOW, then data
from I/O pins (I/O0 through I/O7) is written into the location
specified on the address pins (A0 through A17). If Byte High
Enable (BHE) is LOW, then data from I/O pins (I/O8 through
I/O15) is written into the location specified on the address pins
(A0 through A17).
To read from the device, take Chip Enable (CE) and Output
Enable (OE) LOW while forcing the Write Enable (WE) HIGH. If
Byte Low Enable (BLE) is LOW, then data from the memory
location specified by the address pins appear on I/O0 to I/O7. If
Byte High Enable (BHE) is LOW, then data from memory
appears on I/O8 to I/O15. See the Truth Table on page 12 for a
complete description of read and write modes.
For a complete list of related resources, click here.
Functional Description
The CY62147EV30 is a high-performance CMOS static RAM
(SRAM) organized as 256K words by 16 bits. This device
features advanced circuit design to provide ultra low active
Logic Block Diagram
SENSE AMPS
A10
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
ROW DECODER
DATA IN DRIVERS
256K x 16
RAM Array
I/O0–I/O7
I/O8–I/O15
COLUMN DECODER
A17
A15
A16
A13
A14
A12
BHE
BLE
CIRCUIT
A11
CE
POWER DOWN
BHE
WE
[1]
CE
OE
BLE
Note
1. BGA packaged device is offered in single CE and dual CE options. In this data sheet, for a dual CE device, CE refers to the internal logical combination of CE1 and
CE2 such that when CE1 is LOW and CE2 is HIGH, CE is LOW. For all other cases CE is HIGH.
Cypress Semiconductor Corporation
Document Number: 001-66256 Rev. *D
•
198 Champion Court
•
San Jose, CA 95134-1709
•
408-943-2600
Revised January 29, 2018
CY62147EV30 MoBL® Automotive
Contents
Product Portfolio .............................................................. 3
Pin Configurations ........................................................... 4
Maximum Ratings ............................................................. 5
Operating Range ............................................................... 5
Electrical Characteristics ................................................. 5
Capacitance ...................................................................... 6
Thermal Resistance .......................................................... 6
AC Test Load and Waveforms ......................................... 6
Data Retention Characteristics ....................................... 7
Data Retention Waveform ................................................ 7
Switching Characteristics ................................................ 8
Switching Waveforms ...................................................... 9
Truth Table ...................................................................... 12
Document Number: 001-66256 Rev. *D
Ordering Information ...................................................... 13
Ordering Code Definitions ......................................... 13
Package Diagrams .......................................................... 14
Acronyms ........................................................................ 16
Document Conventions ................................................. 16
Units of Measure ....................................................... 16
Document History Page ................................................. 17
Sales, Solutions, and Legal Information ...................... 18
Worldwide Sales and Design Support ....................... 18
Products .................................................................... 18
PSoC® Solutions ...................................................... 18
Cypress Developer Community ................................. 18
Technical Support ..................................................... 18
Page 2 of 18
CY62147EV30 MoBL® Automotive
Product Portfolio
Power Dissipation
Product
CY62147EV30LL
VCC Range (V)
Range
Speed
(ns)
Min
Typ [2]
Max
Automotive-A
2.2
3.0
3.6
Automotive-E
2.2
3.0
3.6
Operating ICC (mA)
f = 1 MHz
f = fmax
Standby ISB2
(A)
Typ [2]
Max
Typ [2]
Max
Typ [2]
Max
45 ns
2
2.5
15
20
1
7
55 ns
2
3
15
25
1
20
Note
2. Typical values are included for reference only and are not guaranteed or tested. Typical values are measured at VCC = VCC(typ), TA = 25 °C.
Document Number: 001-66256 Rev. *D
Page 3 of 18
CY62147EV30 MoBL® Automotive
Pin Configurations
Figure 1. 48-Ball VFBGA Pinout (Single Chip Enable) [3, 4]
1
2
3
4
5
6
A
BLE
OE
A0
A1
A2
CE2
A
I/O0
B
I/O8
BHE
A3
A4
CE1
I/O0
B
I/O2
C
I/O9
I/O10
A5
A6
I/O1
I/O2
C
VCC
D
VSS I/O11
A17
A7
VCC
D
I/O4
VSS
E
VCC
NC
A16
I/O4
VSS
E
A15
I/O5
I/O6
F
I/O14 I/O13 A14
A15
I/O5
I/O6
F
1
2
3
4
5
6
BLE
OE
A0
A1
A2
NC
I/O8
BHE
A3
A4
CE
I/O9
I/O10
A5
A6
I/O1
VSS I/O11
A17
A7
VCC
NC
A16
I/O14 I/O13 A14
I/O12
Figure 2. 48-Ball VFBGA Pinout (Dual Chip Enable) [3, 4]
I/O3
I/O12
I/O3
I/O15
NC
A12
A13
WE
I/O7
G
I/O15
NC
A12
A13
WE
I/O7
G
NC
A8
A9
A10
A11
NC
H
NC
A8
A9
A10
A11
NC
H
Figure 3. 44-Pin TSOP II Pinout [3]
A4
A3
A2
A1
A0
CE
I/O0
I/O1
I/O2
I/O3
VCC
VSS
I/O4
I/O5
I/O6
I/O7
WE
A17
A16
A15
A14
A13
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
A5
A6
A7
OE
BHE
BLE
I/O15
I/O14
I/O13
I/O12
VSS
VCC
I/O11
I/O10
I/O9
I/O8
NC
A8
A9
A10
A11
A12
Notes
3. NC pins are not connected on the die.
4. Pins H1, G2, and H6 in the BGA package are address expansion pins for 8Mb, 16Mb, and 32Mb, respectively.
Document Number: 001-66256 Rev. *D
Page 4 of 18
CY62147EV30 MoBL® Automotive
DC input voltage [5, 6] .......... –0.3 V to 3.9 V (VCCmax + 0.3 V)
Maximum Ratings
Exceeding the maximum ratings may impair the useful life of the
device. User guidelines are not tested.
Storage temperature ............................... –65 °C to + 150 °C
Ambient temperature with
power applied ......................................... –55 °C to + 125 °C
Output current into outputs (LOW) ............................. 20 mA
Static discharge voltage
(MIL-STD-883, method 3015) ................................. >2001 V
Latch-up current ..................................................... >200 mA
Operating Range
Supply voltage to
ground potential .............. –0.3 V to + 3.9 V (VCCmax + 0.3 V)
DC voltage applied to outputs
in High Z state [5, 6] ............ –0.3 V to 3.9 V (VCCmax + 0.3 V)
Device
Ambient
Temperature
Range
VCC [7]
CY62147EV30LL Automotive-A –40 °C to +85 °C
2.2 V to
Automotive-E –40 °C to +125 °C 3.6 V
Electrical Characteristics
Over the Operating Range
Parameter
VOH
VOL
VIH
VIL
Description
Output HIGH voltage
Output LOW voltage
Input HIGH voltage
Input LOW voltage
Test Conditions
45 ns (Automotive-A) 55 ns (Automotive-E)
Min Typ [8]
Max
Min Typ [8]
Max
Unit
IOH = –0.1 mA
2.0
–
–
2.0
–
–
V
IOH = –1.0 mA, VCC > 2.70 V
2.4
–
–
2.4
–
–
V
IOL = 0.1 mA
–
–
0.4
–
–
0.4
V
IOL = 2.1 mA, VCC = 2.70 V
–
–
0.4
–
–
0.4
V
VCC = 2.2 V to 2.7 V
1.8
–
VCC + 0.3 1.8
–
VCC + 0.3
V
VCC= 2.7 V to 3.6 V
2.2
–
VCC + 0.3 2.2
–
VCC + 0.3
V
VCC = 2.2 V to 2.7 V
–0.3
–
0.6
–0.3
–
0.6
V
VCC= 2.7 V to 3.6 V
–0.3
–
0.8
–0.3
0.8
V
IIX
Input leakage current
GND < VI < VCC
–1
–
+1
–4
–
+4
A
IOZ
Output leakage current
GND < VO < VCC, output disabled
–1
–
+1
–4
–
+4
A
ICC
VCC operating supply
current
f = fmax = 1/tRC VCC = VCC(max)
IOUT = 0 mA
f = 1 MHz
CMOS levels
–
15
20
–
15
25
mA
–
2
2.5
–
2
3
ISB1
Automatic CE power-down CE > VCC – 0.2 V
current – CMOS inputs
VIN > VCC – 0.2 V, VIN < 0.2 V,
f = fmax (address and data only),
f = 0 (OE, BHE, BLE and WE),
VCC = 3.60 V
–
1
7
–
1
20
A
ISB2 [9]
Automatic CE power-down CE > VCC – 0.2 V,
current – CMOS inputs
VIN > VCC – 0.2 V or VIN < 0.2 V,
f = 0, VCC = 3.60 V
–
1
7
–
1
20
A
Notes
5. VIL(min) = –2.0 V for pulse durations less than 20 ns.
6. VIH(max) = VCC + 0.75 V for pulse durations less than 20 ns.
7. Full device AC operation assumes a minimum of 100 s ramp time from 0 to VCC(min) and 200 s wait time after VCC stabilization.
8. Typical values are included for reference only and are not guaranteed or tested. Typical values are measured at VCC = VCC(typ), TA = 25 °C.
9. Chip enable (CE) and byte enables (BHE and BLE) need to be tied to CMOS levels to meet the ISB2 / ICCDR spec. Other inputs can be left floating.
Document Number: 001-66256 Rev. *D
Page 5 of 18
CY62147EV30 MoBL® Automotive
Capacitance
For all packages.
Parameter [10]
Description
CIN
Input capacitance
COUT
Output capacitance
Test Conditions
Max
Unit
10
pF
10
pF
VFBGA
Package
TSOP II
Package
Unit
42.10
55.52
C/W
23.45
16.03
C/W
TA = 25 °C, f = 1 MHz, VCC = VCC(typ)
Thermal Resistance
Parameter [10]
Description
JA
Thermal resistance
(junction to ambient)
JC
Thermal resistance
(junction to case)
Test Conditions
Still Air, soldered on a 3 × 4.5 inch,
four-layer printed circuit board
AC Test Load and Waveforms
Figure 4. AC Test Load and Waveforms
VCC
OUTPUT
R1
ALL INPUT PULSES
90%
90%
10%
VCC
30 pF
10%
GND
Rise Time = 1 V/ns
R2
INCLUDING
JIG AND
SCOPE
Fall Time = 1 V/ns
Equivalent to: THEVENIN EQUIVALENT
OUTPUT
RTH
V
Parameters
2.50 V
3.0 V
Unit
R1
16667
1103
R2
15385
1554
RTH
8000
645
VTH
1.20
1.75
V
Note
10. Tested initially and after any design or process changes that may affect these parameters.
Document Number: 001-66256 Rev. *D
Page 6 of 18
CY62147EV30 MoBL® Automotive
Data Retention Characteristics
Over the Operating Range
Parameter
Description
VDR
VCC for data retention
ICCDR[12]
Data retention current
tCDR [13]
Chip deselect to data
retention time
tR [14]
Operation recovery time
Min
Typ [11]
Max
Unit
1.5
–
–
V
–
0.8
7
A
–
–
12
0
–
–
ns
CY62147EV30LL-45
45
–
–
ns
CY62147EV30LL-55
55
–
–
Conditions
Automotive-A
VCC= 1.5 V,
CE > VCC – 0.2 V,
Automotive-E
VIN > VCC – 0.2 V or
VIN < 0.2 V
Data Retention Waveform
Figure 5. Data Retention Waveform [15, 16]
DATA RETENTION MODE
VCC
CE or
VCC(min)
tCDR
VDR > 1.5V
VCC(min)
tR
BHE.BLE
Notes
11. Typical values are included for reference only and are not guaranteed or tested. Typical values are measured at VCC = VCC(typ), TA = 25 °C.
12. Chip enable (CE) and byte enables (BHE and BLE) need to be tied to CMOS levels to meet the ISB2 / ICCDR spec. Other inputs can be left floating.
13. Tested initially and after any design or process changes that may affect these parameters.
14. Full device operation requires linear VCC ramp from VDR to VCC(min) > 100 s or stable at VCC(min) > 100 s.
15. BGA packaged device is offered in single CE and dual CE options. In this data sheet, for a dual CE device, CE refers to the internal logical combination of CE1 and
CE2 such that when CE1 is LOW and CE2 is HIGH, CE is LOW. For all other cases CE is HIGH.
16. BHE.BLE is the AND of both BHE and BLE. Deselect the chip by either disabling the chip enable signals or by disabling both BHE and BLE.
Document Number: 001-66256 Rev. *D
Page 7 of 18
CY62147EV30 MoBL® Automotive
Switching Characteristics
Over the Operating Range
Parameter [17, 18]
Description
45 ns (Automotive-A)
55 ns (Automotive-E)
Min
Max
Min
Max
Unit
Read Cycle
tRC
Read cycle time
45
–
55
–
ns
tAA
Address to data valid
–
45
–
55
ns
tOHA
Data hold from address change
10
–
10
–
ns
tACE
CE LOW to data valid
–
45
–
55
ns
tDOE
OE LOW to data valid
–
22
–
25
ns
[19]
5
–
5
–
ns
–
18
–
20
ns
tLZOE
OE LOW to Low Z
tHZOE
[19, 20]
OE HIGH to High Z
[19]
tLZCE
CE LOW to Low Z
10
–
10
–
ns
tHZCE
CE HIGH to High Z [19, 20]
–
18
–
20
ns
tPU
CE LOW to power-up
0
–
0
–
ns
tPD
CE HIGH to power-down
–
45
–
55
ns
tDBE
BLE/BHE LOW to data valid
–
45
–
55
ns
tLZBE
BLE/BHE LOW to Low Z [19]
10
–
10
–
ns
–
18
–
20
ns
tHZBE
Write Cycle
BLE/BHE HIGH to High Z
[19, 20]
[21]
tWC
Write cycle time
45
–
55
–
ns
tSCE
CE LOW to write end
35
–
40
–
ns
tAW
Address setup to write end
35
–
40
–
ns
tHA
Address hold from write end
0
–
0
–
ns
tSA
Address setup to write start
0
–
0
–
ns
tPWE
WE pulse width
35
–
40
–
ns
tBW
BLE/BHE LOW to write end
35
–
40
–
ns
tSD
Data setup to write end
25
–
25
–
ns
tHD
Data hold from write end
0
–
0
tHZWE
WE LOW to High Z [19, 20]
–
18
–
20
ns
10
–
10
–
ns
tLZWE
WE HIGH to Low Z
[19]
ns
Notes
17. Test conditions for all parameters other than tri-state parameters assume signal transition time of 3 ns (1V/ns) or less, timing reference levels of VCC(typ)/2, input pulse
levels of 0 to VCC(typ), and output loading of the specified IOL/IOH as shown in the Figure 4 on page 6.
18. AC timing parameters are subject to byte enable signals (BHE or BLE) not switching when chip is disabled. See application note AN13842 for further clarification.
19. At any temperature and voltage condition, tHZCE is less than tLZCE, tHZBE is less than tLZBE, tHZOE is less than tLZOE, and tHZWE is less than tLZWE for any device.
20. tHZOE, tHZCE, tHZBE, and tHZWE transitions are measured when the outputs enter a high-impedance state.
21. The internal write time of the memory is defined by the overlap of WE, CE = VIL, BHE, BLE, or both = VIL. All signals must be active to initiate a write and any of these
signals can terminate a write by going inactive. The data input setup and hold timing must be referenced to the edge of the signal that terminates the write.
Document Number: 001-66256 Rev. *D
Page 8 of 18
CY62147EV30 MoBL® Automotive
Switching Waveforms
Figure 6. Read Cycle No. 1: Address Transition Controlled [22, 23]
tRC
ADDRESS
tOHA
DATA OUT
tAA
PREVIOUS DATA VALID
DATA VALID
Figure 7. Read Cycle No. 2: OE Controlled [23, 24, 25]
ADDRESS
tRC
CE
tPD
tHZCE
tACE
OE
tHZOE
tDOE
tLZOE
BHE/BLE
tHZBE
tDBE
tLZBE
DATA OUT
HIGHIMPEDANCE
HIGH
IMPEDANCE
DATA VALID
tLZCE
tPU
VCC
SUPPLY
CURRENT
50%
50%
ICC
ISB
Notes
22. The device is continuously selected. OE, CE = VIL, BHE, BLE, or both = VIL.
23. WE is HIGH for read cycle.
24. BGA packaged device is offered in single CE and dual CE options. In this datasheet, for a dual CE device, CE refers to the internal logical combination of CE1 and
CE2 such that when CE1 is LOW and CE2 is HIGH, CE is LOW. For all other cases CE is HIGH.
25. Address valid before or similar to CE and BHE, BLE transition LOW.
Document Number: 001-66256 Rev. *D
Page 9 of 18
CY62147EV30 MoBL® Automotive
Switching Waveforms (continued)
Figure 8. Write Cycle No. 1: WE Controlled [26, 27, 28, 29]
tWC
ADDRESS
tSCE
CE
tAW
tHA
tSA
tPWE
WE
tBW
BHE/BLE
OE
DATA I/O
tSD
tHD
DATAIN
NOTE 30
tHZOE
Figure 9. Write Cycle No. 2: CE Controlled [26, 27, 28, 29]
tWC
ADDRESS
tSCE
CE
tSA
tAW
tHA
tPWE
WE
tBW
BHE/BLE
OE
tSD
DATA I/O
tHD
DATAIN
NOTE 30
tHZOE
Notes
26. BGA packaged device is offered in single CE and dual CE options. In this datasheet, for a dual CE device, CE refers to the internal logical combination of CE1
and CE2 such that when CE1 is LOW and CE2 is HIGH, CE is LOW. For all other cases CE is HIGH.
27. The internal write time of the memory is defined by the overlap of WE, CE = VIL, BHE, BLE, or both = VIL. All signals must be active to initiate a write and any
of these signals can terminate a write by going inactive. The data input setup and hold timing must be referenced to the edge of the signal that terminates the write.
28. Data I/O is high impedance if OE = VIH.
29. If CE goes HIGH simultaneously with WE = VIH, the output remains in a high impedance state.
30. During this period, the I/Os are in output state. Do not apply input signals.
Document Number: 001-66256 Rev. *D
Page 10 of 18
CY62147EV30 MoBL® Automotive
Switching Waveforms (continued)
Figure 10. Write Cycle No. 3: WE Controlled, OE LOW [31, 32]
tWC
ADDRESS
tSCE
CE
tBW
BHE/BLE
tAW
tHA
tSA
WE
tPWE
tSD
DATA I/O
NOTE 33
tHD
DATAIN
tLZWE
tHZWE
Figure 11. Write Cycle No. 4: BHE/BLE Controlled, OE LOW [31, 32]
tWC
ADDRESS
CE
tSCE
tAW
tHA
tBW
BHE/BLE
tSA
tPWE
WE
tHZWE
DATA I/O
NOTE 33
tSD
tHD
DATAIN
tLZWE
Notes
31. BGA packaged device is offered in single CE and dual CE options. In this datasheet, for a dual CE device, CE refers to the internal logical combination of CE1 and
CE2 such that when CE1 is LOW and CE2 is HIGH, CE is LOW. For all other cases CE is HIGH.
32. If CE goes HIGH simultaneously with WE = VIH, the output remains in a high-impedance state.
33. During this period, the I/Os are in output state. Do not apply input signals.
Document Number: 001-66256 Rev. *D
Page 11 of 18
CY62147EV30 MoBL® Automotive
Truth Table
CE [34, 35]
WE
OE
BHE
BLE
H
X
X
X
X
High Z
Deselect/power-down Standby (ISB)
L
X
X
H
H
High Z
Deselect/power-down Standby (ISB)
L
H
L
L
L
Data out (I/O0–I/O15)
Read
Active (ICC)
L
H
L
H
L
Data out (I/O0–I/O7);
I/O8–I/O15 in High Z
Read
Active (ICC)
L
H
L
L
H
Data out (I/O8–I/O15);
I/O0–I/O7 in High Z
Read
Active (ICC)
L
H
H
L
L
High Z
Output disabled
Active (ICC)
L
H
H
H
L
High Z
Output disabled
Active (ICC)
L
H
H
L
H
High Z
Output disabled
Active (ICC)
L
L
X
L
L
Data in (I/O0–I/O15)
Write
Active (ICC)
L
L
X
H
L
Data in (I/O0–I/O7);
I/O8–I/O15 in High Z
Write
Active (ICC)
L
L
X
L
H
Data in (I/O8–I/O15);
I/O0–I/O7 in High Z
Write
Active (ICC)
I/Os
Mode
Power
Notes
34. BGA packaged device is offered in single CE and dual CE options. In this data sheet, for a dual CE device, CE refers to the internal logical combination of CE1 and
CE2 such that when CE1 is LOW and CE2 is HIGH, CE is LOW. For all other cases CE is HIGH.
35. For the Dual Chip Enable device, CE refers to the internal logical combination of CE1 and CE2 such that when CE1 is LOW and CE2 is HIGH, CE is LOW. For all
other cases CE is HIGH. Intermediate voltage levels is not permitted on any of the Chip Enable pins (CE for the Single Chip Enable device; CE1 and CE2 for the Dual
Chip Enable device).
Document Number: 001-66256 Rev. *D
Page 12 of 18
CY62147EV30 MoBL® Automotive
Ordering Information
Speed
(ns)
45
Ordering Code
CY62147EV30LL-45ZSXA
Package
Diagram
Package Type
51-85087 44-pin TSOP II (Pb-free)
Operating
Range
Automotive-A
Contact your local Cypress sales representative for availability of these parts.
Ordering Code Definitions
CY 621 4
7 E V30 LL - XX
XX X
X
Temperature Range: X = A
A = Automotive-A
Pb-free
Package type: XX = ZS
ZS = 48-pin TSOP II
Speed Grade: XX = 45 ns
Low-Power
Voltage Range: V30 = 3 V Typical
Process Technology: E = 90 nm
Bus Width: 7 = × 16
Density: 4 = 4-Mbit
Family Code: 621 = MoBL SRAM family
Company ID: CY = Cypress
Document Number: 001-66256 Rev. *D
Page 13 of 18
CY62147EV30 MoBL® Automotive
Package Diagrams
Figure 12. 48-ball VFBGA (6 × 8 × 1.0 mm) BV48/BZ48 Package Outline, 51-85150
51-85150 *H
Document Number: 001-66256 Rev. *D
Page 14 of 18
CY62147EV30 MoBL® Automotive
Package Diagrams (continued)
Figure 13. 44-pin TSOP Z44-II Package Outline, 51-85087
51-85087 *E
Document Number: 001-66256 Rev. *D
Page 15 of 18
CY62147EV30 MoBL® Automotive
Acronyms
Acronym
Document Conventions
Description
Units of Measure
CMOS
Complementary Metal Oxide Semiconductor
I/O
Input/Output
°C
degree Celsius
SRAM
Static Random Access Memory
MHz
megahertz
VFBGA
Very Fine-Pitch Ball Grid Array
A
microampere
Thin Small Outline Package
mA
milliampere
ns
nanosecond
ohm
pF
picofarad
V
volt
W
watt
TSOP
Document Number: 001-66256 Rev. *D
Symbol
Unit of Measure
Page 16 of 18
CY62147EV30 MoBL® Automotive
Document History Page
Document Title: CY62147EV30 MoBL® Automotive, 4-Mbit (256K × 16) Static RAM
Document Number: 001-66256
Rev.
ECN No.
Orig. of
Change
Submission
Date
Description of Change
**
3123973
RAME
01/31/2011
Created new datasheet for Automotive parts from document number 38-05440
Rev. *I
*A
3937956
MEMJ
03/19/2013
Updated Package Diagrams:
spec 51-85150 – Changed revision from *F to *H.
spec 51-85087 – Changed revision from *C to *E.
Completing Sunset Review.
*B
4725832
PSR
04/15/2015
Updated Functional Description:
Removed “For best practice recommendations, refer to the Cypress
application note AN1064, SRAM System Guidelines.” at the end.
Added “For a complete list of related resources, click here.” at the end.
Updated to new template.
*C
5221444
VINI
04/14/2016
Updated Thermal Resistance:
Updated details in “Test Conditions” column and updated all values in “VFBGA
Package” and “TSOP II Package” columns corresponding to JA and JC
parameters.
Updated to new template.
Completing Sunset Review.
*D
6049466
VINI
01/29/2018
Updated Ordering Information:
Updated part numbers.
Removed Note “This BGA package is offered with single chip enable.” and its
reference.
Removed Note “This BGA package is offered with dual chip enable.” and its
reference.
Updated Ordering Code Definitions.
Updated to new template.
Completing Sunset Review.
Document Number: 001-66256 Rev. *D
Page 17 of 18
CY62147EV30 MoBL® Automotive
Sales, Solutions, and Legal Information
Worldwide Sales and Design Support
Cypress maintains a worldwide network of offices, solution centers, manufacturer’s representatives, and distributors. To find the office
closest to you, visit us at Cypress Locations.
PSoC® Solutions
Products
Arm® Cortex® Microcontrollers
Automotive
cypress.com/arm
cypress.com/automotive
Clocks & Buffers
Interface
cypress.com/clocks
cypress.com/interface
Internet of Things
Memory
cypress.com/iot
cypress.com/memory
Microcontrollers
cypress.com/mcu
PSoC
cypress.com/psoc
Power Management ICs
Cypress Developer Community
Community | Projects | Video | Blogs | Training | Components
Technical Support
cypress.com/support
cypress.com/pmic
Touch Sensing
cypress.com/touch
USB Controllers
Wireless Connectivity
PSoC 1 | PSoC 3 | PSoC 4 | PSoC 5LP | PSoC 6 MCU
cypress.com/usb
cypress.com/wireless
© Cypress Semiconductor Corporation, 2011-2018. This document is the property of Cypress Semiconductor Corporation and its subsidiaries, including Spansion LLC ("Cypress"). This document,
including any software or firmware included or referenced in this document ("Software"), is owned by Cypress under the intellectual property laws and treaties of the United States and other countries
worldwide. Cypress reserves all rights under such laws and treaties and does not, except as specifically stated in this paragraph, grant any license under its patents, copyrights, trademarks, or other
intellectual property rights. If the Software is not accompanied by a license agreement and you do not otherwise have a written agreement with Cypress governing the use of the Software, then Cypress
hereby grants you a personal, non-exclusive, nontransferable license (without the right to sublicense) (1) under its copyright rights in the Software (a) for Software provided in source code form, to
modify and reproduce the Software solely for use with Cypress hardware products, only internally within your organization, and (b) to distribute the Software in binary code form externally to end users
(either directly or indirectly through resellers and distributors), solely for use on Cypress hardware product units, and (2) under those claims of Cypress's patents that are infringed by the Software (as
provided by Cypress, unmodified) to make, use, distribute, and import the Software solely for use with Cypress hardware products. Any other use, reproduction, modification, translation, or compilation
of the Software is prohibited.
TO THE EXTENT PERMITTED BY APPLICABLE LAW, CYPRESS MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS DOCUMENT OR ANY SOFTWARE
OR ACCOMPANYING HARDWARE, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. To the extent
permitted by applicable law, Cypress reserves the right to make changes to this document without further notice. Cypress does not assume any liability arising out of the application or use of any
product or circuit described in this document. Any information provided in this document, including any sample design information or programming code, is provided only for reference purposes. It is
the responsibility of the user of this document to properly design, program, and test the functionality and safety of any application made of this information and any resulting product. Cypress products
are not designed, intended, or authorized for use as critical components in systems designed or intended for the operation of weapons, weapons systems, nuclear installations, life-support devices or
systems, other medical devices or systems (including resuscitation equipment and surgical implants), pollution control or hazardous substances management, or other uses where the failure of the
device or system could cause personal injury, death, or property damage ("Unintended Uses"). A critical component is any component of a device or system whose failure to perform can be reasonably
expected to cause the failure of the device or system, or to affect its safety or effectiveness. Cypress is not liable, in whole or in part, and you shall and hereby do release Cypress from any claim,
damage, or other liability arising from or related to all Unintended Uses of Cypress products. You shall indemnify and hold Cypress harmless from and against all claims, costs, damages, and other
liabilities, including claims for personal injury or death, arising from or related to any Unintended Uses of Cypress products.
Cypress, the Cypress logo, Spansion, the Spansion logo, and combinations thereof, WICED, PSoC, CapSense, EZ-USB, F-RAM, and Traveo are trademarks or registered trademarks of Cypress in
the United States and other countries. For a more complete list of Cypress trademarks, visit cypress.com. Other names and brands may be claimed as property of their respective owners.
Document Number: 001-66256 Rev. *D
Revised January 29, 2018
MoBL is a registered trademark, and More Battery Life is a trademark of Cypress Semiconductor Corporation.
Page 18 of 18
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