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CY62148ESL-55ZAXA

CY62148ESL-55ZAXA

  • 厂商:

    CYPRESS(赛普拉斯)

  • 封装:

    TFSOP32

  • 描述:

    STANDARD SRAM, 512KX8, 55NS PDSO

  • 数据手册
  • 价格&库存
CY62148ESL-55ZAXA 数据手册
CY62148ESL MoBL® 4-Mbit (512 K × 8) Static RAM 4-Mbit (512 K × 8) Static RAM Features ■ ■ ■ Functional Description The CY62148ESL is a high performance CMOS static RAM organized as 512 K words by 8-bits. This device features advanced circuit design to provide ultra low active current. This is ideal for providing More Battery Life™ (MoBL) in portable applications such as cellular telephones. The device also has an automatic power-down feature that significantly reduces power consumption. Placing the device in standby mode reduces power consumption by more than 99 percent when deselected (CE HIGH). The eight input and output pins (I/O0 through I/O7) are placed in a high impedance state when the device is deselected (CE HIGH), the outputs are disabled (OE HIGH), or during a write operation (CE LOW and WE LOW). To write to the device, take Chip Enable (CE) and Write Enable (WE) inputs LOW. Data on the eight I/O pins (I/O0 through I/O7) is then written into the location specified on the address pins (A0 through A18). To read from the device, take Chip Enable (CE) and Output Enable (OE) LOW while forcing Write Enable (WE) HIGH. Under these conditions, the contents of the memory location specified by the address pins appear on the I/O pins. Higher speed up to 55 ns Wide voltage range: 2.2 V to 3.6 V and 4.5 V to 5.5 V Ultra low standby power ❐ Typical standby current: 1 µA ❐ Maximum standby current: 7 µA Ultra low active power ❐ Typical active current: 2 mA at f = 1 MHz Easy memory expansion with CE and OE features Automatic power-down when deselected Complementary metal oxide semiconductor (CMOS) for optimum speed and power Available in Pb-free 32-Pin shrunk thin small outline package (STSOP) package ■ ■ ■ ■ ■ Logic Block Diagram A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 CE WE OE INPUT BUFFER ROW DECODER I/O IO00 I/O IO11 SENSE AMPS I/O IO22 I/O IO33 I/O IO4 4 I/O IO55 I/O IO66 I/O 512K x 8 ARRAY COLUMN DECODER POWER DOWN IO77 A13 A14 A15 A16 A17 A18 Cypress Semiconductor Corporation Document #: 001-50045 Rev. *D • 198 Champion Court • San Jose, CA 95134-1709 • 408-943-2600 Revised June 29, 2011 CY62148ESL MoBL® Contents Features ............................................................................. 1 Functional Description ..................................................... 1 Pin Configuration ............................................................. 3 Product Portfolio .............................................................. 3 Maximum Ratings ............................................................. 4 Operating Range ............................................................... 4 Electrical Characteristics ................................................. 4 Capacitance ...................................................................... 5 Thermal Resistance .......................................................... 5 Data Retention Characteristics ....................................... 6 Switching Characteristics ................................................ 7 Switching Waveforms ...................................................... 8 Truth Table ........................................................................ 9 Ordering Information ...................................................... 10 Ordering Code Definitions ............................................. 10 Package Diagram ............................................................ 11 Acronyms ........................................................................ 12 Document Conventions ................................................. 12 Units of Measure ....................................................... 12 Document History Page ................................................. 13 Sales, Solutions, and Legal Information ...................... 14 Worldwide Sales and Design Support ....................... 14 Products .................................................................... 14 PSoC Solutions ......................................................... 14 Document #: 001-50045 Rev. *D Page 2 of 14 CY62148ESL MoBL® Pin Configuration Figure 1. 32-Pin STSOP (Top View) A11 A9 A8 A13 WE A17 A15 VCC A18 A16 A14 A12 A7 A6 A5 A4 25 26 27 28 29 30 31 32 1 2 3 4 5 6 7 8 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 OE A10 CE I/O7 I/O6 I/O5 I/O4 I/O3 GND I/O2 I/O1 I/O0 A0 A1 A2 A3 STSOP Top View (not to scale) Product Portfolio Power Dissipation Product Range VCC Range (V)[1] Speed (ns) Operating ICC, (mA) f = 1 MHz Typ[2] CY62148ESL Industrial/ 2.2 V to 3.6 V and 4.5 V to 5.5 V Automotive-A 55 2 Max 2.5 f = fmax Typ[2] 15 Max 20 Standby, ISB2 (µA) Typ[2] 1 Max 7 Notes 1. Datasheet specifications are not guaranteed for VCC in the range of 3.6 V to 4.5 V. 2. Typical values are included for reference only and are not guaranteed or tested. Typical values are measured at VCC = VCC(typ), TA = 25 °C. Document #: 001-50045 Rev. *D Page 3 of 14 CY62148ESL MoBL® Maximum Ratings Exceeding maximum ratings may shorten the useful life of the device. User guidelines are not tested. Storage temperature ................................. –65 °C to +150 °C Ambient temperature with power applied.... 55 °C to +125 °C Supply voltage to ground potential................. –0.5 V to 6.0 V DC voltage applied to outputs in high Z state [3, 4] ......................................... –0.5 V to 6.0 V DC input voltage [3, 4] ..................................... –0.5 V to 6.0 V Output current into outputs (low)..................................20 mA Static discharge voltage .......................................... > 2001 V (MIL-STD-883, Method 3015) Latch-up current......................................................> 200 mA Operating Range Device CY62148ESL Range Ambient Temperature VCC[5] Industrial/ –40 °C to +85 °C 2.2 V to 3.6 V, Automotive-A and 4.5 V to 5.5 V Electrical Characteristics Over the operating range Parameter VOH Description Output HIGH voltage 2.2 < VCC < 2.7 2.7 < VCC < 3.6 4.5 < VCC < 5.5 VOL Output LOW voltage 2.2 < VCC < 2.7 2.7 < VCC < 3.6 4.5 < VCC < 5.5 VIH Input HIGH voltage 2.2 < VCC < 2.7 2.7 < VCC < 3.6 4.5 < VCC < 5.5 VIL [7] Test Conditions IOH = –0.1 mA IOH = –1.0 mA IOH = –1.0 mA IOL = 0.1 mA IOL = 2.1 mA IOL = 2.1 mA 55 ns (Industrial/Automotive-A) Min 2.0 2.4 2.4 – – – 1.8 2.2 2.2 –0.3 –0.3 –0.5 –1 –1 – – – – – – 1 7 Typ[6] – – – – – – – – – – – – – – 15 2 1 Max – – – 0.4 0.4 0.4 VCC + 0.3 VCC + 0.3 VCC + 0.5 0.4 0.6 0.6 +1 +1 20 2.5 7 Unit V V V Input LOW voltage 2.2 < VCC < 2.7 2.7 < VCC < 3.6 4.5 < VCC < 5.5 V IIX IOZ ICC ISB1[8] Input leakage current VCC operating supply current GND < VI < VCC f = fmax = 1/tRC f = 1 MHz VCC = VCCmax IOUT = 0 mA, CMOS levels µA µA Output leakage current GND < VO < VCC, output disabled mA µA ISB2[8] Automatic CE CE > VCC –0.2 V, VIN > VCC – 0.2 V or VIN < 0.2 V, power-down current — f = fmax (address and data only), f = 0 (OE and WE), CMOS inputs VCC = VCC(max) Automatic CE CE > VCC – 0.2 V, VIN > VCC – 0.2 V or VIN < 0.2 V, power-down current — f = 0, VCC = VCC(max) CMOS inputs µA Notes 3. VIL(min) = –2.0 V for pulse durations less than 20 ns. 4. VIH(max) = VCC + 0.75 V for pulse durations less than 20 ns. 5. Full device AC operation assumes a minimum of 100 µs ramp time from 0 to VCC (min) and 200 µs wait time after VCC stabilization. 6. Typical values are included for reference and are not guaranteed or tested. Typical values are measured at VCC = VCC(typ), TA = 25 °C. 7. Under DC conditions the device meets a VIL of 0.8 V (for VCC range of 2.7 V to 3.6 V and 4.5 V to 5.5 V) and 0.6 V (for VCC range of 2.2 V to 2.7 V). However, in dynamic conditions Input LOW voltage applied to the device must not be higher than 0.6 V and 0.4 V for the above ranges. Refer to AN13470 for details. 8. Chip enable (CE) must be HIGH at CMOS level to meet the ISB1 / ISB2 / ICCDR spec. Other inputs can be left floating. Document #: 001-50045 Rev. *D Page 4 of 14 CY62148ESL MoBL® Capacitance Parameter [9] CIN COUT Description Input capacitance Output capacitance Test Conditions TA = 25 °C, f = 1 MHz, VCC = VCC(Typ) Max 10 10 Unit pF pF Thermal Resistance Parameter [9] JA JC Description Thermal resistance (junction to ambient) Thermal resistance (junction to case) Figure 2. AC Test Loads and Waveforms R1 VCC OUTPUT 30 pF INCLUDING JIG AND SCOPE R2 VCC GND Rise Time = 1 V/ns 10% ALL INPUT PULSES 90% 90% 10% Fall Time = 1 V/ns Test Conditions Still air, soldered on a 3 × 4.5 inch, two-layer printed circuit board STSOP 49.02 14.07 Unit C/W C/W Equivalent to: THEVENIN EQUIVALENT RTH OUTPUT V Parameter R1 R2 RTH VTH 2.5 V 16667 15385 8000 1.20 3.0 V 1103 1554 645 1.75 5.0 V 1800 990 639 1.77 Unit    V Notes 9. Tested initially and after any design or process changes that may affect these parameters. Document #: 001-50045 Rev. *D Page 5 of 14 CY62148ESL MoBL® Data Retention Characteristics Over the operating range Parameter VDR ICCDR tCDR tR [12] [11] Description VCC for data retention Data retention current Chip deselect to data retention time Operation recovery time Conditions Min 1.5 Typ[10] – 1 – – Max – 7 – – Unit V µA ns ns CE > VCC – 0.2 V, VIN > VCC – 0.2 V or Industrial/ VIN < 0.2 V, VCC = 1.5 V Automotive-A – 0 55 Figure 3. Data Retention Waveform DATA RETENTION MODE VCC VCC(min) tCDR VDR > 1.5 V VCC(min) tR CE Notes 10. Typical values are included for reference only and are not guaranteed or tested. Typical values are measured at VCC = VCC(typ), TA = 25 °C. 11. Chip enable (CE) must be HIGH at CMOS level to meet the ISB1 / ISB2 / ICCDR spec. Other inputs can be left floating. 12. Full device operation requires linear VCC ramp from VDR to VCC(min) > 100 µs or stable at VCC(min) > 100 µs. Document #: 001-50045 Rev. *D Page 6 of 14 CY62148ESL MoBL® Switching Characteristics Over the operating range Parameter [13] Description Read Cycle tRC tAA tOHA tACE tDOE tLZOE tHZOE tLZCE tHZCE tPU tPD tWC tSCE tAW tHA tSA tPWE tSD tHD tHZWE tLZWE Read cycle time Address to data valid Data hold from address change CE LOW to data valid OE LOW to data valid OE LOW to low Z [14] [14, 15] 55 ns (Industrial/Automotive-A) Min Max Unit 55 – 10 – – 5 – 10 – 0 – Write Cycle [16] – 55 – 55 25 – 20 – 20 – 55 ns ns ns ns ns ns ns ns ns ns ns OE HIGH to high Z CE LOW to low Z [14] [14, 15] CE HIGH to high Z CE LOW to power-up CE HIGH to power-up Write cycle time CE LOW to write end Address setup to write end Address hold from write end Address setup to write start WE pulse width Data setup to write end Data hold from write end WE LOW to high Z WE HIGH to low Z [14, 15] [14] 55 40 40 0 0 40 25 0 – 10 – – – – – – – – 20 – ns ns ns ns ns ns ns ns ns ns Notes 13. Test conditions for all parameters other than tri-state parameters assume signal transition time of 3 ns or less (1 V/ns), timing reference levels of VCC(typ)/2, input pulse levels of 0 to VCC(typ), and output loading of the specified IOL/IOH as shown in AC Test Loads and Waveforms on page 5. 14. At any temperature and voltage condition, tHZCE is less than tLZCE, tHZOE is less than tLZOE, and tHZWE is less than tLZWE for any device. 15. tHZOE, tHZCE, and tHZWE transitions are measured when the output enter a high impedance state. 16. The internal write time of the memory is defined by the overlap of WE, CE = VIL. All signals must be ACTIVE to initiate a write and any of these signals can terminate a write by going INACTIVE. The data input setup and hold timing must be referenced to the edge of the signal that terminates the write. Document #: 001-50045 Rev. *D Page 7 of 14 CY62148ESL MoBL® Switching Waveforms Figure 4. Read Cycle No. 1 (Address Transition Controlled) [17, 18] tRC RC ADDRESS tAA tOHA DATA OUT PREVIOUS DATA VALID DATA VALID Figure 5. Read Cycle No. 2 (OE Controlled) [18, 19] ADDRESS tRC CE tACE OE tDOE tLZOE HIGH IMPEDANCE DATA OUT tLZCE VCC SUPPLY CURRENT tPU 50% tHZOE tHZCE DATA VALID tPD 50% ISB ICC HIGH IMPEDANCE Figure 6. Write Cycle No. 1 (WE Controlled, OE HIGH During Write) [20, 21] tWC ADDRESS tSCE CE tAW tSA WE tPWE tHA OE tSD DATA I/O NOTE 22 tHZOE Notes 17. Device is continuously selected. OE, CE = VIL. 18. WE is HIGH for read cycles. 19. Address valid before or similar to CE transition LOW. 20. Data I/O is high impedance if OE = VIH. 21. If CE goes HIGH simultaneously with WE HIGH, the output remains in high impedance state. 22. During this period, the I/Os are in output state. Do not apply input signals. tHD DATA VALID Document #: 001-50045 Rev. *D Page 8 of 14 CY62148ESL MoBL® Switching Waveforms (continued) Figure 7. Write Cycle No. 2 (CE Controlled) [23, 24] tWC ADDRESS tSCE tSA tAW tPWE WE tSD DATA I/O DATA VALID tHD tHA CE Figure 8. Write Cycle No. 3 (WE Controlled, OE LOW) [24] tWC ADDRESS tSCE CE tAW tSA WE tSD DATA I/O NOTE 25 tHZWE DATA VALID tPWE tHA tHD tLZWE Truth Table CE H[26] L L L WE X H H L OE X L H X I/O High Z Data out High Z Data in Mode Deselect/power-down Read Output disabled Write Standby (ISB) Active (ICC) Active (ICC) Active (ICC) Power Notes 23. Data I/O is high impedance if OE = VIH. 24. If CE goes HIGH simultaneously with WE HIGH, the output remains in high impedance state. 25. During this period, the I/Os are in output state. Do not apply input signals. 26. Chip enable (CE) must be HIGH at CMOS level to meet the ISB1/ ISB2 / ICCDR spec. Other inputs can be left floating. Document #: 001-50045 Rev. *D Page 9 of 14 CY62148ESL MoBL® Ordering Information Table 1 lists the CY62148ESL MoBL key package features and ordering codes. The table contains only the parts that are currently available. If you do not see what you are looking for, contact your local sales representative. For more information, visit the Cypress website at www.cypress.com and refer to the product summary page at http://www.cypress.com/products. Table 1. Key features and Ordering Information Speed (ns) 55 Ordering Code CY62148ESL-55ZAXI CY62148ESL-55ZAXA Package Diagram Package Type Operating Range Industrial Automotive-A 51-85094 32-Pin STSOP (Pb-free) 51-85094 32-Pin STSOP (Pb-free) Ordering Code Definitions CY 621 4 8 E SL 55 ZAX I/A Temperature grades: I = Industrial A = Automotive-A 32-Pin STSOP (Pb-free) Speed grade (55 ns) SL = Wide Voltage Range (3 V Typical; 5 V Typical) Process technology: 90-nm Bus Width = x8 Density = 4 Mbit Family: Low power SRAM Company ID: CY = Cypress Document #: 001-50045 Rev. *D Page 10 of 14 CY62148ESL MoBL® Package Diagram Figure 9. 32-Pin Shrunk Thin Small Outline Package (8 mm × 13.4 mm), 51-85094 51-85094 *F Document #: 001-50045 Rev. *D Page 11 of 14 CY62148ESL MoBL® Acronyms Acronym BHE BLE CE CMOS I/O OE SRAM TSOP VFBGA WE Description byte high enable byte low enable chip enable complementary metal oxide semiconductor input/output output enable static random access memory thin small outline package very fine ball gird array write enable Document Conventions Units of Measure Symbol °C A mA MHz ns pF V  W Unit of Measure degrees Celsius microampere milliampere megahertz nanosecond picofarad volts ohms watts Document #: 001-50045 Rev. *D Page 12 of 14 CY62148ESL MoBL® Document History Page Document Title: CY62148ESL MoBL® 4-Mbit (512 K × 8) Static RAM Document Number: 001-50045 Revision ** *A *B ECN 2612938 2800124 2947039 Orig. of Change VKN/PYRS VKN VKN Submission Date 01/21/09 New datasheet Description of Change 11/06/2009 Included Automotive-A information 06/10/2010 Added footnote related to chip enable in Truth Table Added footnote for the ISB2 parameter in Electrical Characteristics Updated Package Diagram Updated links in Sales, Solutions, and Legal Information 08/23/10 Template update. Updated table of contents. Added acronyms, units of measure and ordering code definitions. Added reference to note 8 to parameter ISB1on page 4 under Electrical characterisitics table. Added reference to note 11 to parameter ICCDR on page 6 under data retention characteristics table. Removed reference to AN1064 SRAM system guidelines. Updated Ordering Code Definitions. Updated Package Diagram to latest revision. *C 3006318 AJU *D 3296704 RAME 06/29/11 Document #: 001-50045 Rev. *D Page 13 of 14 CY62148ESL MoBL® Sales, Solutions, and Legal Information Worldwide Sales and Design Support Cypress maintains a worldwide network of offices, solution centers, manufacturer’s representatives, and distributors. To find the office closest to you, visit us at Cypress Locations. Products Automotive Clocks & Buffers Interface Lighting & Power Control Memory Optical & Image Sensing PSoC Touch Sensing USB Controllers Wireless/RF cypress.com/go/automotive cypress.com/go/clocks cypress.com/go/interface cypress.com/go/powerpsoc cypress.com/go/plc cypress.com/go/memory cypress.com/go/image cypress.com/go/psoc cypress.com/go/touch cypress.com/go/USB cypress.com/go/wireless PSoC Solutions psoc.cypress.com/solutions PSoC 1 | PSoC 3 | PSoC 5 © Cypress Semiconductor Corporation, 2009-2011. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be used for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress. Furthermore, Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges. Any Source Code (software and/or firmware) is owned by Cypress Semiconductor Corporation (Cypress) and is protected by and subject to worldwide patent protection (United States and foreign), United States copyright laws and international treaty provisions. Cypress hereby grants to licensee a personal, non-exclusive, non-transferable license to copy, use, modify, create derivative works of, and compile the Cypress Source Code and derivative works for the sole purpose of creating custom software and or firmware in support of licensee product to be used only in conjunction with a Cypress integrated circuit as specified in the applicable agreement. Any reproduction, modification, translation, compilation, or representation of this Source Code except as specified above is prohibited without the express written permission of Cypress. Disclaimer: CYPRESS MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS MATERIAL, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. Cypress reserves the right to make changes without further notice to the materials described herein. Cypress does not assume any liability arising out of the application or use of any product or circuit described herein. Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress’ product in a life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges. Use may be limited by and subject to the applicable Cypress software license agreement. Document #: 001-50045 Rev. *D Revised June 29, 2011 Page 14 of 14 MoBL is the registered trademark, and More Battery Life is the trademark of Cypress Semiconductor Corporation. All other product and company names mentioned in this document are the trademarks of their respective holders.
CY62148ESL-55ZAXA 价格&库存

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