CY62148EV30LL-55ZSXE

CY62148EV30LL Automotive 4-Mbit (512 K × 8) Static RAM 4-Mbit (512 K × 8) Static RAM Features Functional Description ■ Very high speed: 55 ns ❐ Wide voltage range: 2.20 V to 3.60 V The CY62148EV30LL Automotive is a high performance CMOS static RAM organized as 512 K words by 8 bits. This device features advanced circuit design to provide ultra low active current. This is ideal for providing More Battery Life™ (MoBL) in portable applications such as cellular telephones. The device also has an automatic power down feature that significantly reduces power consumption. Placing the device into standby mode reduces power consumption by more than 99 percent when deselected (CE HIGH). The eight input and output pins (I/O0 through I/O7) are placed in a high impedance state when the device is deselected (CE HIGH), the outputs are disabled (OE HIGH), or during a write operation (CE LOW and WE LOW). ■ Temperature range: ❐ Automotive-E: –40 °C to +125 °C ■ Pin compatible with CY62148DV30 ■ Ultra low standby power ❐ Typical standby current: 3 A ❐ Maximum standby current: 20 A ■ Ultra low active power ❐ Typical active current: 2 mA at f = 1 MHz ■ Easy memory expansion with CE and OE features ■ Automatic power down when deselected ■ Complementary metal oxide semiconductor (CMOS) for optimum speed and power ■ Available in Pb-free, 32-pin thin small outline package (TSOP II). To write to the device, take Chip Enable (CE) and Write Enable (WE) inputs LOW. Data on the eight I/O pins (I/O0 through I/O7) is then written into the location specified on the address pins (A0 through A18). To read from the device, take Chip Enable (CE) and Output Enable (OE) LOW while forcing Write Enable (WE) HIGH. Under these conditions, the contents of the memory location specified by the address pins appear on the I/O pins. For a complete list of related documentation, click here. Logic Block Diagram I/O0 IO0 INPUT BUFFER IO1 IO2 SENSE AMPS 512K x 8 ARRAY I/O3 IO3 I/O4 IO4 I/O5 IO5 I/O6 IO6 CE • I/O7 IO7 POWER DOWN A17 A18 A15 A13 A14 OE A16 COLUMN DECODER WE Cypress Semiconductor Corporation Document Number: 001-73042 Rev. *E I/O1 I/O2 ROW DECODER A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 198 Champion Court • San Jose, CA 95134-1709 • 408-943-2600 Revised January 4, 2018 CY62148EV30LL Automotive Contents Pin Configuration ............................................................. 3 Product Portfolio .............................................................. 3 Maximum Ratings ............................................................. 4 Operating Range ............................................................... 4 Electrical Characteristics ................................................. 4 Capacitance ...................................................................... 5 Thermal Resistance .......................................................... 5 AC Test Loads and Waveforms ....................................... 5 Data Retention Characteristics ....................................... 6 Data Retention Waveform ................................................ 6 Switching Characteristics ................................................ 7 Switching Waveforms ...................................................... 8 Truth Table ...................................................................... 11 Document Number: 001-73042 Rev. *E Ordering Information ...................................................... 12 Ordering Code Definitions ......................................... 12 Package Diagrams .......................................................... 13 Acronyms ........................................................................ 14 Document Conventions ................................................. 14 Units of Measure ....................................................... 14 Document History Page ................................................. 15 Sales, Solutions, and Legal Information ...................... 16 Worldwide Sales and Design Support ....................... 16 Products .................................................................... 16 PSoC® Solutions ...................................................... 16 Cypress Developer Community ................................. 16 Technical Support ..................................................... 16 Page 2 of 16 CY62148EV30LL Automotive Pin Configuration Figure 1. 32-pin TSOP II pinout (Top View) [1] A17 A16 A14 A12 A7 A6 A5 A4 A3 A2 A1 A0 I/O0 I/O1 I/O2 VSS 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 VCC A15 A18 WE A13 A8 A9 A11 OE A10 CE I/O7 I/O6 I/O5 I/O4 I/O3 Product Portfolio Power Dissipation Product Range VCC Range (V) Min CY62148EV30LL TSOP II Automotive-E 2.2 Speed (ns) Typ [2] Max 3.0 3.6 Operating ICC (mA) f = 1 MHz f = fmax Standby ISB2 (µA) Typ [2] Max Typ [2] Max Typ [2] Max 55 2 3 15 30 3 20 Notes 1. NC pins are not connected on the die. 2. Typical values are included for reference only and are not guaranteed or tested. Typical values are measured at VCC = VCC(typ), TA = 25 °C. Document Number: 001-73042 Rev. *E Page 3 of 16 CY62148EV30LL Automotive DC input voltage [3, 4] ...................–0.3 V to VCC(max) + 0.3 V Maximum Ratings Exceeding the maximum ratings may shorten the useful life of the device. These user guidelines are not tested. Storage temperature ................................ –65 °C to +150 °C Ambient temperature with power applied ..................................... 55 °C to +125 °C Supply voltage to ground potential .......................–0.3 V to VCC(max) + 0.3 V DC voltage applied to outputs in High-Z State [3, 4] .....................–0.3 V to VCC(max) + 0.3 V Output current into outputs (LOW) ............................. 20 mA Static discharge voltage (MIL-STD-883, Method 3015) ................................ > 2001 V Latch up current ..................................................... > 200 mA Operating Range Product Range Ambient Temperature VCC[5] CY62148EV30LL Automotive-E –40 °C to +125 °C 2.2 V to Automotive 3.6 V Electrical Characteristics Over the Operating Range Parameter Description Output high voltage VOH VOL Output low voltage VIH Input high voltage Test Conditions –55 Unit Min Typ [6] Max IOH = –0.1 mA 2.0 – – V IOH = –1.0 mA, VCC > 2.70 V 2.4 – – V – – 0.4 V IOL = 0.1 mA IOL = 2.1 mA, VCC > 2.70 V – – 0.4 V VCC = 2.2 V to 2.7 V 1.8 – VCC + 0.3 V V VCC= 2.7 V to 3.6 V 2.2 – VCC + 0.3 V V VCC = 2.2 V to 2.7 V –0.3 – 0.6 V VCC = 2.7 V to 3.6 V VIL Input low voltage –0.3 – 0.8 V IIX Input leakage current GND < VIN < VCC –5 – +5 A IOZ Output leakage current GND < VO < VCC, Output disabled –5 – +5 A ICC VCC operating supply current f = fmax = 1/tRC – 15 30 mA – 2 3 – 3 20 A – 3 20 A f = 1 MHz ISB1 [7] Automatic CE power down current – CMOS inputs VCC = VCC(max), IOUT = 0 mA, CMOS levels CE > VCC – 0.2 V, VIN > VCC – 0.2 V, VIN < 0.2 V, f = fmax (Address and Data Only), f = 0 (OE and WE), VCC = 3.60 V ISB2 [7] Automatic CE power down current – CMOS inputs CE > VCC – 0.2 V, VIN > VCC – 0.2 V or VIN < 0.2 V, f = 0, VCC = 3.60 V Notes 3. VIL(min) = –2.0V for pulse durations less than 20 ns. 4. VIH(max) = VCC + 0.75 V for pulse durations less than 20 ns. 5. Full device AC operation assumes a minimum of 100 s ramp time from 0 to VCC(min) and 200 s wait time after VCC stabilization. 6. Typical values are included for reference only and are not guaranteed or tested. Typical values are measured at VCC = VCC(typ), TA = 25 °C. 7. Chip Enable (CE) must be HIGH at CMOS level to meet the ISB1 / ISB2 / ICCDR spec. Other inputs can be left floating. Document Number: 001-73042 Rev. *E Page 4 of 16 CY62148EV30LL Automotive Capacitance Parameter [8] Description CIN Input capacitance COUT Output capacitance Test Conditions Max Unit 10 pF 10 pF Test Conditions TSOP II Package Unit Still air, soldered on a 3 × 4.5 inch, four-layer printed circuit board 79.03 C/W 17.44 C/W TA = 25 °C, f = 1 MHz, VCC = VCC(typ) Thermal Resistance Parameter [8] Description JA Thermal resistance (junction to ambient) JC Thermal resistance (junction to case) AC Test Loads and Waveforms Figure 2. AC Test Loads and Waveforms R1 VCC OUTPUT ALL INPUT PULSES V CC 30 pF INCLUDING JIG AND SCOPE 90% 10% GND Rise Time = 1 V/ns R2 Equivalent to: 90% 10% Fall Time = 1 V/ns THEVENIN EQUIVALENT OUTPUT RTH V Parameters 2.50 V 3.0 V Unit R1 16667 1103  R2 15385 1554  RTH 8000 645  VTH 1.20 1.75 V Note 8. Tested initially and after any design or process changes that may affect these parameters. Document Number: 001-73042 Rev. *E Page 5 of 16 CY62148EV30LL Automotive Data Retention Characteristics Over the Operating Range Parameter Conditions VCC for data retention VDR ICCDR Description [10] Data retention current VCC = 1.5 V, Automotive-E Min Typ [9] Max Unit 1.5 – – V – 3 20 A CE > VCC – 0.2 V, VIN > VCC – 0.2 V or VIN < 0.2 V tCDR[11] Chip deselect to data retention time 0 – – ns tR[12] Operation recovery time 55 – – – Data Retention Waveform Figure 3. Data Retention Waveform DATA RETENTION MODE VCC VCC(min) VDR > 1.5 V VCC(min) tCDR tR CE Notes 9. Typical values are included for reference only and are not guaranteed or tested. Typical values are measured at VCC = VCC(typ), TA = 25 °C. 10. Chip Enable (CE) must be HIGH at CMOS level to meet the ISB1 / ISB2 / ICCDR spec. Other inputs can be left floating. 11. Tested initially and after any design or process changes that may affect these parameters. 12. Full device AC operation requires linear VCC ramp from VDR to VCC(min) > 100 s or stable at VCC(min) > 100 s. Document Number: 001-73042 Rev. *E Page 6 of 16 CY62148EV30LL Automotive Switching Characteristics Over the Operating Range Parameter [13] Description -55 Min Max Unit Read Cycle tRC Read cycle time 55 – ns tAA Address to data valid – 55 ns tOHA Data hold from address change 10 – ns tACE CE LOW to data valid – 55 ns tDOE OE LOW to data valid – 25 ns [14] 5 – ns – 20 ns tLZOE OE LOW to Low Z tHZOE OE HIGH to High Z [14, 15] [14] tLZCE CE LOW to Low Z 10 – ns tHZCE CE HIGH to High Z [14, 15] – 20 ns tPU CE LOW to power up 0 – ns CE HIGH to power up – 55 ns tWC Write cycle time 55 – ns tSCE CE LOW to write end 40 – ns tAW Address setup to write end 40 – ns tHA Address hold from write end 0 – ns tSA Address setup to write start 0 – ns tPWE WE pulse width 40 – ns tSD Data setup to write end 25 – ns tHD Data hold from write end 0 – ns tHZWE WE LOW to High Z [14, 15] – 20 ns 10 – ns tPD Write Cycle tLZWE [16] WE HIGH to Low Z [14] Notes 13. Test Conditions for all parameters other than tri-state parameters assume signal transition time of 3 ns or less (1 V/ns), timing reference levels of VCC(typ)/2, input pulse levels of 0 to VCC(typ), and output loading of the specified IOL/IOH as shown in the Figure 2 on page 5. 14. At any given temperature and voltage condition, tHZCE is less than tLZCE, tHZOE is less than tLZOE, and tHZWE is less than tLZWE for any given device. 15. tHZOE, tHZCE, and tHZWE transitions are measured when the output enter a high impedance state. 16. The internal write time of the memory is defined by the overlap of WE, CE = VIL. All signals must be ACTIVE to initiate a write and any of these signals can terminate a write by going INACTIVE. The data input setup and hold timing must be referenced to the edge of the signal that terminates the write. Document Number: 001-73042 Rev. *E Page 7 of 16 CY62148EV30LL Automotive Switching Waveforms Figure 4. Read Cycle No. 1 (Address Transition Controlled) [17, 18] tRC RC ADDRESS tOHA DATA I/O tAA PREVIOUS DATA VALID DATA OUT VALID Figure 5. Read Cycle No. 2 (OE Controlled) [18, 19] ADDRESS tRC CE tACE OE tHZOE tDOE tLZOE HIGH IMPEDANCE DATA I/O VCC SUPPLY CURRENT tLZCE tHZCE HIGH IMPEDANCE DATA OUT VALID tPD tPU 50% 50% ICC ISB Notes 17. Device is continuously selected. OE, CE = VIL. 18. WE is HIGH for read cycles. 19. Address valid before or similar to CE transition LOW. Document Number: 001-73042 Rev. *E Page 8 of 16 CY62148EV30LL Automotive Switching Waveforms (continued) Figure 6. Write Cycle No. 1 (WE Controlled, OE HIGH During Write) [20, 21] tWC ADDRESS tSCE CE tAW tSA tHA tPWE WE OE tSD DATA I/O NOTE 22 tHD DATA IN VALID tHZOE Notes 20. Data I/O is high impedance if OE = VIH. 21. If CE goes HIGH simultaneously with WE HIGH, the output remains in high impedance state. 22. During this period, the I/Os are in output state. Do not apply input signals. Document Number: 001-73042 Rev. *E Page 9 of 16 CY62148EV30LL Automotive Switching Waveforms (continued) Figure 7. Write Cycle No. 2 (CE Controlled) [23, 24] tWC ADDRESS tSCE CE tSA tAW tHA tPWE WE tSD DATA I/O tHD DATA IN VALID Figure 8. Write Cycle No. 3 (WE Controlled, OE LOW) [24] tWC ADDRESS tSCE CE tAW tSA tHA tPWE WE tSD DATA I/O NOTE 25 tHD DATA IN VALID tHZWE tLZWE Notes 23. Data I/O is high impedance if OE = VIH. 24. If CE goes HIGH simultaneously with WE HIGH, the output remains in high impedance state. 25. During this period, the I/Os are in output state. Do not apply input signals. Document Number: 001-73042 Rev. *E Page 10 of 16 CY62148EV30LL Automotive Truth Table CE [26] WE OE H X X High Z Deselect/Power down Standby (ISB) L H L Data out Read Active (ICC) L H H High Z Output disabled Active (ICC) L L X Data in Write Active (ICC) Inputs/Outputs Mode Power Notes 26. Chip enable must be at CMOS levels (not floating). Intermediate voltage levels on this pin is not permitted. Document Number: 001-73042 Rev. *E Page 11 of 16 CY62148EV30LL Automotive Ordering Information Speed (ns) 55 Ordering Code CY62148EV30LL-55ZSXE Package Diagram 51-85095 32-pin TSOP II Package Type Operating Range Automotive-E Contact your local Cypress sales representative for availability of these parts. Ordering Code Definitions Document Number: 001-73042 Rev. *E Page 12 of 16 CY62148EV30LL Automotive Package Diagrams Figure 9. 32-pin TSOP II (20.95 × 11.76 × 1.0 mm) Package Outline, 51-85095 51-85095 *D Document Number: 001-73042 Rev. *E Page 13 of 16 CY62148EV30LL Automotive Acronyms Acronym Document Conventions Description Units of Measure BHE Byte High Enable BLE Byte Low Enable °C degree Celsius CMOS Complementary Metal Oxide Semiconductor µA microampere CE Chip Enable mA milliampere I/O Input/Output ns nanosecond OE Output Enable pF picofarad V volt W watt SRAM Static Random Access Memory TSOP Thin Small Outline Package WE Write Enable Document Number: 001-73042 Rev. *E Symbol Unit of Measure Page 14 of 16 CY62148EV30LL Automotive Document History Page Document Title: CY62148EV30LL Automotive, 4-Mbit (512 K × 8) Static RAM Document Number: 001-73042 Revision ECN Orig. of Change Submission Date ** 3406557 TAVA 10/03/2012 New data sheet *A 4321736 MEMJ 03/26/2014 Updated Ordering Information: No change in part numbers. Replaced “51-85081” with “51-85095” in Package Diagram column. Updated to new template. *B 4573200 MEMJ 11/18/2014 Updated Functional Description: Added “For a complete list of related documentation, click here.” at the end. *C 4790712 NILE 06/08/2015 Updated Package Diagrams: spec 51-85095 – Changed revision from *B to *D. Updated to new template. *D 4983120 NILE 10/26/2015 Updated Thermal Resistance: Replaced “two-layer” with “four-layer” in “Test Conditions” column. Changed value of JA parameter corresponding to “TSOP II Package” from 75.13 C/W to 79.03 C/W. Changed value of JC parameter corresponding to “TSOP II Package” from 8.95 C/W to 17.44 C/W. Completing Sunset Review. *E 6013872 AESATP12 01/04/2018 Updated logo and copyright. Document Number: 001-73042 Rev. *E Description of Change Page 15 of 16 CY62148EV30LL Automotive Sales, Solutions, and Legal Information Worldwide Sales and Design Support Cypress maintains a worldwide network of offices, solution centers, manufacturer’s representatives, and distributors. To find the office closest to you, visit us at Cypress Locations. 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Document Number: 001-73042 Rev. *E Revised January 4, 2018 Page 16 of 16