CY62157CV30

CY62157CV25/30/33 MoBL™ 512K x 16 Static RAM Features • High speed — 55 ns and 70 ns availability • Voltage range: — CY62157CV25: 2.2V–2.7V — CY62157CV30: 2.7V–3.3V — CY62157CV33: 3.0V–3.6V • Ultra-low active power — Typical active current: 1.5 mA @ f = 1 MHz • • • • — Typical active current: 5.5 mA @ f = fmax (70 ns speed) Low standby power Easy memory expansion with CE1, CE2 and OE features Automatic power-down when deselected CMOS for optimum speed/power reducing power consumption by more than 99% when deselected (CE1 HIGH or CE2 LOW or both BLE and BHE are HIGH). The input/output pins (I/O0 through I/O15) are placed in a high-impedance state when: deselected (CE1 HIGH or CE2 LOW), outputs are disabled (OE HIGH), both Byte High Enable and Byte Low Enable are disabled (BHE, BLE HIGH), or during a write operation (CE1 LOW and CE2 HIGH and WE LOW). Writing to the device is accomplished by taking Chip Enable 1 (CE1) and Write Enable (WE) inputs LOW and Chip Enable 2 (CE2) HIGH. If Byte Low Enable (BLE) is LOW, then data from I/O pins (I/O0 through I/O7), is written into the location specified on the address pins (A0 through A18). If Byte High Enable (BHE) is LOW, then data from I/O pins (I/O8 through I/O15) is written into the location specified on the address pins (A0 through A18). Reading from the device is accomplished by taking Chip Enable 1 (CE1) and Output Enable (OE) LOW and Chip Enable 2 (CE2) HIGH while forcing the Write Enable (WE) HIGH. If Byte Low Enable (BLE) is LOW, then data from the memory location specified by the address pins will appear on I/O0 to I/O7. If Byte High Enable (BHE) is LOW, then data from memory will appear on I/O8 to I/O15. See the truth table at the back of this data sheet for a complete description of read and write modes. The CY62157CV25/30/33 are available in a 48-ball FBGA package. Functional Description The CY62157CV25/30/33 are high-performance CMOS static RAMs organized as 512K words by 16 bits. These devices feature advanced circuit design to provide ultra-low active current. This is ideal for providing More Battery Life™ (MoBL™) in portable applications such as cellular telephones. The devices also have an automatic power-down feature that significantly reduces power consumption by 80% when addresses are not toggling. The device can also be put into standby mode Logic Block Diagram A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 DATA IN DRIVERS ROW DECODER 512K × 16 RAM Array 2048 × 4096 SENSE AMPS I/O0–I/O7 I/O8–I/O15 COLUMN DECODER A11 A12 A13 A14 A15 A16 A17 A18 BHE WE OE BLE CE2 CE1 Power-down Circuit BHE BLE CE2 CE1 Cypress Semiconductor Corporation Document #: 38-05014 Rev. *C • 3901 North First Street • San Jose • CA 95134 • 408-943-2600 Revised April 23, 2002 CY62157CV25/30/33 MoBL™ Pin Configurations[1, 2] FBGA (Top View) 1 BLE I/O8 I/O9 VSS VCC I/O14 I/O15 A18 2 OE BHE I/O10 I/O11 I/O12 I/O13 NC A8 3 A0 A3 A5 A17 DNU A14 A12 A9 4 A1 A4 A6 A7 A16 A15 A13 A10 5 A2 CE1 I/O1 I/O3 I/O4 I/O5 WE A11 6 CE2 I/O0 I/O2 VCC VSS I/O6 I/O7 NC A B C D E F G H Maximum Ratings (Above which the useful life may be impaired. For user guidelines, not tested.) Storage Temperature ................................. –65°C to +150°C Ambient Temperature with Power Applied............................................. –55°C to +125°C Supply Voltage to Ground Potential ... –0.5V to Vccmax + 0.5V DC Voltage Applied to Outputs in High-Z State[3] ....................................–0.5V to VCC + 0.3V DC Input Voltage[3].................................–0.5V to VCC + 0.3V Output Current into Outputs (LOW) .............................20 mA Static Discharge Voltage ......................................... > 2001V (per MIL-STD-883, Method 3015) Latch-up Current.................................................... > 200 mA Operating Range Device CY62157CV25 CY62157CV30 CY62157CV33 Range Ambient Temperature VCC 2.2V to 2.7V 2.7V to 3.3V 3.0V to 3.6V Industrial –40°C to +85°C Product Portfolio Power Dissipation (Industrial) Operating (ICC) VCC Range Product CY62157CV25 CY62157CV30 CY62157CV33 VCC(min.) 2.2V 2.7V 3.0V VCC(typ.) 2.5V 3.0V 3.3V [4] Speed VCC(max.) 2.7V 3.3V 3.6V 55 ns 70 ns 55 ns 70 ns 55 ns 70 ns f = 1 MHz Typ. [4] f = fmax Typ. [4] Standby (ISB2) Typ. [4] Max. 3 mA 3 mA 3 mA 3 mA 3 mA 3 mA Max. 15 mA 15 mA 15 mA Max. 25 µA 25 µA 30 µA 1.5 mA 1.5 mA 1.5 mA 1.5 mA 1.5 mA 1.5 mA 7 mA 7 mA 7 mA 6 µA 8 µA 10 µA 5.5 mA 12 mA 5.5 mA 12 mA 5.5 mA 12 mA Notes: 1. NC pins are not connected to the die. 2. E3 (DNU) can be left as NC or VSS to ensure proper application. 3. VIL(min.) = –2.0V for pulse durations less than 20 ns. 4. Typical values are included for reference only and are not guaranteed or tested. Typical values are measured at VCC = VCC(typ.), TA = 25°C. Document #: 38-05014 Rev. *C Page 2 of 13 CY62157CV25/30/33 MoBL™ Electrical Characteristics Over the Operating Range CY62157CV25-55 Parameter VOH VOL VIH VIL IIX IOZ ICC Description Output HIGH Voltage Output LOW Voltage Input HIGH Voltage Input LOW Voltage Input Leakage Current GND < VI < VCC Output Leakage Current GND < VO < VCC, Output Disabled VCC Operating Supply Current Automatic CE Power-Down Current— CMOS Inputs Automatic CE Power-Down Current— CMOS Inputs f = fMAX = 1/tRC f = 1 MHz VCC = 2.7V IOUT = 0 mA CMOS Levels Test Conditions IOH = –0.1 mA IOL = 0.1 mA VCC = 2.2V VCC = 2.2V 1.8 –0.3 –1 –1 7 1.5 6 Min. Typ.[4] 2.0 0.4 VCC + 0.3V 0.6 +1 +1 15 3 25 1.8 –0.3 –1 –1 5.5 1.5 6 CY62157CV25-70 Max. Unit V 0.4 VCC + 0.3V 0.6 +1 +1 12 3 25 µA V V V µA µA mA 2.0 Max. Min. Typ.[4] ISB1 CE1 > VCC – 0.2V or CE2 < 0.2V VIN > VCC – 0.2V or VIN < 0.2V, f = fmax (Address and Data Only), f = 0 (OE,WE,BHE and BLE) CE1 > VCC – 0.2V or CE2 < 0.2V VIN > VCC – 0.2V or VIN < 0.2V, f = 0, VCC = 2.7V ISB2 CY62157CV30-55 Parameter VOH VOL VIH VIL IIX IOZ ICC Description Output HIGH Voltage Output LOW Voltage Input HIGH Voltage Input LOW Voltage Input Leakage Current Output Leakage Current VCC Operating Supply Current Automatic CE Power-Down Current— CMOS Inputs Automatic CE Power-Down Current— CMOS Inputs GND < VI < VCC GND < VO < VCC, Output Disabled f = fMAX = 1/tRC f = 1 MHz VCC = 3.3V IOUT = 0 mA CMOS Levels Test Conditions IOH = –1.0 mA IOL = 2.1 mA VCC = 2.7V VCC = 2.7V 2.2 –0.3 –1 –1 7 1.5 8 Min. Typ. 2.4 0.4 [4] CY62157CV30-70 2.4 0.4 VCC + 0.3V 0.8 +1 +1 5.5 1.5 8 12 3 25 µA V V V V µA µA mA Max. Min. Typ.[4] Max. Unit VCC + 2.2 0.3V 0.8 +1 +1 15 3 25 –0.3 –1 –1 ISB1 CE1 > VCC – 0.2V or CE2 < 0.2V VIN > VCC – 0.2V or VIN < 0.2V, f = fmax (Address and Data Only), f = 0 (OE,WE,BHE and BLE) CE1 > VCC – 0.2V or CE2 < 0.2V VIN > VCC – 0.2V or VIN < 0.2V, f = 0, VCC = 3.3V ISB2 Document #: 38-05014 Rev. *C Page 3 of 13 CY62157CV25/30/33 MoBL™ CY62157CV33-55 Parameter VOH VOL VIH VIL IIX IOZ ICC Description Test Conditions VCC = 3.0V VCC = 3.0V 2.2 –0.3 GND < VI < VCC GND < VO < VCC, Output Disabled –1 –1 7 1.5 10 Min. 2.4 0.4 VCC + 0.3V 0.8 +1 +1 15 3 30 2.2 –0.3 –1 –1 5.5 1.5 10 Typ. [4] CY62157CV33-70 Min. 2.4 0.4 VCC + 0.3V 0.8 +1 +1 12 3 30 µA Typ.[4] Max. Unit V V V V µA µA mA Max. Output HIGH Voltage IOH = –1.0 mA Output LOW Voltage IOL = 2.1 mA Input HIGH Voltage Input LOW Voltage Input Leakage Current Output Leakage Current VCC Operating Supply f = fMAX = 1/tRC VCC = 3.6V Current IOUT = 0 mA f = 1 MHz CMOS Levels Automatic CE Power-Down Current—CMOS Inputs Automatic CE Power-Down Current—CMOS Inputs CE1 > VCC – 0.2V or CE2 < 0.2V VIN > VCC – 0.2V or VIN < 0.2V, f = fmax (Address and Data Only), f = 0 (OE,WE,BHE,and BLE) CE1 > VCC – 0.2V or CE2 < 0.2V VIN > VCC – 0.2V or VIN < 0.2V, f = 0, VCC = 3.6V ISB1 ISB2 Capacitance[5] Parameter CIN COUT Description Input Capacitance Output Capacitance Test Conditions TA = 25°C, f = 1 MHz, VCC = VCC(typ.) Max. 6 8 Unit pF pF Thermal Resistance Description Thermal Resistance (Junction to Ambient)[5] Thermal Resistance (Junction to Case)[5] Test Conditions Still Air, soldered on a 3 x 4.5 inch, two-layer printed circuit board Symbol ΘJA ΘJC BGA 55 16 Unit °C/W °C/W Note: 5. Tested initially and after any design or process changes that may affect these parameters. Document #: 38-05014 Rev. *C Page 4 of 13 CY62157CV25/30/33 MoBL™ AC Test Loads and Waveforms R1 VCC OUTPUT 30 pF INCLUDING JIG AND SCOPE R2 VCC Typ 10% GND Rise TIme: 1 V/ns ALL INPUT PULSES 90% 90% 10% Fall Time: 1 V/ns Equivalent to: THÉVENIN EQUIVALENT RTH VTH OUTPUT Parameters R1 R2 RTH VTH 2.5V 16.6 15.4 8.0 1.20 3.0V 1.105 1.550 0.645 1.75 3.3V 1.216 1.374 0.645 1.75 Unit K Ohms K Ohms K Ohms Volts Data Retention Characteristics (Over the Operating Range) Parameter VDR ICCDR Description VCC for Data Retention Data Retention Current VCC = 1.5V CE1 > VCC – 0.2V or CE2 < 0.2V, VIN > VCC – 0.2V or VIN < 0.2V 0 tRC Conditions Min. 1.5 4 Typ.[4] Max. Vccmax 20 Unit V µA tCDR[5] tR[6] Chip Deselect to Data Retention Time Operation Recovery Time ns ns Data Retention Waveform[7] DATA RETENTION MODE VCC CE1 or BHE.BLE or CE2 VCC(min.) tCDR VDR > 1.5 V VCC(min.) tR Note: 6. Full Device AC operation requires linear VCC ramp from VDR to VCC(min.) > 100 µs or stable at VCC(min.) >100 µs. 7. BHE.BLE is the AND of both BHE and BLE. Chip can be deselected by either disabling the chip enable signals or by disabling both BHE and BLE. Document #: 38-05014 Rev. *C Page 5 of 13 CY62157CV25/30/33 MoBL™ Switching Characteristics Over the Operating Range[8] 55 ns Parameter Read Cycle tRC tAA tOHA tACE tDOE tLZOE tHZOE tLZCE tHZCE tPU tPD tDBE tLZBE[11] tHZBE Write Cycle tWC tSCE tAW tHA tSA tPWE tBW tSD tHD tHZWE tLZWE [12] 70 ns Max. Min. 70 55 70 10 55 25 70 35 5 20 25 10 20 25 0 55 55 70 70 5 20 25 70 60 60 0 0 50 60 30 0 20 25 5 Max. Unit ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns Description Read Cycle Time Address to Data Valid Data Hold from Address Change CE1 LOW and CE2 HIGH to Data Valid OE LOW to Data Valid OE LOW to Low-Z [9] [9, 10] [9] Min. 55 10 5 10 0 OE HIGH to High-Z CE1 LOW and CE2 HIGH to Low-Z CE1 HIGH or CE2 LOW to High-Z[9, 10] CE1 LOW and CE2 HIGH to Power-up CE1 HIGH or CE2 LOW to Power-down BHE/BLE LOW to Data Valid BHE/BLE LOW to Low-Z[9] BHE/BLE HIGH to High-Z Write Cycle Time CE1 LOW and CE2 HIGH to Write End Address Set-up to Write End Address Hold from Write End Address Set-up to Write Start WE Pulse Width BHE/BLE Pulse Width Data Set-up to Write End Data Hold from Write End WE LOW to High-Z[9, 10] WE HIGH to Low-Z [9] [9, 10] 5 55 45 45 0 0 45 50 25 0 5 Notes: 8. Test conditions assume signal transition time of 5 ns or less, timing reference levels of VCC(typ.)/2, input pulse levels of 0 to VCC(typ.), and output loading of the specified IOL/IOH and 30-pF load capacitance. 9. At any given temperature and voltage condition, tHZCE is less than tLZCE, tHZBE is less than tLZBE, tHZOE is less than tLZOE, and tHZWE is less than tLZWE for any given device. 10. tHZOE, tHZCE, tHZBE, and tHZWE transitions are measured when the outputs enter a high-impedance state. 11. When both byte enables are toggled together this value is 10 ns. 12. The internal Write time of the memory is defined by the overlap of WE, CE1 = VIL, BHE and/or BLE = VIL, CE2 = VIH. All signals must be ACTIVE to initiate a Write and any of these signals can terminate a Write by going INACTIVE. The data input set-up and hold timing should be referenced to the edge of the signal that terminates the Write. Document #: 38-05014 Rev. *C Page 6 of 13 CY62157CV25/30/33 MoBL™ C Switching Waveforms Read Cycle No. 1 (Address Transition Controlled) [13, 14] tRC ADDRESS tOHA DATA OUT PREVIOUS DATA VALID tAA DATA VALID Read Cycle No. 2 (OE Controlled) ADDRESS [14, 15] tRC CE1 CE2 tACE OE tHZBE BHE/BLE tLZBE tDOE tLZOE HIGH IMPEDANCE tLZCE VCC SUPPLY CURRENT tPU 50% tHZOE tHZCE DATA VALID tPD 50% ISB ICC HIGH IMPEDANCE DATA OUT Notes: 13. Device is continuously selected. OE, CE1 = VIL, BHE and/or BLE = VIL, CE2 = VIH. 14. WE is HIGH for Read cycle. 15. Address valid prior to or coincident with CE1, BHE, BLE transition LOW and CE2 transition HIGH. Document #: 38-05014 Rev. *C Page 7 of 13 CY62157CV25/30/33 MoBL™ Switching Waveforms (continued) Write Cycle No. 1 (WE Controlled) [12, 16, 17] tWC ADDRESS tSCE CE1 CE2 tAW tSA WE tPWE tHA BHE/BLE tBW OE tSD DATA I/O tHD NOTE18 tHZOE [12, 16, 17] DATAIN VALID Write Cycle No. 2 (CE1 or CE2 Controlled) ADDRESS tWC tSCE CE1 CE2 tSA tAW tPWE tHA WE BHE/BLE tBW OE tSD DATA I/O tHD NOTE18 tHZOE DATAIN VALID Notes: 16. Data I/O is high-impedance if OE = VIH. 17. If CE1 goes HIGH or CE2 goes LOW simultaneously with WE HIGH, the output remains in a high-impedance state. 18. During this period, the I/Os are in output state and input signals should not be applied. Document #: 38-05014 Rev. *C Page 8 of 13 CY62157CV25/30/33 MoBL™ Switching Waveforms (continued) Write Cycle No. 3 (WE Controlled, OE LOW) [17] tWC ADDRESS tSCE CE1 CE2 BHE/BLE tAW tSA WE tBW tHA tPWE tSD DATA I/O tHD NOTE 18 tHZWE DATAIN VALID tLZWE Write Cycle No. 4 (BHE/BLE Controlled, OE LOW) [17] tWC ADDRESS CE1 CE2 tSCE tAW BHE/BLE tSA WE tPWE tSD DATA I/O tHD tBW tHA NOTE 18 DATAIN VALID Document #: 38-05014 Rev. *C Page 9 of 13 CY62157CV25/30/33 MoBL™ Typical DC and AC Characteristics (Typical values are included for reference only and are not guaranteed or tested. Typical values are measured at VCC = VCC(typ.), TA = 25°C.) Operating Current vs. Supply Voltage 14.0 12.0 ICC (mA) 10.0 8.0 6.0 4.0 2.0 (f = 1 MHz) (f = fmax, 55ns) (f = fmax, 70ns) MoBL ICC (mA) 14.0 12.0 10.0 8.0 6.0 4.0 2.0 (f = 1 MHz) 0.0 3.0 2.7 3.3 SUPPLY VOLTAGE (V) (f = fmax, 55ns) (f = fmax, 70ns) MoBL ICC (mA) 14.0 12.0 10.0 8.0 6.0 4.0 (f = 1 MHz) 0.0 3.3 3.0 3.6 SUPPLY VOLTAGE (V) 2.0 (f = fmax, 55ns) (f = fmax, 70ns) MoBL 0.0 2.2 2.5 2.7 SUPPLY VOLTAGE (V) Standby Current vs. Supply Voltage 12.0 ISB (µA) ISB (µA) 10.0 8.0 6.0 4.0 2.0 0 2.2 2.5 2.7 SUPPLY VOLTAGE (V) MoBL 12.0 MoBL ISB (µA) 10.0 8.0 6.0 4.0 2.0 0 2.7 3.0 3.3 SUPPLY VOLTAGE (V) 12.0 MoBL 10.0 8.0 6.0 4.0 2.0 0 3.0 3.3 3.6 SUPPLY VOLTAGE (V) Access Time vs. Supply Voltage 60 50 40 TAA (ns) TAA (ns) 30 20 10 0 2.2 2.5 2.7 MoBL 60 50 40 TAA (ns) 30 20 10 0 2.7 3.0 3.3 MoBL 60 50 40 30 20 10 0 3.0 3.3 3.6 MoBL SUPPLY VOLTAGE (V) SUPPLY VOLTAGE (V) SUPPLY VOLTAGE (V) Document #: 38-05014 Rev. *C Page 10 of 13 CY62157CV25/30/33 MoBL™ Truth Table CE1 H X X L L L L L L L L L CE2 X L X H H H H H H H H H WE X X X H H H H H H L L L OE X X X L L L H H H X X X BHE X X H L H L L H L L H L BLE X X H L L H L L H L L H Inputs/Outputs High Z High Z High Z Data Out (I/OO–I/O7); I/O8–I/O15 in High Z Mode Deselect/Power-Down Deselect/Power-Down Deselect/Power-Down Read Power Standby (ISB) Standby (ISB) Standby (ISB) Active (ICC) Active (ICC) Active (ICC) Active (ICC) Active (ICC) Active (ICC) Active (ICC) Active (ICC) Active (ICC) Data Out (I/OO–I/O15) Read Data Out (I/O8–I/O15); Read I/O0–I/O7 in High Z High Z High Z High Z Data In (I/OO–I/O15) Data In (I/OO–I/O7); I/O8–I/O15 in High Z Data In (I/O8–I/O15); I/O0–I/O7 in High Z Output Disabled Output Disabled Output Disabled Write Write Write Document #: 38-05014 Rev. *C Page 11 of 13 CY62157CV25/30/33 MoBL™ Ordering Information Speed (ns) 70 Ordering Code CY62157CV25LL-70BAI CY62157CV30LL-70BAI CY62157CV33LL-70BAI 55 CY62157CV30LL-55BAI CY62157CV33LL-55BAI Package Name BA48F Package Type 48-ball Fine-pitch BGA Operating Range Industrial Package Diagram 48-Ball (6 mm x 10 mm x 1.2 mm) FBGA BA48F 51-85128-*B MoBL, MoBL2, and More Battery Life are trademarks of Cypress Semiconductor Corporation. All product and company names mentioned in this document may be the trademarks of their respective holders. Document #: 38-05014 Rev. *C Page 12 of 13 © Cypress Semiconductor Corporation, 2002. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress Semiconductor product. Nor does it convey or imply any license under patent or other rights. Cypress Semiconductor does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges. CY62157CV25/30/33 MoBL™ Document Title: CY62157CV25/30/33 MoBL™ 512K x 16 STATIC RAM Document Number: 38-05014 REV. ** *A *B *C ECN NO. 106184 107241 109621 114218 Issue Date 05/10/01 07/24/01 03/11/02 05/01/02 Orig. of Change MGN MGN GUG/ MGN Description of Change Make Corrections to Advance Information. Added 55 ns bin. Change from Advance Information to Final Improved Typical & Max ICC values HRT/MGN New Datasheet – Advance Information Document #: 38-05014 Rev. *C Page 13 of 13