CY62158CV30LL-55BAI

CY62158CV25/30/33 MoBL™ 1024K x 8 MoBL Static RAM Features • High Speed — 55 ns and 70 ns availability • Voltage range: — CY62158CV25: 2.2V–2.7V — CY62158CV30: 2.7V–3.3V — CY62158CV33: 3.0V–3.6V • Ultra low active power — Typical active current: 1.5 mA @ f = 1 MHz • • • • — Typical active current: 5.5 mA @ f = fmax(70 ns speed) Low standby power Easy memory expansion with CE1, CE2 and OE features Automatic power-down when deselected CMOS for optimum speed/power in portable applications such as cellular telephones. The device also has an automatic power-down feature that significantly reduces power consumption by 80% when addresses are not toggling. The device can be put into standby mode reducing power consumption by more than 99% when deselected (CE1 HIGH or CE2 LOW). Writing to the device is accomplished by taking Chip Enable 1 (CE1) and Write Enable (WE) inputs LOW and Chip Enable 2 (CE2) HIGH. Data on the eight I/O pins (I/O0 through I/O7) is then written into the location specified on the address pins (A0 through A19). Reading from the device is accomplished by taking Chip Enable 1 (CE1) and Output Enable (OE) LOW and Chip Enable 2 (CE2) HIGH while forcing Write Enable (WE) HIGH. Under these conditions, the contents of the memory location specified by the address pins will appear on the I/O pins. The eight input/output pins (I/O0 through I/O7) are placed in a high-impedance state when the device is deselected (CE1 LOW and CE2 HIGH), the outputs are disabled (OE HIGH), or during a write operation (CE1 LOW and CE2 HIGH and WE LOW). The CY62158CV25/30/33 are available in a 48-ball FBGA package. Functional Description The CY62158CV25/30/33 are high-performance CMOS static RAMs organized as 1024K words by 8 bits. This device features advanced circuit design to provide ultra-low active current. This is ideal for providing More Battery Life™ (MoBL™) Logic Block Diagram Data in Drivers I/O0 I/O1 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 CE1 CE2 WE OE ROW DECODER SENSE AMPS I/O2 I/O3 I/O4 I/O5 1024K x 8 ARRAY COLUMN DECODER POWER DOWN I/O6 I/O7 Cypress Semiconductor Corporation Document #: 38-05019 Rev. *C • 3901 North First Street A13 A14 A15 A16 A17 A18 A19 • San Jose • CA 95134 • 408-943-2600 Revised April 24, 2002 CY62158CV25/30/33 MoBL™ Pin Configurations [1, 2] 1 NC NC I/O0 VSS VCC I/O3 NC A18 2 OE NC DNU I/O1 I/O2 NC NC A8 FBGA Top View 4 3 A0 A3 A5 A17 NC A14 A12 A9 A1 A4 A6 A7 A16 A15 A13 A10 5 A2 CE1 NC I/O5 I/O6 NC WE A11 6 CE2 NC I/O4 VCC VSS I/O7 NC A19 A B C D E F G H Maximum Ratings (Above which the useful life may be impaired. For user guidelines, not tested.) Storage Temperature . ................................–65°C to +150°C Ambient Temperature with Power Applied. ..............................................55°C to +125°C Supply Voltage to Ground Potential ...–0.5V to Vccmax + 0.5V DC Voltage Applied to Outputs in High Z State[3].................................... –0.5V to VCC + 0.5V DC Input Voltage[3] .................................–0.5V to VCC + 0.5V Output Current into Outputs (LOW)..............................20 mA Static Discharge Voltage ............................................>2001V (per MIL-STD-883, Method 3015) Latch-Up Current .....................................................>200 mA Operating Range Product CY62158CV25 CY62158CV30 CY62158CV33 Range Industrial Ambient Temperature –40°C to +85°C VCC 2.2V to 2.7V 2.7V to 3.3V 3.0V to 3.6V Product Portfolio Power Dissipation (Industrial) Operating (ICC) VCC Range Product CY62158CV25 CY62158CV30 CY62158CV33 Min. 2.2V 2.7V 3.0V Typ. [4] f = 1 MHz Max. 2.7V 3.3V 3.6V Speed 55 ns 70 ns 55 ns 70 ns 55 ns 70 ns Typ. [4] f = fmax Typ. [4] Standby (ISB2) Typ.[4] 6 µA 8 µA 10 µA Max. 25 µA 25 µA 30 µA Max. 3 mA 3 mA 3 mA 3 mA 3 mA 3 mA Max. 15 mA 12 mA 15 mA 12 mA 15 mA 12 mA 2.5V 3.0V 3.3V 1.5 mA 1.5 mA 1.5 mA 1.5 mA 1.5 mA 1.5 mA 7 mA 5.5 mA 7 mA 5.5 mA 7 mA 5.5 mA Notes: 1. NC pins are not connected to the die. 2. C2 (DNU) can be left as NC or VSS to ensure proper application. 3. VIL(min.) = –2.0V for pulse durations less than 20 ns. 4. Typical values are included for reference only and are not guaranteed or tested. Typical values are measured at VCC = VCC(typ.), TA = 25°C. Document #: 38-05019 Rev. *C Page 2 of 12 CY62158CV25/30/33 MoBL™ Electrical Characteristics Over the Operating Range CY62158CV25-55 Parameter VOH VOL VIH VIL IIX IOZ Description Output HIGH Voltage Output LOW Voltage Input HIGH Voltage Input LOW Voltage Input Leakage Current GND < VI < VCC Output Leakage Current VCC Operating Supply Current Automatic CE Power-Down Current — CMOS Inputs Automatic CE Power-Down Current — CMOS Inputs GND < VO < VCC, Output Disabled f = fMAX = 1/tRC f = 1 MHz VCC = 2.7V IOUT = 0 mA CMOS Levels Test Conditions IOH = –0.1 mA IOL = 0.1 mA VCC = 2.2V VCC = 2.2V 1.8 –0.3 –1 –1 7 1.5 6 Min. 2.0 0.4 VCC+ 0.3V 0.6 +1 +1 15 3 25 1.8 –0.3 –1 –1 5.5 1.5 6 Typ. [4] CY62158CV25-70 Min. 2.0 0.4 VCC + 0.3V 0.6 +1 +1 12 3 25 µA Typ.[4] Max. Unit V V V V µA µA mA Max. ICC ISB1 CE1 > VCC – 0.2V or CE2 < 0.2V VIN > VCC – 0.2V or VIN < 0.2V, f = fmax (Address and Data Only), f = 0 (OE,WE) CE1 > VCC − 0.2V or CE2 < 0.2V VIN > VCC − 0.2V or VIN < 0.2V, f = 0, VCC = 2.7V ISB2 CY62158CV30-55 Parameter VOH VOL VIH VIL IIX IOZ ICC Description Output HIGH Voltage Output LOW Voltage Input HIGH Voltage Input LOW Voltage Input Leakage Current GND < VI < VCC Output Leakage Current VCC Operating Supply Current Automatic CE Power-Down Current — CMOS Inputs Automatic CE Power-Down Current — CMOS Inputs GND < VO < VCC, Output Disabled f = fMAX = 1/tRC f = 1 MHz VCC = 3.3V IOUT = 0 mA CMOS Levels Test Conditions IOH = –1.0 mA IOL = 2.1 mA VCC = 2.7V VCC = 2.7V 2.2 –0.3 –1 –1 7 1.5 8 Min. 2.4 0.4 VCC + 0.3V 0.8 +1 +1 15 3 25 Typ.[4] Max. CY62158CV30-70 Min. 2.4 0.4 2.2 –0.3 –1 –1 5.5 1.5 8 VCC + 0.3V 0.8 +1 +1 12 3 25 µA Typ.[4] Max. Unit V V V V µA µA mA ISB1 CE1 > VCC – 0.2V or CE2 < 0.2V VIN > VCC – 0.2V or VIN < 0.2V, f = fmax (Address and Data Only), f = 0 (OE, WE) CE1 > VCC − 0.2V or CE2 < 0.2V VIN > VCC − 0.2V or VIN < 0.2V, f = 0,VCC = 3.3V ISB2 Document #: 38-05019 Rev. *C Page 3 of 12 CY62158CV25/30/33 MoBL™ Electrical Characteristics Over the Operating Range (continued) CY62158CV33-55 Parameter VOH VOL VIH VIL IIX IOZ ICC Description Output HIGH Voltage Output LOW Voltage Input HIGH Voltage Input LOW Voltage Input Leakage Current GND < VI < VCC Output Leakage Current VCC Operating Supply Current Automatic CE Power-Down Current — CMOS Inputs Automatic CE Power-Down Current — CMOS Inputs GND < VO < VCC, Output Disabled f = fMAX = 1/tRC f = 1 MHz VCC = 3.6V IOUT = 0 mA CMOS Levels Test Conditions IOH = –1.0 mA IOL = 2.1 mA VCC = 3.0V VCC = 3.0V 2.2 –0.3 –1 –1 7 1.5 10 Min. 2.4 0.4 VCC+ 0.3V 0.8 +1 +1 15 2 30 2.2 –0.3 –1 –1 5.5 1.5 10 Typ. [4] CY62158CV33-70 Min. 2.4 0.4 VCC + 0.3V 0.8 +1 +1 12 2 30 µA Typ.[4] Max. Unit V V V V µA µA mA Max. ISB1 CE1 > VCC – 0.2V or CE2 < 0.2V VIN > VCC – 0.2V or VIN < 0.2V, f = fmax (Address and Data Only), f=0 (OE, WE) CE1 > VCC − 0.2V or CE2 < 0.2V VIN > VCC − 0.2V or VIN < 0.2V, f = 0, VCC = 3.6V ISB2 Capacitance[5] Parameter CIN COUT Description Input Capacitance Output Capacitance Test Conditions TA = 25°C, f = 1 MHz, VCC = VCC(typ.) Max. 6 8 Unit pF pF Thermal Resistance Description Thermal Resistance[5] (Junction to Ambient) Thermal Resistance[5] (Junction to Case) Note: 5. Tested initially and after any design or process changes that may affect these parameters. Test Conditions Still Air, soldered on a 3 x 4.5 inch, two-layer printed circuit board Symbol ΘJA ΘJC BGA 55 16 Unit °C/W °C/W Document #: 38-05019 Rev. *C Page 4 of 12 CY62158CV25/30/33 MoBL™ AC Test Loads and Waveforms R1 VCC OUTPUT 30 pF INCLUDING JIG AND SCOPE R2 VCC Typ 10% GND Rise Time: 1 V/ns ALL INPUT PULSES 90% 90% 10% Fall time: 1 V/ns Equivalent to: THÉVENIN EQUIVALENT RTH VTH OUTPUT Parameters R1 R2 RTH VTH 2.5V 16.6 15.4 8.0 1.20 3.0V 1.105 1.550 0.645 1.75 3.3V 1.216 1.374 0.645 1.75 Unit K Ohms K Ohms K Ohms Volts Data Retention Characteristics (Over the Operating Range) Parameter VDR ICCDR Description VCC for Data Retention Data Retention Current VCC = 1.5V CE1 > VCC − 0.2V or CE2 VCC − 0.2V or VIN < 0.2V 0 tRC Conditions Min. 1.5 4 Typ.[4] Max. Vccmax 20 Unit V µA tCDR[5] tR[6] Chip Deselect to Data Retention Time Operation Recovery Time ns ns Data Retention Waveform DATA RETENTION MODE VCC CE1 VCC(min) tCDR VDR > 1.5 V VCC(min) tR or CE2 Note: 6. Full Device AC operation requires linear VCC ramp from VDR to VCC(min.) > 100 µs or stable at VCC(min.) > 100 µs. Document #: 38-05019 Rev. *C Page 5 of 12 CY62158CV25/30/33 MoBL™ Switching Characteristics Over the Operating Range[7] 55 ns Parameter READ CYCLE tRC tAA tOHA tACE tDOE tLZOE tHZOE tLZCE tHZCE tPU tPD WRITE CYCLE tWC tSCE tAW tHA tSA tPWE tSD tHD tHZWE tLZWE [10] 70 ns Max. Min. 70 55 70 10 55 25 70 35 5 20 25 10 20 25 0 55 70 70 60 60 0 0 50 30 0 20 25 5 Max. Unit ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns Description Read Cycle Time Address to Data Valid Data Hold from Address Change CE1 LOW and CE2 HIGH to Data Valid OE LOW to Data Valid OE LOW to Low Z[8] OE HIGH to High Z [8, 9] [8] Min. 55 10 5 10 0 CE1 LOW and CE2 HIGH to Low Z CE1 HIGH or CE2 LOW to High Z [8, 9] CE1 LOW and CE2 HIGH to Power-Up CE1 HIGH or CE2 LOW to Power-Down Write Cycle Time CE1 LOW and CE2 HIGH to Write End Address Set-Up to Write End Address Hold from Write End Address Set-Up to Write Start WE Pulse Width Data Set-Up to Write End Data Hold from Write End WE LOW to High Z [8, 9] 55 45 45 0 0 45 25 0 5 WE HIGH to Low Z[8] Notes: 7. Test conditions assume signal transition time of 5 ns or less, timing reference levels of VCC(typ.)/2, input pulse levels of 0 to VCC(typ.), and output loading of the specified IOL/IOH and 30-pF load capacitance. 8. At any given temperature and voltage condition, tHZCE is less than tLZCE, tHZOE is less than tLZOE, and tHZWE is less than tLZWE for any given device. 9. tHZOE, tHZCE, and tHZWE transitions are measured when the outputs enter a high impedance state. 10. The internal write time of the memory is defined by the overlap of WE, CE1 = VIL, and CE2 = VIH. All signals must be ACTIVE to initiate a write and any of these signals can terminate a write by going INACTIVE. The data input set-up and hold timing should be referenced to the edge of the signal that terminates the write. Document #: 38-05019 Rev. *C Page 6 of 12 CY62158CV25/30/33 MoBL™ Switching Waveforms Read Cycle No. 1 (Address Transition Controlled) [11, 12] tRC ADDRESS tOHA DATA OUT PREVIOUS DATA VALID tAA DATA VALID Read Cycle No. 2 (OE Controlled) [12, 13] ADDRESS tRC CE1 CE2 tACE OE tDOE tLZOE HIGH IMPEDANCE tLZCE VCC SUPPLY CURRENT tPU 50% tHZOE tHZCE DATA VALID tPD 50% ISB ICC HIGH IMPEDANCE DATA OUT Notes: 11. Device is continuously selected. OE, CE1 = VIL, CE2=VIH. 12. WE is HIGH for read cycle. 13. Address valid prior to or coincident with CE1 transition LOW and CE2 transition HIGH. Document #: 38-05019 Rev. *C Page 7 of 12 CY62158CV25/30/33 MoBL™ Switching Waveforms Write Cycle No. 1(WE Controlled) [10, 14, 16] tWC ADDRESS tSCE CE1 CE2 tAW tSA WE tPWE tHA OE tSD DATA I/O NOTE 15 tHZOE DATAIN VALID tHD [10, 14, 16] Write Cycle No. 2(CE1 or CE2 Controlled) tWC ADDRESS tSCE CE1 tSA CE2 tAW tPWE WE tHA OE tSD DATA I/O DATAIN VALID tHD Notes: 14. Data I/O is high impedance if OE = VIH. 15. During this period, the I/Os are in output state and input signals should not be applied. 16. If CE1 goes HIGH or CE2 goes LOW simultaneously with WE HIGH, the output remains in high-impedance state. Document #: 38-05019 Rev. *C Page 8 of 12 CY62158CV25/30/33 MoBL™ Switching Waveforms Write Cycle No. 3 (WE Controlled, OE LOW) [16] tWC ADDRESS tSCE CE1 CE2 tAW tSA WE tSD DATA I/O NOTE 15 tHZWE DATAIN VALID tLZWE tHD tPWE tHA Document #: 38-05019 Rev. *C Page 9 of 12 CY62158CV25/30/33 MoBL™ Typical DC and AC Characteristics (Typical values are included for reference only and are not guaranteed or tested. Typical values are measured at VCC = VCC(typ.), TA = 25°C.) Operating Current vs. Supply Voltage 14.0 12.0 ICC (mA) 10.0 8.0 6.0 4.0 2.0 (f = 1 MHz) (f = fmax, 55 ns) (f = fmax, 70 ns) MoBL ICC (mA) 14.0 12.0 ICC (mA) 10.0 8.0 6.0 4.0 2.0 (f = 1 MHz) 0.0 3.0 2.7 3.3 SUPPLY VOLTAGE (V) (f = fmax, 55 ns) (f = fmax, 70 ns) 14.0 MoBL 12.0 10.0 8.0 6.0 4.0 2.0 (f = 1 MHz) 0.0 3.3 3.0 3.6 SUPPLY VOLTAGE (V) (f = fmax, 55 ns) (f = fmax, 70 ns) MoBL 0.0 2.2 2.5 2.7 SUPPLY VOLTAGE (V) Standby Current vs. Supply Voltage 12.0 ISB (µA) ISB (µA) 10.0 8.0 6.0 4.0 2.0 0 2.2 2.5 2.7 SUPPLY VOLTAGE (V) MoBL 12.0 MoBL ISB (µA) 10.0 8.0 6.0 4.0 2.0 0 2.7 3.0 3.3 SUPPLY VOLTAGE (V) 12.0 MoBL 10.0 8.0 6.0 4.0 2.0 0 3.0 3.3 3.6 SUPPLY VOLTAGE (V) Access Time vs. Supply Voltage 60 50 40 TAA (ns) TAA (ns) 30 20 10 0 2.2 2.5 2.7 MoBL 60 50 40 TAA (ns) 30 20 10 0 2.7 3.0 3.3 MoBL 60 50 40 30 20 10 0 3.0 3.3 3.6 MoBL SUPPLY VOLTAGE (V) SUPPLY VOLTAGE (V) SUPPLY VOLTAGE (V) Truth Table CE1 H X L L L CE2 X L H H H WE X X H H L OE X X L H X Inputs/Outputs High Z High Z Data Out (I/O0-I/O7) High Z Data in (I/O0-I/O7) Mode Deselect/Power-Down Deselect/Power-Down Read Output Disabled Write Power Standby (ISB) Standby (ISB) Active (ICC) Active (Icc) Active (Icc) Document #: 38-05019 Rev. *C Page 10 of 12 CY62158CV25/30/33 MoBL™ Ordering Information Speed (ns) 70 Ordering Code CY62158CV25LL-70BAI CY62158CV30LL-70BAI CY62158CV33LL-70BAI 55 CY62158CV30LL-55BAI CY62158CV33LL-55BAI Package Name BA48F Package Type 48-Ball Fine Pitch BGA Operating Range Industrial Package Diagrams 48-Ball (6 mm x 10 mm x 1.2 mm) FBGA BA48F 51-85128-*B MoBL, MoBL2 and More Battery Life are trademarks of Cypress Semiconductor Corporation. All product and company names mentioned in this document may be the trademarks of their respective holders. Document #: 38-05019 Rev. *C Page 11 of 12 © Cypress Semiconductor Corporation, 2002. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress Semiconductor product. Nor does it convey or imply any license under patent or other rights. Cypress Semiconductor does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges. CY62158CV25/30/33 MoBL™ Document Title: CY62158CV25/30/33 MoBL™, 1024K x 8 MoBL Static RAM Document Number: 38-05019 REV. ** *A *B *C ECN NO. 106361 107773 111945 114219 Issue Date 05/22/01 07/16/01 01/31/02 05/01/02 Orig. of Change MGN MGN GAV GUG/ MGN Description of Change New Data Sheet - Advance Information Add 55 ns Bin to Advance Information Advance to Final Improved Typical and Max Icc Values Document #: 38-05019 Rev. *C Page 12 of 12