CY7C1020V33L-10VC

fax id: 1075 CY7C1020V 32K x 16 Static RAM Features • 3.3V operation (3.0V - 3.6V) • High speed — tAA = 10 ns • Low active power — 540 mW (max., 12 ns) • Very Low standby power — 330 µW (max., “L” version) • Automatic power-down when deselected • Independent Control of Upper and Lower bytes • Available in 44-pin TSOP II and 400-mil SOJ (BLE) is LOW, then data from I/O pins (I/O1 through I/O8), is written into the location specified on the address pins (A0 through A14). If byte high enable (BHE) is LOW, then data from I/O pins (I/O9 through I/O16) is written into the location specified on the address pins (A0 through A14). Reading from the device is accomplished by taking chip enable (CE) and output enable (OE) LOW while forcing the write enable (WE) HIGH. If byte low enable (BLE) is LOW, then data from the memory location specified by the address pins will appear on I/O1 to I/O8. If byte high enable (BHE) is LOW, then data from memory will appear on I/O 9 to I/O16. See the truth table at the back of this datasheet for a complete description of read and write modes. The input/output pins (I/O1 through I/O16) are placed in a high-impedance state when the device is deselected (CE HIGH), the outputs are disabled (OE HIGH), the BHE and BLE are disabled (BHE, BLE HIGH), or during a write operation (CE LOW, and WE LOW). The CY7C1020V is available in standard 44-pin TSOP type II and 400-mil-wide SOJ packages. Functional Description The CY7C1020V is a high-performance CMOS static RAM organized as 32,768 words by 16 bits. This device has an automatic power-down feature that significantly reduces power consumption when deselected. Writing to the device is accomplished by taking chip enable (CE) and write enable (WE) inputs LOW. If byte low enable Logic Block Diagram DATA IN DRIVERS Pin Configuration SOJ / TSOP II Top View NC A 14 A 13 A 12 A 11 CE I/O1 I/O2 I/O3 I/O4 VCC VSS I/O5 I/O6 I/O7 I/O8 WE A 10 A9 A8 A7 NC 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 A6 A5 A4 A3 A2 A1 A0 32K x 16 RAM Array I/O1 – I/O8 I/O9 – I/O16 COLUMN DECODER BHE WE CE OE BLE 1020V-1 A0 A1 A2 OE BHE BLE I/O16 I/O15 I/O14 I/O13 VSS VCC I/O12 I/O11 I/O10 I/O9 NC A3 A4 A5 A6 NC ROW DECODER A7 A8 A9 A10 A11 A12 A13 A14 SENSE AMPS 1020V-2 Selection Guide 7C1020V-10 Maximum Access Time (ns) Maximum Operating Current (mA) L Maximum CMOS Standby Current (mA) L 10 130 100 1 0.1 7C1020V-12 12 120 90 1 0.1 7C1020V-15 15 110 80 1 0.1 7C1020V-20 20 100 70 1 0.1 Cypress Semiconductor Corporation • 3901 North First Street • San Jose • CA 95134 • 408-943-2600 October 1996 – Revised April 13 , 1998 CY7C1020V Maximum Ratings (Above which the useful life may be impaired. For user guidelines, not tested.) Storage Temperature ................................. –65°C to +150°C Ambient Temperature with Power Applied ............................................. –55°C to +125°C Supply Voltage on VCC to Relative GND[1] .... –0.5V to +4.6V DC Voltage Applied to Outputs in High Z State[1] .....................................–0.5V to VCC +0.5V DC Input Voltage ..................................–0.5V to VCC +0.5V [1] Current into Outputs (LOW)......................................... 20 mA Static Discharge Voltage ........................................... >2001V (per MIL-STD-883, Method 3015) Latch-Up Current..................................................... >200 mA Operating Range Range Commercial Industrial Ambient Temperature[2] 0°C to +70°C –40°C to +85°C VCC 3.0V - 3.6V 3.0V - 3.6V Electrical Characteristics Over the Operating Range 7C1020V-10 Parameter VOH VOL VIH VIL IIX IOZ ICC Description Output HIGH Voltage Output LOW Voltage Input HIGH Voltage Input LOW Voltage[1] Input Load Current Output Leakage Current VCC Operating Supply Current GND < VI < VCC GND < VI < VCC, Output Disabled VCC = M ax., IOUT = 0 mA, f = fMAX = 1/tRC Max. VCC, CE > VIH VIN > VIH or VIN < VIL, f = fMAX Max. VCC, CE > VCC – 0.3V, VIN > VCC – 0.3V, or VIN < 0.3V, f=0 L Test Conditions VCC = M in., IOH = – 4.0 mA VCC = M in., IOL = 8.0 mA 2.0 –0.5 –1 –2 Min. 2.4 0.4 VCC + 0.3V 0.8 +1 +2 130 100 15 L 7 1 L 100 2.0 –0.5 –1 –2 Max. 7C1020V-12 Min. 2.4 0.4 VCC + 0.3V 0.8 +1 +2 120 90 15 7 1 100 Max. Unit V V V V µA µA mA mA mA mA mA µA ISB1 Automatic CE Power-Down Current — TTL Inputs Automatic CE Power-Down Current — CMOS Inputs ISB2 Notes: 1. VIL (min.) = –2.0V for pulse durations of less than 20 ns. 2. TA is the “instant on” case temperature. 2 CY7C1020V Electrical Characteristics Over the Operating Range (continued) 7C1020V-15 Parameter VOH VOL VIH VIL IIX IOZ ICC Description Output HIGH Voltage Output LOW Voltage Input HIGH Voltage Input LOW Voltage[1] Input Load Current Output Leakage Current VCC Operating Supply Current GND < VI < VCC GND < VI < VCC, Output Disabled VCC = Max., IOUT = 0 mA, f = fMAX = 1/tRC Max. VCC, CE > VIH VIN > VIH or VIN < VIL, f = fMAX Max. VCC, CE > VCC – 0.3V, VIN > VCC – 0.3V, or VIN < 0.3V, f=0 L Test Conditions VCC = Min., IOH = – 4.0 mA VCC = Min., IOL = 8.0 mA 2.0 –0.5 –1 –2 Min. 2.4 0.4 VCC + 0.3V 0.8 +1 +2 110 80 15 L 7 1 L 100 2.0 –0.5 –1 –2 Max. 7C1020V-20 Min. 2.4 0.4 VCC + 0.3V 0.8 +1 +2 100 70 15 7 1 100 Max. Unit V V V V µA µA mA mA mA mA mA µA ISB1 Automatic CE Power-Down Current — TTL Inputs Automatic CE Power-Down Current — CMOS Inputs ISB2 Capacitance[3] Parameter CIN COUT Description Input Capacitance Output Capacitance Test Conditions TA = 25°C, f = 1 MHz, VCC = 3.3V Max. 8 8 Unit pF pF Notes: 3. Tested initially and after any design or process changes that may affect these parameters. AC Test Loads and Waveforms 3.3V OUTPUT 30 pF INCLUDING JIG AND SCOPE (a) OUTPUT Equivalent to: THÉVENIN EQUIVALENT R2 255Ω R 481 Ω R 481 Ω 3.3V OUTPUT 5 pF INCLUDING JIG AND SCOPE (b) 167Ω 30 pF R2 255Ω GND