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CY7C1049CV33-12ZSXAT

CY7C1049CV33-12ZSXAT

  • 厂商:

    EUPEC(英飞凌)

  • 封装:

    TSOP44

  • 描述:

    IC SRAM 4MBIT PARALLEL 44TSOP II

  • 数据手册
  • 价格&库存
CY7C1049CV33-12ZSXAT 数据手册
CY7C1049CV33 Automotive 4-Mbit (512 K × 8) Static RAM 4-Mbit (512 K × 8) Static RAM Features Functional Description ■ Temperature ranges ❐ Automotive -A: –40 °C to 85 °C ❐ Automotive-E: –40 °C to 125 °C The CY7C1049CV33 Automotive is a high performance CMOS Static RAM organized as 524,288 words by eight bits. Easy memory expansion is provided by an active LOW Chip Enable (CE), an active LOW Output Enable (OE), and three-state drivers. Writing to the device is accomplished by taking Chip Enable (CE) and Write Enable (WE) inputs LOW. Data on the eight I/O pins (I/O0 through I/O7) is then written into the location specified on the address pins (A0 through A18). ■ High speed ❐ tAA = 10 ns ■ Low active power ❐ 360 mW (max) ■ 2.0 V data retention ■ Automatic power down when deselected ■ TTL-compatible inputs and outputs ■ Easy memory expansion with CE and OE features Reading from the device is accomplished by taking Chip Enable (CE) and Output Enable (OE) LOW while forcing Write Enable (WE) HIGH. Under these conditions, the contents of the memory location specified by the address pins appear on the I/O pins. The eight input and output pins (I/O0 through I/O7) are placed in a high impedance state when the device is deselected (CE HIGH), the outputs are disabled (OE HIGH), or during a write operation (CE LOW, and WE LOW). The CY7C1049CV33 Automotive is available in standard 400-mil-wide 36-pin SOJ package and 44-pin TSOP II package with center power and ground (revolutionary) pinout. Logic Block Diagram IO0 INPUT BUFFER IO1 512K x 8 ARRAY IO3 IO4 IO5 IO6 CE • IO7 POWER DOWN A17 A18 A15 A13 A14 OE A16 COLUMN DECODER WE Cypress Semiconductor Corporation Document Number: 001-67511 Rev. *C IO2 SENSE AMPS ROW DECODER A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 198 Champion Court • San Jose, CA 95134-1709 • 408-943-2600 Revised March 21, 2014 CY7C1049CV33 Automotive Contents Selection Guide ................................................................ 3 Pin Configuration ............................................................. 3 Pin Definitions .................................................................. 3 Maximum Ratings ............................................................. 4 Operating Range ............................................................... 4 Electrical Characteristics ................................................. 4 Capacitance ...................................................................... 5 Thermal Resistance .......................................................... 5 AC Test Loads and Waveforms ....................................... 5 AC Switching Characteristics ......................................... 6 Switching Waveforms ...................................................... 7 Truth Table ........................................................................ 9 Ordering Information ...................................................... 10 Ordering Code Definitions ......................................... 10 Document Number: 001-67511 Rev. *C Package Diagrams .......................................................... 11 Acronyms ........................................................................ 13 Document Conventions ................................................. 13 Units of Measure ....................................................... 13 Document History Page ................................................. 14 Sales, Solutions, and Legal Information ...................... 15 Worldwide Sales and Design Support ....................... 15 Products .................................................................... 15 PSoC® Solutions ...................................................... 15 Cypress Developer Community ................................. 15 Technical Support ..................................................... 15 Page 2 of 15 CY7C1049CV33 Automotive Selection Guide Description Maximum Access Time -10 -12 -15 Unit 10 12 15 ns 100 95 – mA Maximum Operating Current Automotive-A Automotive-E – – 95 mA Maximum CMOS Standby Current Automotive-A 10 10 – mA Automotive-E – – 15 mA Pin Configuration Figure 1. 36-pin SOJ pinout (Top View) A0 A1 A2 A3 A4 CE I/O0 I/O1 VCC GND I/O2 I/O3 WE A5 A6 A7 A8 A9 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 Figure 2. 44-pin TSOP II pinout (Top View) NC NC A0 A1 A2 A3 A4 CE I/O0 I/O1 VCC VSS I/O2 I/O3 WE A5 A6 A7 A8 A9 NC NC NC A18 A17 A16 A15 OE I/O7 I/O6 GND VCC I/O5 I/O4 A14 A13 A12 A11 A10 NC 1 44 2 3 43 42 4 41 40 39 38 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 NC NC NC A18 A17 A16 A15 OE I/O7 I/O6 VSS VCC I/O5 I/O4 A14 A13 A12 A11 A10 NC NC NC Pin Definitions Pin Name 36-pin SOJ Pin Number 44-pin TSOP II Pin Number I/O Type A0–A18 1–5, 14–18, 20–24, 32–35 3–7, 16–20, 26–30, 38–41 Input I/O0–I/O7 7, 8, 11, 12, 25, 9, 10, 13, 14, 26, 29, 30 31, 32, 35, 36 Description Address inputs used to select one of the address locations. Input/Output Bidirectional data I/O lines. Used as input or output lines depending on operation. NC[1] 19, 36 1, 2, 21, 22, 23, 24, 25, 42, 43, 44 WE 13 15 Input/Control Write Enable input, active LOW. When selected LOW, a WRITE is conducted. CE 6 8 Input/Control Chip Enable input, active LOW. When LOW, selects the chip. When HIGH, deselects the chip. OE 31 37 Input/Control Output Enable, active LOW. Controls the direction of the I/O pins. When LOW, the I/O pins are allowed to behave as outputs. When deasserted HIGH, I/O pins are tri-state, and act as input data pins. VSS, GND 10, 28 12, 34 VCC 9, 27 11, 33 No Connect No connects. This pin is not connected to the die. Ground Ground for the device. Should be connected to ground of the system. Power Supply Power supply inputs to the device. Note 1. NC pins are not connected on the die. Document Number: 001-67511 Rev. *C Page 3 of 15 CY7C1049CV33 Automotive Input Voltage [2] .................................. –0.5 V to VCC + 0.5 V Maximum Ratings Exceeding maximum ratings may impair the useful life of the device. These user guidelines are not tested. Storage Temperature ............................... –65 C to +150C Ambient Temperature with Power Applied ......................................... –55 C to +125 C Supply Voltage on VCC to Relative GND [2] ......................... –0.5 V to +4.6 VDC Voltage Applied to Outputs in High Z State [2] ................................ –0.5 V to VCC + 0.5 V Current into Outputs (LOW) ........................................ 20 mA Static discharge voltage (MIL-STD-883, Method 3015) ................................. > 2001 V Latch up current ..................................................... > 200 mA Operating Range Range Ambient Temperature VCC Automotive-A –40 C to +85 C 3.3 V  0.3 V Automotive-E –40 C to +125 C Electrical Characteristics Over the Operating Range Parameter Description Test Conditions Min Max 2.4 – 2.4 – 2.4 – V – 0.4 – 0.4 – 0.4 V 2.0 VCC + 0.3 2.0 VCC + 0.3 2.0 VCC + 0.3 V –0.3 0.8 –0.3 0.8 –0.3 0.8 V Auto-A –1 +1 –1 +1 – – A Auto-E – – – – –20 +20 Auto-A – 100 – 95 – – Auto-E – – – – – 95 Max. VCC, CE > VIH; Auto-A Automatic CE Power Down Current VIN > VIH or VIN < VIL, Auto-E – TTL Inputs f = fMAX – 40 – 40 – – mA – – – – – 45 mA Auto-A – 10 – 10 – – mA Auto-E – – – – – 15 mA Output LOW Voltage VCC = Min; IOL = 8.0 mA Input HIGH Voltage VCC = Min; IOH = –4.0 mA Voltage[2] VIL Input LOW IIX Input Load Current ISB2 Unit Max VOL ISB1 -15 Min Output HIGH Voltage ICC -12 Max VOH VIH -10 Min VCC Operating Supply Current GND < VI < VCC VCC = Max, f = fMAX = 1/tRC Automatic CE Max. VCC, Power Down Current CE > VCC – 0.3 V, VIN > VCC – 0.3 V, or – CMOS Inputs VIN < 0.3 V, f = 0 mA Note 2. VIL(min) = –2.0 V and VIH(max) = VCC + 0.5 V for pulse durations of less than 20 ns. Document Number: 001-67511 Rev. *C Page 4 of 15 CY7C1049CV33 Automotive Capacitance Parameter [3] Description Test Conditions TA = 25 C, f = 1 MHz, VCC = 3.3 V CIN Input capacitance COUT Output capacitance Max Unit 8 pF 8 pF Thermal Resistance Parameter [3] Description JA Thermal resistance (junction to ambient) JC Thermal resistance (junction to case) Test Conditions 36-pin SOJ 44-pin TSOP II Unit Test conditions follow standard test methods and procedures for measuring thermal impedance, per EIA / JESD51. 46.51 41.66 °C/W 18.8 10.56 °C/W AC Test Loads and Waveforms Figure 3. AC Test Loads and Waveforms [4] 10-ns devices: 12-, 15-ns devices: Z = 50  OUTPUT 50  * CAPACITIVE LOAD CONSISTS OF ALL COMPONENTS OF THE TEST ENVIRONMENT 3.0 V GND 30 pF* OUTPUT (a) 90% (b) High Z characteristics: 10% (c) R 317 3.3 V 90% 10% R2 351 30 pF 1.5 V ALL INPUT PULSES Rise Time: 1 V/ns R 317 3.3 V Fall Time: 1 V/ns OUTPUT R2 351 5 pF (d) Notes 3. Tested initially and after any design or process changes that may affect these parameters. 4. AC characteristics (except High Z) for 10 ns parts are tested using the load conditions shown in Figure 3 (a). All other speeds are tested using the Thevenin load shown in Figure 3 (b). High Z characteristics are tested for all speeds using the test load shown in Figure 3 (d). Document Number: 001-67511 Rev. *C Page 5 of 15 CY7C1049CV33 Automotive AC Switching Characteristics Over the Operating Range Parameter [5] Description -10 -12 -15 Min Max Min Max Min Max Unit Read Cycle tpower[6] VCC(typical) to the first access 100 – 100 – 100 – s tRC Read Cycle Time 10 – 12 – 15 – ns tAA Address to Data Valid – 10 – 12 – 15 ns tOHA Data Hold from Address Change 3 – 3 – – 3 ns tACE CE LOW to Data Valid – 10 – 12 – 15 ns tDOE OE LOW to Data Valid – 5 – 6 – 7 ns 0 – 0 – 0 – ns – 5 – 6 – 7 ns 3 – 3 – 3 – ns – 5 – 6 – 7 ns tLZOE OE LOW to Low Z [7] [7, 8] tHZOE OE HIGH to High Z tLZCE CE LOW to Low Z [7] [7, 8] tHZCE CE HIGH to High Z tPU CE LOW to Power Up 0 – 0 – 0 – ns tPD CE HIGH to Power Down – 10 – 12 – 15 ns Write Cycle [9, 10] tWC Write Cycle Time 10 – 12 – 15 – ns tSCE CE LOW to Write End 7 – 8 – 10 – ns tAW Address Setup to Write End 7 – 8 – 10 – ns tHA Address Hold from Write End 0 – 0 – 0 – ns tSA Address Setup to Write Start 0 – 0 – 0 – ns tPWE WE Pulse Width 7 – 8 – 10 – ns tSD Data Setup to Write End 5 – 6 – 7 – ns tHD Data Hold from Write End 0 – 0 – 0 – ns WE HIGH to Low Z [7] 3 – 3 – 3 – ns WE LOW to High Z [7, 8] – 5 – 6 – 7 ns tLZWE tHZWE Notes 5. Test conditions assume signal transition time of 3 ns or less, timing reference levels of 1.5 V, input pulse levels of 0 to 3.0 V. 6. tPOWER gives the minimum amount of time that the power supply should be at stable, typical VCC values until the first memory access can be performed. 7. At any temperature and voltage condition, tHZCE is less than tLZCE, tHZOE is less than tLZOE, and tHZWE is less than tLZWE for any device. 8. tHZOE, tHZCE, and tHZWE are specified with a load capacitance of 5 pF as in part (d) of Figure 3 on page 5. Transition is measured ±500 mV from steady-state voltage. 9. The internal Write time of the memory is defined by the overlap of CE LOW, and WE LOW. CE and WE must be LOW to initiate a Write, and the transition of either of these signals can terminate the Write. The input data setup and hold timing should be referenced to the leading edge of the signal that terminates the Write. 10. The minimum Write cycle time for Write Cycle No. 2 (WE controlled, OE LOW) is the sum of tHZWE and tSD. Document Number: 001-67511 Rev. *C Page 6 of 15 CY7C1049CV33 Automotive Switching Waveforms Figure 4. Read Cycle No. 1 (Address Transition Controlled) [11, 12] tRC RC ADDRESS tOHA DATA OUT tAA PREVIOUS DATA VALID DATA VALID Figure 5. Read Cycle No. 2 (OE Controlled) [12, 13] ADDRESS tRC CE tACE OE tHZOE tDOE tHZCE tLZOE HIGH IMPEDANCE DATA OUT DATA VALID tLZCE tPD tPU VCC SUPPLY CURRENT HIGH IMPEDANCE 50% 50% ICC ISB Figure 6. Write Cycle No. 1 (WE Controlled, OE HIGH During Write) [14, 15] tWC ADDRESS tSCE CE tAW tSA tHA tPWE WE OE tSD DATA I/O NOTE 16 tHD DATA VALID tHZOE Notes 11. Device is continuously selected. OE, CE = VIL. 12. WE is HIGH for read cycles. 13. Address valid before or similar to CE transition LOW. 14. Data I/O is high impedance if OE = VIH. 15. If CE goes HIGH simultaneously with WE HIGH, the output remains in high impedance state. 16. During this period, the I/Os are in output state. Do not apply input signals. Document Number: 001-67511 Rev. *C Page 7 of 15 CY7C1049CV33 Automotive Switching Waveforms (continued) Figure 7. Write Cycle No. 2 (WE Controlled, OE LOW) [17, 18] tWC ADDRESS tSCE CE tAW tSA tHA tPWE WE tSD DATA I/O NOTE 19 tHD DATA VALID tHZWE tLZWE Notes 17. If CE goes HIGH simultaneously with WE HIGH, the output remains in high impedance state. 18. The minimum Write cycle time for Write Cycle No. 2 (WE controlled, OE LOW) is the sum of tHZWE and tSD. 19. During this period, the I/Os are in output state. Do not apply input signals. Document Number: 001-67511 Rev. *C Page 8 of 15 CY7C1049CV33 Automotive Truth Table CE OE WE I/O0–I/O7 H X X High Z Power Down Standby (ISB) L L H Data Out Read Active (ICC) L X L Data In Write Active (ICC) L H H High Z Selected, Outputs Disabled Active (ICC) Document Number: 001-67511 Rev. *C Mode Power Page 9 of 15 CY7C1049CV33 Automotive Ordering Information Speed (ns) Ordering Code Package Diagram Package Type Operating Range 10 CY7C1049CV33-10VXA 51-85090 36-pin (400-Mil) Molded SOJ (Pb-free) Automotive-A 12 CY7C1049CV33-12ZSXA 51-85087 44-pin TSOP II (Pb-free) Automotive-A 15 CY7C1049CV33-15VXE 51-85090 36-pin (400-Mil) Molded SOJ (Pb-free) Automotive-E CY7C1049CV33-15ZSXE 51-85087 44-pin TSOP II (Pb-free) Automotive-E Ordering Code Definitions CY 7 C 1 04 9 C V33 - XX XX X X Temperature Range: X = A or E A = Automotive-A or E = Automotive-E X = Pb-free; X Absent = Leaded Package Type: XX = V or ZS V = 36-pin (400-Mil) Molded SOJ ZS = 44-pin TSOP II Speed Grade: XX = 10 ns or 12 ns or 15 ns V33 = 3.0 V to 3.6 V Process Technology: C  150 nm Data width: 9 = × 8-bits Density: 04 = 4-Mbit density Family Code: 1 = Fast Asynchronous SRAM Technology Code: C = CMOS Marketing Code: 7 = SRAM Company ID: CY = Cypress Document Number: 001-67511 Rev. *C Page 10 of 15 CY7C1049CV33 Automotive Package Diagrams Figure 8. 36-pin SOJ V36.4 (Molded) Package Outline, 51-85090 51-85090 *F Document Number: 001-67511 Rev. *C Page 11 of 15 CY7C1049CV33 Automotive Package Diagrams (continued) Figure 9. 44-pin TSOP Z44-II Package Outline, 51-85087 51-85087 *E Document Number: 001-67511 Rev. *C Page 12 of 15 CY7C1049CV33 Automotive Acronyms Acronym Document Conventions Description Units of Measure CE Chip Enable CMOS Complementary Metal Oxide Semiconductor °C degree Celsius I/O Input/Output MHz megahertz OE Output Enable µA microampere SOJ Small Outline J-lead µs microsecond SRAM Static Random Access Memory mA milliampere TSOP Thin Small Outline Package mm millimeter TTL Transistor-Transistor Logic ms millisecond WE Write Enable mW milliwatt Document Number: 001-67511 Rev. *C Symbol Unit of Measure ns nanosecond  ohm % percent pF picofarad V volt W watt Page 13 of 15 CY7C1049CV33 Automotive Document History Page Document Title: CY7C1049CV33 Automotive, 4-Mbit (512 K × 8) Static RAM Document Number: 001-67511 Rev. ECN Orig. of Change Submission Date ** 3186792 PRAS 03/03/2011 Separation of the automotive data sheet from CY7C1049CV33 spec no. 38-05006 Rev. *J. Further rev of 38-05006 would include only industrial / commercial parts. *A 3265070 PRAS 05/24/2011 Updated Functional Description (Removed “For best practice recommendations, refer to the Cypress application note AN1064, SRAM System Guidelines.”). Updated in new template. *B 3546915 NILE 03/09/2012 Updated Pin Definitions (Updated description of WE and OE pins). Updated Package Diagrams. *C 4311615 NILE / VINI 03/21/2014 Updated Maximum Ratings: Added “Static discharge voltage” and “Latch up current” details. Description of Change Updated AC Switching Characteristics: Updated Note 10. Updated Switching Waveforms: Added Note 18 and referred the same note in Figure 7. Updated Package Diagrams: spec 51-85087 – Changed revision from *D to *E. Updated in new template. Completing Sunset Review. Document Number: 001-67511 Rev. *C Page 14 of 15 CY7C1049CV33 Automotive Sales, Solutions, and Legal Information Worldwide Sales and Design Support Cypress maintains a worldwide network of offices, solution centers, manufacturer’s representatives, and distributors. To find the office closest to you, visit us at Cypress Locations. PSoC® Solutions Products Automotive Clocks & Buffers Interface Lighting & Power Control cypress.com/go/automotive cypress.com/go/clocks cypress.com/go/interface cypress.com/go/powerpsoc cypress.com/go/plc Memory cypress.com/go/memory PSoC Touch Sensing cypress.com/go/psoc PSoC 1 | PSoC 3 | PSoC 4 | PSoC 5LP Cypress Developer Community Community | Forums | Blogs | Video | Training Technical Support cypress.com/go/support cypress.com/go/touch USB Controllers Wireless/RF psoc.cypress.com/solutions cypress.com/go/USB cypress.com/go/wireless © Cypress Semiconductor Corporation, 2011-2014. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be used for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress. Furthermore, Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges. Any Source Code (software and/or firmware) is owned by Cypress Semiconductor Corporation (Cypress) and is protected by and subject to worldwide patent protection (United States and foreign), United States copyright laws and international treaty provisions. Cypress hereby grants to licensee a personal, non-exclusive, non-transferable license to copy, use, modify, create derivative works of, and compile the Cypress Source Code and derivative works for the sole purpose of creating custom software and or firmware in support of licensee product to be used only in conjunction with a Cypress integrated circuit as specified in the applicable agreement. Any reproduction, modification, translation, compilation, or representation of this Source Code except as specified above is prohibited without the express written permission of Cypress. Disclaimer: CYPRESS MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS MATERIAL, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. Cypress reserves the right to make changes without further notice to the materials described herein. Cypress does not assume any liability arising out of the application or use of any product or circuit described herein. Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress’ product in a life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges. Use may be limited by and subject to the applicable Cypress software license agreement. Document Number: 001-67511 Rev. *C Revised March 21, 2014 All products and company names mentioned in this document may be the trademarks of their respective holders. Page 15 of 15
CY7C1049CV33-12ZSXAT 价格&库存

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