CY7C167A-35VC

67A CY7C167A 16K x 1 Static RAM Features Functional Description • Automatic power-down when deselected • CMOS for optimum speed/power • High speed — 15 ns • Low active power — 495 mW • Low standby power — 220 mW • TTL-compatible inputs and outputs • Capable of withstanding greater than 2001V electrostatic discharge • VIH of 2.2V The CY7C167A is a high-performance CMOS static RAM organized as 16,384 words by 1 bit. Easy memory expansion is provided by an active LOW Chip Enable (CE) and three-state drivers. The CY7C167A has an automatic power-down feature, reducing the power consumption by 67% when deselected. Writing to the device is accomplished when the Chip Select (CE) and Write Enable (WE) inputs are both LOW. Data on the input pin (DI) is written into the memory location specified on the address pins (A0 through A13). Reading the device is accomplished by taking the Chip Enable (CE) LOW, while (WE) remains HIGH. Under these conditions, the contents of the location specified on the address pins will appear on the data output (DO) pin. The output pin remains in a high-impedance state when Chip Enable is HIGH, or Write Enable (WE) is LOW. A die coat is used to insure alpha immunity. Logic Block Diagram Pin Configuration DIP Top View DI A0 A1 A2 A3 A4 A5 A6 DO SENSE AMP A0 A1 A2 A3 A4 A5 A6 ROW DECODER INPUT BUFFER 128 x 128 ARRAY DO WE GND 1 20 2 19 3 18 4 17 5 7C167A 16 6 15 7 14 8 13 9 12 10 11 VCC A13 A12 A11 A10 A9 A8 A7 DI CE C167A-2 CE POWER DOWN WE A13 A11 A12 A9 A10 A8 A7 COLUMN DECODER C167A-1 Selection Guide 7C167A-15 7C167A-20 7C167A-25 7C167A-35 7C167A-45 Maximum Access Time (ns) 15 20 25 35 45 Maximum Operating Current (mA) 90 90 90 90 90 3901 North First Street • Cypress Semiconductor Corporation Document #: 38-05027 Rev. ** • San Jose • CA 95134 • 408-943-2600 Revised August 24, 2001 CY7C167A DC Input Voltage ................................................. −3.0V to +7.0V Maximum Ratings (Above which the useful life may be impaired. For user guidelines, not tested.) Storage Temperature .....................................−65°C to +150°C Ambient Temperature with Power Applied..................................................−55°C to +125°C Supply Voltage to Ground Potential (Pin 20 to Pin 10)................................................ −0.5V to +7.0V Output Current into Outputs (LOW)............................. 20 mA Static Discharge Voltage ........................................... >2001V (per MIL-STD-883, Method 3015) Latch-Up Current..................................................... >200 mA Operating Range DC Voltage Applied to Outputs in High Z State .................................................... −0.5V to +7.0V Range Commercial Ambient Temperature[1] VCC 0°C to +70°C 5V ± 10% Electrical Characteristics Over the Operating Range Parameter Description Test Conditions VOH Output High Voltage VCC = Min., IOH = −4.0 mA VOL Output Low Voltage VCC = Min., IOL = 12.0 mA, 8.0 mA Mil VIH Input High Voltage 7C167A-15 7C167A-20 7C167A-25 Min. Min. Min. Max. 2.4 Max. 2.4 0.4 2.2 Max. 2.4 V 0.4 VCC 2.2 VCC 2.2 Unit 0.4 V VCC V VIL Input Low Voltage −0.5 0.8 −0.5 0.8 −0.5 0.8 V IIX Input Load Current GND < VI < VCC −10 +10 −10 +10 −10 +10 µA IOZ Output Leakage Current GND < VO < VCC Output Disabled −10 +10 −10 +10 −10 +10 µA IOS Output Short Circuit Current[3] VCC = Max., VOUT = GND −350 −350 −350 mA ICC VCC Operating Supply Current VCC = Max., IOUT = 0 mA 90 90 90 mA ISB Automatic CE Power-Down Current[4] Max. VCC, CE > VIH 40 40 20 mA Max. Unit [2] 7C167A-35 Parameter Description Test Conditions Min. Max. VOH Output High Voltage VCC = Min., IOH = −4.0 mA VOL Output Low Voltage VCC = Min., IOL = 12.0 mA, 8.0 mA Mil VIH Input High Voltage 2.2 VCC VIL Input Low Voltage[2] −0.5 0.8 IIX Input Load Current GND < VI < VCC −10 +10 IOZ Output Leakage Current GND < VO < VCC Output Disabled −10 +10 IOS Output Short Circuit Current[3] VCC = Max., VOUT = GND ICC VCC Operating Supply Current ISB Automatic CE Power-Down Current[4] 2.4 7C167A-45 Min. 2.4 0.4 V 0.4 V 2.2 VCC V −0.5 0.8 V −10 +10 µA −10 +10 µA −350 −350 mA VCC = Max., IOUT = 0 mA 90 90 mA Max. VCC, CE > VIH 20 20 mA Notes: 1. TA is the case temperature. 2. VIL min. = −3.0V for pulse durations less than 30 ns. 3. Duration of the short circuit should not exceed 30 seconds. 4. A pull-up resistor to VCC on the CE input is required to keep the device deselected during VCC power-up, otherwise ISB will exceed values given. Document #: 38-05027 Rev. ** Page 2 of 9 CY7C167A Capacitance[5] Parameter Description Input Capacitance Output Capacitance Chip Enable Capacitance CIN COUT CCE Test Conditions TA = 25°C, f = 1 MHz, VCC = 5.0V Max. 10 10 6 Unit pF pF pF AC Test Loads and Waveforms R1 329Ω R1 329Ω 5V ALL INPUT PULSES 5V OUTPUT 3.0V OUTPUT R2 202Ω 30 pF INCLUDING JIG AND SCOPE Equivalent to: INCLUDING JIG AND SCOPE (a) THÉVENIN EQUIVALENT 125Ω OUTPUT GND R2 202Ω 5 pF 90% 10% 90% 10% < 5 ns < 5 ns C167A-4 (b) C167A-3 1.9V Switching Characteristics Over the Operating Range[6] Parameter Description 7C167A-15 7C167A-20 7C167A-25 7C167A-35 7C167A-45 Min. Min. Min. Min. Min. Max. Max. Max. Max. Max. Unit READ CYCLE tRC Read Cycle Time tAA Address to Data Valid 15 tOHA Data Hold from Address Change tACE CE LOW to Data Valid tLZCE CE LOW to Low Z[7] 5 CE HIGH to High Z tPU CE LOW to Power-Up tPD CE HIGH to Power-Down 25 20 5 15 5 [7, 8] tHZCE 20 15 5 20 5 8 0 25 8 ns 5 35 5 10 0 20 ns 30 5 5 0 15 30 25 45 5 15 0 20 ns ns 15 0 20 ns ns ns 25 ns WRITE CYCLE[9] tWC Write Cycle Time 15 20 20 25 40 ns tSCE CE LOW to Write End 12 15 20 25 30 ns tAW Address Set-Up to Write End 12 15 20 25 30 ns tHA Address Hold from Write End 0 0 0 0 0 ns tSA Address Set-Up to Write Start 0 0 0 0 0 ns tPWE WE Pulse Width 12 15 15 20 20 ns tSD Data Set-Up to Write End 10 10 10 15 15 ns tHD Data Hold from Write End 0 0 0 0 0 ns [7, 8] tHZWE WE LOW to High Z tLZWE WE HIGH to Low Z[7] 7 5 7 5 7 5 10 5 15 5 ns ns Notes: 5. Tested initially and after any design or process changes that may affect these parameters. 6. Test conditions assume signal transition times of 5 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V, and output loading of the specified IOL/IOH and 30-pF load capacitance. 7. At any given temperature and voltage condition, tHZ is less than tLZ for any given device. 8. tHZCE and tHZWE are tested with CL = 5 pF as in part (b) of AC Test Loads. Transition is measured ±500 mV from steady state voltage. 9. The internal write time of the memory is defined by the overlap of CE LOW and WE LOW. Both signal must be LOW to initiate a write and either signal can terminate a write by going HIGH. The data input set-up and hold timing should be referenced to the rising edge of the signal that terminates the write. Document #: 38-05027 Rev. ** Page 3 of 9 CY7C167A Switching Waveforms Read Cycle No. 1[10, 11] tRC ADDRESS tOHA DATA OUT tAA DATA VALID PREVIOUS DATA VALID C167A-5 Read Cycle No. 2 [10, 12] tRC CE tACE tLZCE DATA OUT tHZCE HIGH IMPEDANCE VCC SUPPLY CURRENT HIGH IMPEDANCE DATA VALID tPD tPU ICC 50% 50% ISB C167A-6 Write Cycle No. 1 (WE Controlled)[9] tWC ADDRESS tSCE CE tSA tAW tHA tPWE WE tSD DATAIN VALID DATA IN tHZWE DATA I/O tHD tLZWE HIGH IMPEDANCE DATA UNDEFINED C167A-7 Notes: 10. WE is high for read cycle. 11. Device is continuously selected, CE = VIL. 12. Address valid prior to or coincident with CE transition LOW. Document #: 38-05027 Rev. ** Page 4 of 9 CY7C167A Switching Waveforms (continued) Write Cycle No. 2 (CE Controlled)[9, 13] tWC ADDRESS tSA tSCE CE tAW tHA tPWE WE tSD tHD DATAIN VALID DATA IN tHZWE HIGH IMPEDANCE DATA I/O DATA UNDEFINED C167A-8 Note: 13. If CE goes HIGH simultaneously with WE HIGH, the output remains in a high-impedance state. Document #: 38-05027 Rev. ** Page 5 of 9 CY7C167A Typical DC and AC Characteristics SB 1.2 1.2 ICC 0.8 0.6 0.4 0.2 4.5 1.0 0.8 0.6 0.4 VCC = 5.0V VIN = 5.0V 0.2 ISB 5.0 5.5 ISB 0.0 −55 6.0 1.6 1.3 1.4 NORMALIZED tAA NORMALIZED tAA 1.4 1.2 TA = 25°C 1.0 1.2 1.0 VCC = 5.0V 0.8 0.9 4.5 5.0 5.5 6.0 0.6 -55 TYPICAL POWER-ON CURRENT vs. SUPPLY VOLTAGE 20 10 0 0 DELTA tAA (ns) 2.5 2.0 1.5 1.0 25 4.0 SUPPLY VOLTAGE (V) Document #: 38-05027 Rev. ** 5.0 0.0 3.0 4.0 OUTPUT SINK CURRENT vs. OUTPUT VOLTAGE 150 125 100 75 VCC = 5.0V TA = 25°C 50 25 0 0.0 125 20.0 VCC = 4.5V TA = 25°C 0.5 3.0 2.0 1.0 2.0 3.0 4.0 5.0 OUTPUT VOLTAGE (V) NORMALIZED ICC vs. CYCLE TIME 1.1 10.0 2.0 1.0 OUTPUT VOLTAGE (V) 30.0 1.0 VCC = 5.0V TA = 25°C 30 TYPICAL ACCESS TIME CHANGE vs. OUTPUT LOADING 3.0 NORMALIZED IPO 40 AMBIENT TEMPERATURE (°C) SUPPLY VOLTAGE (V) 0.0 0.0 50 125 NORMALIZED ACCESS TIME vs. AMBIENT TEMPERATURE NORMALIZED ACCESS TIME vs. SUPPLY VOLTAGE 0.8 4.0 60 AMBIENT TEMPERATURE (°C) SUPPLY VOLTAGE (V) 1.1 25 OUTPUT SOURCE CURRENT vs. OUTPUT VOLTAGE 0 200 400 600 800 1000 CAPACITANCE (pF) NORMALIZED ICC 0.0 4.0 ICC OUTPUT SINK CURRENT (mA) 1.0 NORMALIZED I,CCI NORMALIZED I,CCI SB 1.4 OUTPUT SOURCE CURRENT (mA) NORMALIZED SUPPLY CURRENT vs. AMBIENT TEMPERATURE NORMALIZED SUPPLY CURRENT vs. SUPPLY VOLTAGE VCC = 5.0V TA = 25°C VIH = 0.5V 1.0 0.9 0.8 10 20 30 40 CYCLE FREQUENCY (MHz) Page 6 of 9 CY7C167A Ordering Information Speed (ns) ICC (mA) 15 80 20 25 35 45 80 60 60 50 Ordering Code Package Name Package Type CY7C167A-15PC P5 20-Lead (300-Mil) Molded DIP CY7C167A-15VC V5 20-Lead Molded SOJ CY7C167A-20PC P5 20-Lead (300-Mil) Molded DIP CY7C167A-20VC V5 20-Lead Molded SOJ CY7C167A-25PC P5 20-Lead (300-Mil) Molded DIP CY7C167A-25VC V5 20-Lead Molded SOJ CY7C167A-35PC P5 20-Lead (300-Mil) Molded DIP CY7C167A-35VC V5 20-Lead Molded SOJ CY7C167A-45PC P5 20-Lead (300-Mil) Molded DIP CY7C167A-45VC V5 20-Lead Molded SOJ Document #: 38-05027 Rev. ** Operating Range Commercial Commercial Commercial Commercial Commercial Page 7 of 9 CY7C167A Package Diagrams 20-Lead (300-Mil) Molded DIP P5 51-85011-A 20-Lead (300-Mil) Molded SOJ V5 51-85029-A Document #: 38-05027 Rev. ** Page 8 of 9 © Cypress Semiconductor Corporation, 2001. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress Semiconductor product. Nor does it convey or imply any license under patent or other rights. Cypress Semiconductor does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges. CY7C167A Document Title: CY7C167A 16K x 1 Static RAM Document Number: 38-05027 REV. ECN NO. Issue Date Orig. of Change Description of Change ** 106813 09/10/01 SZV Change from Spec number: 38-00093 to 38-05027 Document #: 38-05027 Rev. ** Page 9 of 9