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CY7C197N-45PXC

CY7C197N-45PXC

  • 厂商:

    CYPRESS(赛普拉斯)

  • 封装:

    DIP24

  • 描述:

    STANDARD SRAM, 256KX1, 45NS

  • 数据手册
  • 价格&库存
CY7C197N-45PXC 数据手册
CY7C197N 256Kx1 Static RAM Features Functional Description • High speed The CY7C197N is a high-performance CMOS static RAM organized as 256K words by 1 bit. Easy memory expansion is provided by an active LOW Chip Enable (CE) and three-state drivers. The CY7C197N has an automatic power-down feature, reducing the power consumption by 75% when deselected. — 25 ns • CMOS for optimum speed/power • Low active power — 880 mW Writing to the device is accomplished when the Chip Enable (CE) and Write Enable (WE) inputs are both LOW. Data on the input pin (DIN) is written into the memory location specified on the address pins (A0 through A17). • Low standby power — 220 mW • TTL-compatible inputs and outputs Reading the device is accomplished by taking chip enable (CE) LOW while Write Enable (WE) remains HIGH. Under these conditions the contents of the memory location specified on the address pins will appear on the data output (DOUT) pin. • Automatic power-down when deselected The output pin stays in a high-impedance state when Chip Enable (CE) is HIGH or Write Enable (WE) is LOW. The CY7C197N utilizes a die coat to insure alpha immunity. Logic Block Diagram Pin Configurations DI DIP Top View SENSE AMPS ROW DECODER INPUT BUFFER A13 A14 A15 A16 A17 A0 A1 A2 A3 A4 1024 x 256 ARRAY COLUMN DECODER A0 A1 A2 A3 A4 A5 A6 A7 A8 DO DOUT WE GND POWER DOWN A5 A6 A7 A8 A9 A10 A11 A12 1 24 2 23 22 3 4 21 5 20 6 7C197 19 18 7 8 17 9 16 10 15 14 11 12 13 VCC A17 A16 A15 A14 A13 A12 A11 A10 A9 DIN CE CE WE Selection Guide -25 -45 Maximum Access Time (ns) 25 45 Maximum Operating Current (mA) 95 Maximum Standby Current (mA) 30 Cypress Semiconductor Corporation Document #: 001-06495 Rev. ** • 198 Champion Court • 30 San Jose, CA 95134-1709 • 408-943-2600 Revised February 2, 2006 [+] Feedback CY7C197N DC Input Voltage[1] ................................ –0.5V to VCC + 0.5V Maximum Ratings (Above which the useful life may be impaired. For user guidelines, not tested.) Storage Temperature ................................. –65°C to +150°C Ambient Temperature with Power Applied............................................. –55°C to +125°C Output Current into Outputs (LOW)............................. 20 mA Static Discharge Voltage........................................... >2001V (per MIL-STD-883, Method 3015) Latch-Up Current .................................................... >200 mA Operating Range Supply Voltage to Ground Potential (Pin 24 to Pin 12) ........................................... –0.5V to +7.0V DC Voltage Applied to Outputs in High Z State[1] ....................................–0.5V to VCC + 0.5V Range Ambient Temperature VCC Commercial 0°C to +70°C 5V ± 10% Electrical Characteristics Over the Operating Range -25, -45 Parameter Description Test Conditions VOH Output HIGH Voltage VCC = Min., IOH = –4.0 mA VOL Output LOW Voltage VCC = Min., IOL =12.0 mA VIH Input HIGH Voltage Voltage[1] Min. Max. Unit 2.4 V 0.4 V 2.2 VCC + 0.3V V –0.5 0.8 V +5 mA VIL Input LOW IIX Input Load Current GND < VI < VCC –5 IOZ Output Leakage Current GND < VO < VCC, Output Disabled –5 IOS Output Short Circuit Current[2] VCC = Max., VOUT = GND ICC VCC Operating Supply Current ISB1 ISB2 +5 mA -300 mA VCC = Max., IOUT = 0 mA, f = fMAX = 1/tRC 95 mA Automatic CE Power-Down Current—TTL Inputs[3] Max. VCC, CE > VIH, VIN > VIH or VIN < VIL, f = fMAX 30 mA Automatic CE Power-Down Current—CMOS Inputs[3] Max. VCC, CE > VCC – 0.3V, VIN > VCC – 0.3V or VIN < 0.3V 15 mA Capacitance[4] Parameter Description CIN Input Capacitance COUT Output Capacitance Test Conditions TA = 25°C, f = 1 MHz, VCC = 5.0V Max. Unit 8 pF 10 pF Note: 1. V(min.) = -2.0V for pulse durations of less than 20 ns. 2. Not more than one output should be shorted at one time. Duration of the short circuit should not exceed 30 seconds. 3. A pull-up resistor to VCC on the CE input is required to keep the device deselected during VCC power-up, otherwise ISB will exceed values given. 4. Tested initially and after any design or process changes that may affect these parameters. 5. tr = < 5 ns for the -25 and slower speeds. Document #: 001-06495 Rev. ** Page 2 of 7 [+] Feedback CY7C197N AC Test Loads and Waveforms[5] R1 329Ω R1 329Ω 5V 5V OUTPUT ALL INPUT PULSES OUTPUT 30 pF INCLUDING JIG AND SCOPE (a) 3.0V R2 5 pF 202Ω (255Ω MIL) INCLUDING JIG AND SCOPE 90% 10% 90% 10% R2 255Ω (255Ω MIL) GND < tr < tr (b) Equivalent to: THÉVENIN EQUIVALENT 125Ω OUTPUT 1.90V Commercial Switching Characteristics Over the Operating Range[8] -25 Parameter Description Min. -45 Max. Min. Max. Unit READ CYCLE tRC Read Cycle Time tAA Address to Data Valid 25 tOHA Output Hold from Address Change tACE CE LOW to Data Valid Z[9] 3 CE LOW to Low tHZCE CE HIGH to High Z[9, 10] 0 tPU CE LOW to Power-Up 0 WRITE 3 3 CE HIGH to Power-Down ns 45 25 tLZCE tPD 45 25 ns 45 3 11 0 ns ns 15 0 20 ns ns ns 30 ns CYCLE[11] tWC Write Cycle Time 25 45 ns tSCE CE LOW to Write End 20 40 ns tAW Address Set-Up to Write End 20 40 ns tHA Address Hold from Write End 0 0 ns tSA Address Set-Up to Write Start 0 0 ns tPWE WE Pulse Width 20 30 ns tSD Data Set-Up to Write End 15 20 ns tHD Data Hold from Write End 0 0 ns tLZWE WE HIGH to Low Z[9] 3 3 ns tHZWE [9, 10] WE LOW to High Z 0 11 0 15 ns Note: 6. Tested initially and after any design or process changes that may affect these parameters. 7. tr = < 5 ns for the -25 and slower speeds. 8. Test conditions assume signal transition time of 5 ns or less for -25 and slower speeds, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V, and output loading of the specified IOL/IOH and 30-pF load capacitance. 9. At any given temperature and voltage condition, tHZCE is less than tLZCE and tHZWE is less than tLZWE for any given device. 10. tHZCE and tHZWE are specified with CL = 5 pF as in part (b) in AC Test Loads and Waveforms. Transition is measured ±500 mV from steady-state voltage. 11. The internal write time of the memory is defined by the overlap of CE LOW and WE LOW. Both signals must be LOW to initiate a write and either signal can terminate a write by going HIGH. The data input set-up and hold timing should be referenced to the rising edge of the signal that terminates the write. Document #: 001-06495 Rev. ** Page 3 of 7 [+] Feedback CY7C197N Switching Waveforms Read Cycle No. 1[12, 13] tRC ADDRESS tOHA DATA OUT tAA DATA VALID PREVIOUS DATA VALID Read Cycle No. 2[12] tRC CE tACE tHZCE tLZCE DATA OUT VCC SUPPLY CURRENT HIGH IMPEDANCE HIGH IMPEDANCE DATA VALID tPD tPU ICC 50% 50% ISB Write Cycle No. 1 (WE Controlled)[11] tWC ADDRESS tSCE CE tSA tAW tHA tPWE WE tSD DATA IN DATA VALID tHZWE DATA OUT tHD DATA UNDEFINED tLZWE HIGH IMPEDANCE C197-8 Notes: 12. WE is HIGH for read cycle. 13. Device is continuously selected, CE = VIL. 14. If CE goes HIGH simultaneously with WE HIGH, the output remains in a high-impedance state. Document #: 001-06495 Rev. ** Page 4 of 7 [+] Feedback CY7C197N Switching Waveforms (continued) Write Cycle No. 2 (CE Controlled)[11, 14] tWC ADDRESS tSA tSCE CE tAW tHA tPWE WE tHD tSD DATA IN DATA VALID HIGH IMPEDANCE DATA OUT 1.2 ICC 1.0 0.8 VIN = 5.0V TA = 25°C 0.6 0.4 0.2 ISB 0.0 4.0 4.5 5.0 5.5 ICC 1.2 1.0 0.8 0.6 VIN = 5.0V VCC = 5.0V 0.4 0.2 ISB 0.0 –55 6.0 SUPPLY VOLTAGE (V) NORMALIZED ACCESS TIME vs. AMBIENT TEMPERATURE 1.4 1.6 1.3 1.4 1.1 TA = 25°C 1.0 0.9 0.8 4.0 4.5 5.0 5.5 6.0 SUPPLY VOLTAGE(V) Document #: 001-06495 Rev. ** NORMALIZED tAA NORMALIZED tAA NORMALIZED ACCESS TIME vs. SUPPLY VOLTAGE 1.2 25 125 AMBIENT TEMPERATURE (°C) 1.2 1.0 VCC = 5.0V 0.8 0.6 −55 25 125 AMBIENT TEMPERATURE(°C) OUTPUT SINK CURRENT (mA) 1.4 NORMALIZED ICC, ISB NORMALIZED ICC, ISB 1.4 NORMALIZED SUPPLY CURRENT vs. AMBIENT TEMPERATURE NORMALIZED SUPPLY CURRENT vs. SUPPLY VOLTAGE OUTPUT SOURCE CURRENT (mA) Typical DC and AC Characteristics OUTPUT SOURCE CURRENT vs. OUTPUT VOLTAGE 120 100 80 VCC = 5.0V TA = 25°C 60 40 20 0 0.0 140 1.0 2.0 3.0 4.0 OUTPUT VOLTAGE(V) OUTPUT SINK CURRENT vs. OUTPUT VOLTAGE 120 100 80 60 VCC = 5.0V TA = 25°C 40 20 0 0.0 1.0 2.0 3.0 4.0 OUTPUT VOLTAGE(V) Page 5 of 7 [+] Feedback CY7C197N 25.0 20.0 2.0 1.5 1.0 0.5 0.0 0.0 15.0 VCC = 4.5V TA = 25°C 10.0 5.0 1.0 2.0 3.0 4.0 5.0 0.0 0 200 SUPPLY VOLTAGE (V) 400 600 800 1000 NORMALIZED ICC vs. CYCLE TIME 1.25 NORMALIZED ICC 2.5 (ns) TYPICAL POWER-ON CURRENT vs. SUPPLY VOLTAGE NORMALIZED IPO 3.0 TYPICAL ACCESS TIME CHANGE vs. OUTPUT LOADING 30.0 DELTA tAA Typical DC and AC Characteristics (continued) 1.00 VCC = 5.0V TA = 25°C VIN = 5.0V 0.75 0.50 10 CAPACITANCE (pF) 20 30 40 CYCLE FREQUENCY (MHz) CY7C197N Truth Table CE WE Input/Output Mode H X High Z Deselect/Power-Down L H Data Out Read L L Data In Write Ordering Information Speed (ns) Ordering Code Package Diagram Operating Range Package Type 25 CY7C197N-25PXC 51-85013 24-Lead (300-Mil) Molded DIP (Pb-free) Commercial 45 CY7C197N-45PXC 51-85013 24-Lead (300-Mil) Molded DIP (Pb-free) Commercial Please contact local sales representative regarding availability of these parts. Package Diagram 24-Lead (300-Mil) PDIP (51-85013) 51-85013-*B All products and company names mentioned in this document may be the trademarks of their respective holders. Document #: 001-06495 Rev. ** Page 6 of 7 © Cypress Semiconductor Corporation, 2006. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be used for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress. Furthermore, Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges. [+] Feedback CY7C197N Document History Page Document Title: CY7C197N 256Kx1 Static RAM Document Number: 001-06495 REV. ECN NO. Issue Date Orig. of Change Description of Change ** 424111 See ECN NXR New Data Sheet Document #: 001-06495 Rev. ** Page 7 of 7 [+] Feedback
CY7C197N-45PXC 价格&库存

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