CY7C199
32K x 8 Static RAM
Features
• High speed
— 10 ns
• Fast tDOE
• CMOS for optimum speed/power
• Low active power
— 467 mW (max, 12 ns “L” version)
• Low standby power
— 0.275 mW (max, “L” version)
• 2V data retention (“L” version only)
• Easy memory expansion with CE and OE features
• TTL-compatible inputs and outputs
• Automatic power-down when deselected
Functional Description
is provided by an active LOW Chip Enable (CE) and active
LOW Output Enable (OE) and three-state drivers. This device
has an automatic power-down feature, reducing the power
consumption by 81% when deselected. The CY7C199 is in the
standard 300-mil-wide DIP, SOJ, and LCC packages.
An active LOW Write Enable signal (WE) controls the
writing/reading operation of the memory. When CE and WE
inputs are both LOW, data on the eight data input/output pins
(I/O0 through I/O7) is written into the memory location
addressed by the address present on the address pins (A0
through A14). Reading the device is accomplished by selecting
the device and enabling the outputs, CE and OE active LOW,
while WE remains inactive or HIGH. Under these conditions,
the contents of the location addressed by the information on
address pins are present on the eight data input/output pins.
The input/output pins remain in a high-impedance state unless
the chip is selected, outputs are enabled, and Write Enable
(WE) is HIGH. A die coat is used to improve alpha immunity.
The CY7C199 is a high-performance CMOS static RAM
organized as 32,768 words by 8 bits. Easy memory expansion
Logic Block Diagram
Pin Configurations
DIP / SOJ / SOIC
Top View
INPUT BUFFER
I/O1
ROW DECODER
I/O2
SENSE AMPS
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
1024 x 32 x 8
ARRAY
I/O3
I/O4
I/O5
CE
WE
I/O6
POWER
DOWN
COLUMN
DECODER
I/O7
A 14
A 12
A 13
A 11
A 10
OE
OE
A1
A2
A3
A4
WE
V CC
A5
A6
A7
A8
A9
A 10
A 11
A7
A6
A5
VCC
WE
28
27
26
25
24
23
22
21
20
19
18
17
16
15
1
2
3
4
5
6
7
8
9
10
11
12
13
14
VCC
WE
A4
A3
A2
A1
A8
A9
A10
A11
A12
A13
A14
I/O0
I/O1
OE
A0
CE
I/O7
I/O6
I/O5
I/O4
I/O3
3 2 1 28 27
4
26 A4
5
25 A3
6
24 A2
7
23 A1
8
22 OE
9
21 A0
20 CE
10
11
19 I/O7
18 I/O6
12
1314151617
I/O2
GND
I/O3
I/O4
I/O5
I/O0
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
I/O0
I/O1
I/O2
GND
LCC
Top View
22
23
24
25
26
27
28
1
2
3
4
5
6
7
TSOP I
Top View
(not to scale)
21
20
19
18
17
16
15
14
13
12
11
10
9
8
A0
CE
I/O 7
I/O 6
I/O 5
I/O 4
I/O 3
GND
I/O 2
I/O 1
I/O 0
A 14
A 13
A 12
Selection Guide
7C199
-8
8
120
Maximum Access Time
Maximum Operating Current
L
Maximum CMOS Standby Current
0.5
L
7C199
-10
10
110
90
0.5
0.05
7C199
-12
12
160
90
10
0.05
7C199
-15
15
155
90
10
0.05
7C199
-20
20
150
90
10
0.05
7C199
-25
25
150
80
10
0.05
7C199
-35
35
140
70
10
0.05
7C199
-45
45
140
Unit
ns
mA
10
mA
Shaded area contains advance information.
Cypress Semiconductor Corporation
Document #: 38-05160 Rev. *A
•
3901 North First Street
•
San Jose, CA 95134
•
408-943-2600
Revised January 7, 2003
CY7C199
Maximum Ratings
Output Current into Outputs (LOW)............................. 20 mA
(Above which the useful life may be impaired. For user guidelines, not tested.)
Static Discharge Voltage.......................................... > 2001V
(per MIL-STD-883, Method 3015)
Storage Temperature .................................–65°C to +150°C
Latch-up Current.................................................... > 200 mA
Ambient Temperature with
Power Applied............................................. –55°C to +125°C
Operating Range
Supply Voltage to Ground Potential
(Pin 28 to Pin 14) ........................................... –0.5V to +7.0V
Range
Ambient Temperature[2]
VCC
Commercial
DC Voltage Applied to Outputs
in High-Z State[1] ....................................–0.5V to VCC + 0.5V
Industrial
DC Input Voltage[1] .................................–0.5V to VCC + 0.5V
Military
0°C to +70°C
5V ± 10%
–40°C to +85°C
5V ± 10%
–55°C to +125°C
5V ± 10%
Electrical Characteristics Over the Operating Range (-8, -10, -12, -15)[3]
7C199-8
Parameter
Description
Test Conditions
VOH
Output HIGH Voltage
VCC = Min., IOH=–4.0 mA
VOL
Output LOW Voltage
VCC = Min., IOL=8.0 mA
VIH
Input HIGH Voltage
VIL
Input LOW Voltage
IIX
Input Load Current
IOZ
Output Leakage Current GND < VO < VCC, Output
Disabled
ICC
VCC Operating Supply
Current
VCC = Max.,
IOUT = 0 mA,
f = fMAX = 1/tRC
Automatic CE
Power-down Current—
TTL Inputs
Max. VCC, CE >
Com’l
VIH, VIN > VIH or
L
VIN < VIL, f = fMAX
Automatic CE
Power-down Current—
CMOS Inputs
Max. VCC,
Com’l
CE > VCC – 0.3V L
VIN > VCC – 0.3V
or VIN < 0.3V, f = 0 Mil
ISB1
ISB2
GND < VI < VCC
2.4
2.4
0.4
7C199-15
2.4
0.4
2.4
0.4
V
VCC
+0.3V
2.2
VCC
+0.3V
2.2
VCC
+0.3V
–0.5
0.8
–0.5
0.8
–0.5
0.8
–0.5
0.8
V
–5
+5
–5
+5
–5
+5
–5
+5
µA
–5
+5
–5
+5
–5
+5
–5
+5
µA
120
L
110
160
155
mA
85
85
100
mA
180
mA
5
30
30
mA
5
5
5
mA
Mil
5
0.5
0.5
10
10
mA
0.05
0.05
0.05
0.05
mA
15
mA
[3]
7C199-25
7C199-35
Min. Max. Min. Max. Min. Max.
VOH
Output HIGH Voltage
VCC = Min., IOH = –4.0 mA 2.4
VOL
Output LOW Voltage
VCC = Min., IOL = 8.0 mA
VIH
Input HIGH Voltage
2.2
VIL
Input LOW Voltage
–0.5
0.8
-0.5
IIX
Input Load Current
GND < VI < VCC
–5
+5
IOZ
Output Leakage Current
GND < VI < VCC, Output
Disabled
–5
+5
ICC
VCC Operating Supply
Current
VCC = Max.,
IOUT = 0 mA,
f = fMAX = 1/tRC
Com’l
V
2.2
Com’l
Test Conditions
V
0.4
VCC
+0.3V
7C199-20
Description
7C199-12
2.2
Electrical Characteristics Over the Operating Range (-20, -25, -35, -45)
Parameter
7C199-10
Min. Max. Min. Max. Min. Max. Min. Max. Unit
2.4
0.4
2.4
0.4
Min.
Max. Unit
2.4
0.4
V
VCC
+0.3V
2.2
VCC
+0.3V
V
0.8
-0.5
0.8
-0.5
0.8
V
–5
+5
–5
+5
–5
+5
µA
–5
+5
–5
+5
–5
+5
µA
140
mA
150
0.4
V
2.2
VCC 2.2 VCC
+0.3V
+0.3V
150
7C199-45
140
L
90
80
70
70
mA
Mil
170
150
150
150
mA
Shaded area contains advance information.
Notes:
1. VIL (min.) = –2.0V for pulse durations of less than 20 ns.
2. TA is the “instant on” case temperature.
3. See the last page of this specification for Group A subgroup testing information.
Document #: 38-05160 Rev. *A
Page 2 of 13
CY7C199
Electrical Characteristics Over the Operating Range (-20, -25, -35, -45) (continued)[3]
7C199-20
Parameter
ISB1
ISB2
Description
Test Conditions
7C199-25
7C199-35
7C199-45
Min. Max. Min. Max. Min. Max.
Min.
Max. Unit
Automatic CE
Power-down Current—
TTL Inputs
Max. VCC, CE > VIH, Com’l
VIN > VIH or VIN < VIL, L
f = fMAX
30
30
25
25
mA
5
5
5
5
mA
Automatic CE
Power-down Current—
CMOS Inputs
Max. VCC,
Com’l
CE > VCC – 0.3V
L
VIN > VCC – 0.3V or
Mil
VIN < 0.3V, f=0
10
10
10
10
mA
0.05
0.05
0.05
0.05
µA
15
15
15
15
mA
Capacitance[4 ]
Parameter
Description
CIN
Input Capacitance
COUT
Output Capacitance
Test Conditions
TA = 25°C, f = 1 MHz,
VCC = 5.0V
Max.
Unit
8
pF
8
pF
AC Test Loads and Waveforms[5]
R1 481 Ω
R1 481 Ω
5V
5V
OUTPUT
ALL INPUT PULSES
OUTPUT
R2
255 Ω
30 pF
INCLUDING
JIG AND
SCOPE
Equivalent to:
3.0V
5 pF
INCLUDING
JIG AND
SCOPE
(a)
10%
R2
255 Ω
90%
10%
90%
GND
≤tr
≤tr
(b)
THÉVENIN EQUIVALENT
167 Ω
OUTPUT
1.73V
Data Retention Characteristics Over the Operating Range (L-version only)
Parameter
Conditions[6]
Description
VDR
VCC for Data Retention
ICCDR
Data Retention Current
Min.
Max.
2.0
Com’l
Com’l L
Chip Deselect to Data Retention Time
tR [5]
Operation Recovery Time
V
µA
VCC = VDR = 2.0V, CE > VCC –
0.3V, VIN > VCC – 0.3V or VIN <
0.3V
tCDR[4]
Unit
10
µA
0
ns
200
µs
Data Retention Waveform
DATA RETENTION MODE
VCC
3.0V
VDR > 2V
tCDR
3.0V
tR
CE
Note:
4. Tested initially and after any design or process changes that may affect these parameters.
5. tR< 3 ns for the -12 and the -15 speeds. tR< 5 ns for the -20 and slower speeds
6. No input may exceed VCC + 0.5V.
Document #: 38-05160 Rev. *A
Page 3 of 13
CY7C199
Switching Characteristics Over the Operating Range (-8, -10, -12, -15)
7C199-8
Parameter
Description
Min.
Max.
[3, 7]
7C199-10
Min.
Max.
7C199-12
Min.
Max.
7C199-15
Min.
Max.
Unit
Read Cycle
tRC
Read Cycle Time
tAA
Address to Data Valid
8
tOHA
Data Hold from Address Change
tACE
CE LOW to Data Valid
tDOE
OE LOW to Data Valid
tLZOE
OE LOW to Low-Z[8]
10
8
3
OE HIGH to High-Z
tLZCE
CE LOW to Low-Z[8]
4.5
CE HIGH to
tPU
CE LOW to Power-up
tPD
CE HIGH to Power-down
5
5
5
3
4
5
8
0
10
ns
ns
7
ns
ns
7
3
5
0
ns
ns
7
0
12
ns
15
0
5
3
0
3
0
5
3
ns
15
12
0
High-Z[8,9]
tHZCE
3
10
0
15
12
3
8
[8, 9]
tHZOE
12
10
ns
ns
15
ns
Write Cycle[10, 11]
tWC
Write Cycle Time
8
10
12
15
ns
tSCE
CE LOW to Write End
7
7
9
10
ns
tAW
Address Set-up to Write End
7
7
9
10
ns
tHA
Address Hold from Write End
0
0
0
0
ns
tSA
Address Set-up to Write Start
0
0
0
0
ns
tPWE
WE Pulse Width
7
7
8
9
ns
tSD
Data Set-up to Write End
5
5
8
9
ns
tHD
Data Hold from Write End
0
0
0
0
ns
High-Z[9]
tHZWE
WE LOW to
tLZWE
WE HIGH to Low-Z[8]
5
6
3
7
3
3
7
3
ns
ns
Switching Characteristics Over the Operating Range (-20, -25, -35, -45)[3, 7]
7C199-20
Parameter
Description
Min.
Max.
7C199-25
Min.
Max.
7C199-35
Min.
Max.
7C199-45
Min.
Max.
Unit
Read Cycle
tRC
Read Cycle Time
tAA
Address to Data Valid
tOHA
Data Hold from Address Change
tACE
CE LOW to Data Valid
tDOE
OE LOW to Data Valid
tLZOE
OE LOW to Low-Z[8]
20
3
OE HIGH to
tLZCE
CE LOW to Low-Z[8]
tHZCE
CE HIGH to
tPU
CE LOW to Power-up
3
16
11
9
15
ns
ns
16
ns
ns
15
3
15
0
ns
ns
15
0
ns
45
0
3
11
0
3
0
3
ns
45
35
10
9
0
3
0
3
45
35
25
9
0
High-Z[8, 9]
35
25
20
High-Z[8, 9]
tHZOE
25
20
ns
ns
Shaded area contains advance information.
Notes:
7. Test conditions assume signal transition time of 3 ns or less for -12 and -15 speeds and 5 ns or less for -20 and slower speeds, timing reference levels of 1.5V,
input pulse levels of 0 to 3.0V, and output loading of the specified IOL/IOH and 30-pF load capacitance.
8. At any given temperature and voltage condition, tHZCE is less than tLZCE, tHZOE is less than tLZOE, and tHZWE is less than tLZWE for any given device.
9. tHZOE, tHZCE, and tHZWE are specified with CL = 5 pF as in part (b) of AC Test Loads. Transition is measured ±500 mV from steady-state voltage.
10. The internal write time of the memory is defined by the overlap of CE LOW and WE LOW. Both signals must be LOW to initiate a write and either signal can terminate
a write by going HIGH. The data input set-up and hold timing should be referenced to the rising edge of the signal that terminates the write.
11. The minimum write cycle time for write cycle #3 (WE controlled, OE LOW) is the sum of tHZWE and tSD.
Document #: 38-05160 Rev. *A
Page 4 of 13
CY7C199
Switching Characteristics Over the Operating Range (-20, -25, -35, -45)[3, 7]
7C199-20
Parameter
tPD
Description
Min.
Max.
CE HIGH to Power-down
7C199-25
Min.
20
Max.
7C199-35
Min.
20
Max.
7C199-45
Min.
20
Max.
Unit
25
ns
Write Cycle[10,11]
tWC
Write Cycle Time
20
25
35
45
ns
tSCE
CE LOW to Write End
15
18
22
22
ns
tAW
Address Set-up to Write End
15
20
30
40
ns
tHA
Address Hold from Write End
0
0
0
0
ns
tSA
Address Set-up to Write Start
0
0
0
0
ns
tPWE
WE Pulse Width
15
18
22
22
ns
tSD
Data Set-up to Write End
10
10
15
15
ns
tHD
Data Hold from Write End
0
0
0
0
ns
High-Z[9]
tHZWE
WE LOW to
tLZWE
WE HIGH to Low-Z[8]
10
11
3
3
15
3
15
3
ns
ns
Switching Waveforms
Read Cycle No. 1[12, 13]
tRC
ADDRESS
tAA
tOHA
DATA OUT
DATA VALID
PREVIOUS DATA VALID
Read Cycle No. 2 [13, 14]
tRC
CE
tACE
OE
tHZOE
tHZCE
tDOE
DATA OUT
tLZOE
HIGH IMPEDANCE
HIGH
IMPEDANCE
DATA VALID
tLZCE
VCC
SUPPLY
CURRENT
tPD
tPU
ICC
50%
50%
ISB
Notes:
12. Device is continuously selected. OE, CE = VIL.
13. WE is HIGH for read cycle.
14. Address valid prior to or coincident with CE transition LOW.
Document #: 38-05160 Rev. *A
Page 5 of 13
CY7C199
Switching Waveforms (continued)
Write Cycle No. 1 (WE Controlled)[10, 15, 16]
tWC
ADDRESS
CE
tAW
tHA
tSA
WE
tPWE
OE
tSD
tHD
DATAIN VALID
DATA I/O
tHZOE
Write Cycle No. 2 (CE Controlled)[10, 15, 16]
tWC
ADDRESS
tSCE
CE
tSA
tAW
tHA
WE
tSD
DATA I/O
tHD
DATA IN VALID
Write Cycle No. 3 (WE Controlled OE LOW)[11, 16]
tWC
ADDRESS
CE
tAW
WE
tHA
tSA
tSD
DATA I/O
tHD
DATAIN VALID
tHZWE
tLZWE
Notes:
15. Data I/O is high impedance if OE = VIH.
16. If CE goes HIGH simultaneously with WE HIGH, the output remains in a high-impedance state.
Document #: 38-05160 Rev. *A
Page 6 of 13
CY7C199
NORMALIZED SUPPLY CURRENT
vs. AMBIENT TEMPERATURE
NORMALIZED SUPPLY CURRENT
vs. SUPPLY VOLTAGE
1.4
NORMALIZED ICC,I SB
1.2
ICC
0.8
0.6
VIN =5.0V
TA =25°C
0.4
0.2
1.0
0.8
0.6
VCC =5.0V
VIN =5.0V
0.4
0.2
ISB
0.0
4.0
1.2
4.5
5.0
5.5
ISB
0.0
–55
6.0
1.6
1.4
NORMALIZED t AA
1.3
1.2
1.1
TA =25°C
1.0
1.4
1.2
1.0
VCC =5.0V
0.8
0.9
0.8
4.0
4.5
5.0
5.5
0.6
–55
6.0
25
100
80
VCC =5.0V
TA =25°C
60
40
20
0
0.0
AMBIENT TEMPERATURE (°C)
TYPICAL POWER-ON CURRENT
vs. SUPPLY VOLTAGE
TYPICAL ACCESS TIME CHANGE
vs. OUTPUT LOADING
30.0
2.5
25.0
DELTA t AA (ns)
3.0
2.0
1.5
1.0
0.5
1.0
2.0
3.0
4.0
OUTPUT VOLTAGE (V)
OUTPUT SINK CURRENT
vs. OUTPUT VOLTAGE
140
120
100
80
60
VCC =5.0V
TA =25°C
40
20
0
0.0
125
SUPPLY VOLTAGE (V)
0.0
0.0
120
NORMALIZED ACCESS TIME
vs. AMBIENT TEMPERATURE
NORMALIZED ACCESS TIME
vs. SUPPLY VOLTAGE
NORMALIZEDAAt
125
OUTPUT SOURCE CURRENT
vs. OUTPUT VOLTAGE
AMBIENT TEMPERATURE (°C)
SUPPLY VOLTAGE (V)
NORMALIZED I PO
25
OUTPUT SINK CURRENT (mA)
1.0
ICC
1.0
2.0
3.0
4.0
OUTPUT VOLTAGE (V)
NORMALIZED I CC vs. CYCLE TIME
1.25
20.0
15.0
VCC =4.5V
TA =25°C
10.0
NORMALIZED I CC
NORMALIZED ICC,I SB
1.4
OUTPUT SOURCE CURRENT (mA)
Typical DC and AC Characteristics
1.00
VCC =5.0V
TA =25°C
VIN =0.5V
0.75
5.0
1.0
2.0
3.0
4.0
5.0
0.0
0
SUPPLY VOLTAGE (V)
200
400
600
800 1000
CAPACITANCE (pF)
0.50
10
20
30
40
CYCLE FREQUENCY (MHz)
Truth Table
CE
WE
OE
H
X
X
High Z
Inputs/Outputs
Deselect/Power-down
Standby (ISB)
L
H
L
Data Out
Read
Active (ICC)
L
L
X
Data In
Write
Active (ICC)
L
H
H
High Z
Deselect, Output disabled
Active (ICC)
Document #: 38-05160 Rev. *A
Mode
Power
Page 7 of 13
CY7C199
Ordering Information
Speed
(ns)
8
10
12
15
20
Ordering Code
CY7C199-8VC
CY7C199-8ZC
CY7C199L-8VC
CY7C199L-8ZC
CY7C199-10VC
CY7C199-10ZC
CY7C199L-10VC
CY7C199L-10ZC
CY7C199-10VI
CY7C199-10ZI
CY7C199L-10VI
CY7C199L-10ZI
CY7C199-12PC
CY7C199-12VC
CY7C199-12ZC
CY7C199L-12PC
CY7C199L-12VC
CY7C199L-12ZC
CY7C199-12VI
CY7C199-12ZI
CY7C199L-12VI
CY7C199L-12ZI
CY7C199-15PC
CY7C199-15VC
CY7C199-15ZC
CY7C199L-15PC
CY7C199L-15VC
CY7C199L-15ZC
CY7C199-15VI
CY7C199-15ZI
CY7C199-15DMB
CY7C199-15LMB
CY7C199L-15DMB
CY7C199L-15LMB
CY7C199-20PC
CY7C199-20VC
CY7C199-20ZC
CY7C199L-20PC
CY7C199L-20VC
CY7C199L-20ZC
CY7C199-20VI
CY7C199-20ZI
CY7C199-20DMB
CY7C199-20LMB
CY7C199L-20DMB
CY7C199L-20LMB
Package
Name
V21
Z28
V21
Z28
V21
Z28
V21
Z28
V21
Z28
V21
Z28
P21
V21
Z28
P21
V21
Z28
V21
Z28
V21
Z28
P21
V21
Z28
P21
V21
Z28
V21
Z28
D22
L54
D22
L54
P21
V21
Z28
P21
V21
Z28
V21
Z28
D22
L54
D22
L54
Package Type
28-Lead Molded SOJ
28-Lead Thin Small Outline Package
28-Lead Molded SOJ
28-Lead Thin Small Outline Package
28-Lead Molded SOJ
28-Lead Thin Small Outline Package
28-Lead Molded SOJ
28-Lead Thin Small Outline Package
28-Lead Molded SOJ
28-Lead Thin Small Outline Package
28-Lead Molded SOJ
28-Lead Thin Small Outline Package
28-Lead (300-Mil) Molded DIP
28-Lead Molded SOJ
28-Lead Thin Small Outline Package
28-Lead (300-Mil) Molded DIP
28-Lead Molded SOJ
28-Lead Thin Small Outline Package
28-Lead Molded SOJ
28-Lead Thin Small Outline Package
28-Lead Molded SOJ
28-Lead Thin Small Outline Package
28-Lead (300-Mil) Molded DIP
28-Lead Molded SOJ
28-Lead Thin Small Outline Package
28-Lead (300-Mil) Molded DIP
28-Lead Molded SOJ
28-Lead Thin Small Outline Package
28-Lead Molded SOJ
28-Lead Thin Small Outline Package
28-Lead (300-Mil) CerDIP
28-Pin Rectangular Leadless Chip Carrier
28-Lead (300-Mil) CerDIP
28-Pin Rectangular Leadless Chip Carrier
28-Lead (300-Mil) Molded DIP
28-Lead Molded SOJ
28-Lead Thin Small Outline Package
28-Lead (300-Mil) Molded DIP
28-Lead Molded SOJ
28-Lead Thin Small Outline Package
28-Lead Molded SOJ
28-Lead Thin Small Outline Package
28-Lead (300-Mil) CerDIP
28-Pin Rectangular Leadless Chip Carrier
28-Lead (300-Mil) CerDIP
28-Pin Rectangular Leadless Chip Carrier
Operating
Range
Commercial
Commercial
Industrial
Commercial
Industrial
Commercial
Industrial
Military
Commercial
Industrial
Military
Shaded area contains advance information. Contact your Cypress sales representative for availability
Document #: 38-05160 Rev. *A
Page 8 of 13
CY7C199
Ordering Information (continued)
Speed
(ns)
25
35
45
Ordering Code
CY7C199-25PC
CY7C199-25SC
CY7C199-25VC
CY7C199-25ZC
CY7C199-25SI
CY7C199-25VI
CY7C199-25ZI
CY7C199-25DMB
CY7C199-25LMB
CY7C199-35PC
CY7C199-35SC
CY7C199-35VC
CY7C199-35ZC
CY7C199-35SI
CY7C199-35VI
CY7C199-35ZI
CY7C199-35DMB
CY7C199-35LMB
CY7C199-45DMB
CY7C199-45LMB
Package
Name
P21
S21
V21
Z28
S21
V21
Z28
D22
L54
P21
S21
V21
Z28
S21
V21
Z28
D22
L54
D22
L54
Package Type
28-Lead (300-Mil) Molded DIP
28-Lead Molded SOIC
28-Lead Molded SOJ
28-Lead Thin Small Outline Package
28-Lead Molded SOIC
28-Lead Molded SOJ
28-Lead Thin Small Outline Package
28-Lead (300-Mil) CerDIP
28-Pin Rectangular Leadless Chip Carrier
28-Lead (300-Mil) Molded DIP
28-Lead Molded SOIC
28-Lead Molded SOJ
28-Lead Thin Small Outline Package
28-Lead Molded SOIC
28-Lead Molded SOJ
28-Lead Thin Small Outline Package
28-Lead (300-Mil) CerDIP
28-Pin Rectangular Leadless Chip Carrier
28-Lead (300-Mil) CerDIP
28-Pin Rectangular Leadless Chip Carrier
Operating
Range
Commercial
Industrial
Military
Commercial
Industrial
Military
Military
Shaded area contains advance information. Contact your Cypress sales representative for availability
MILITARY SPECIFICATIONS
Group A Subgroup Testing
DC Characteristics
Parameter
VOH
VOL
VIH
VIL Max.
IIX
IOZ
ICC
ISB1
ISB2
Document #: 38-05160 Rev. *A
Switching Characteristics
Subgroups
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
Parameter
Read Cycle
tRC
tAA
tOHA
tACE
tDOE
Write Cycle
tWC
tAA
tAW
tHA
tSA
tPWE
tSD
tHD
Subgroups
7, 8, 9, 10, 11
7, 8, 9, 10, 11
7, 8, 9, 10, 11
7, 8, 9, 10, 11
7, 8, 9, 10, 11
7, 8, 9, 10, 11
7, 8, 9, 10, 11
7, 8, 9, 10, 11
7, 8, 9, 10, 11
7, 8, 9, 10, 11
7, 8, 9, 10, 11
7, 8, 9, 10, 11
7, 8, 9, 10, 11
Page 9 of 13
CY7C199
Package Diagrams
28-pin
(300-Mil) CerDIP D22
MIL-STD-1835 D-15 Config. A
51-80032-**
28-pin Rectangular Leadless Chip Carrier L54
MIL-STD-1835C-11A
51-80067-**
Document #: 38-05160 Rev. *A
Page 10 of 13
CY7C199
Package Diagrams (continued)
28-pin
(300-Mil) Molded DIP P21
51-85014-B
28-pin
(300-Mil) Molded SOIC S21
51-85026-A
Document #: 38-05160 Rev. *A
Page 11 of 13
CY7C199
Package Diagrams (continued)
28-pin
(300-Mil) Molded SOJ V21
51-85031-B
28-Lead Thin Small Outline Package Type 1 (8x13.4 mm) Z28
51-85071-*G
All products and company names mentioned in this document are the trademarks of their respective holders.
Document #: 38-05160 Rev. *A
Page 12 of 13
© Cypress Semiconductor Corporation, 2003. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use
of any circuitry other than circuitry embodied in a Cypress Semiconductor product. Nor does it convey or imply any license under patent or other rights. Cypress Semiconductor does not authorize
its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress
Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges.
CY7C199
Document History Page
Document Title: CY7C199 32K x 8 Static RAM
Document Number: 38-05160
ECN NO.
Issue
Date
**
109971
10/28/01
SZV
Change from Spec number: 38-00239 to 38-05160
*A
121730
01/09/02
DFP
Updated Product Offering table.
REV.
Document #: 38-05160 Rev. *A
Orig. of
Change
Description of Change
Page 13 of 13
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