CY7C199N-55PXC

CY7C199N 32K x 8 Static RAM Features • High speed — 12 ns • Fast tDOE • CMOS for optimum speed/power • Low active power — 467 mW (max, 12 ns “L” version) • Low standby power — 0.275 mW (max, “L” version) • 2V data retention (“L” version only) • Easy memory expansion with CE and OE features • TTL-compatible inputs and outputs • Automatic power-down when deselected Functional Description The CY7C199N is a high-performance CMOS static RAM organized as 32,768 words by 8 bits. Easy memory expansion is provided by an active LOW Chip Enable (CE) and active LOW Output Enable (OE) and three-state drivers. This device has an automatic power-down feature, reducing the power consumption by 81% when deselected. The CY7C199NN is in the standard 300-mil-wide DIP, SOJ, and LCC packages. An active LOW Write Enable signal (WE) controls the writing/reading operation of the memory. When CE and WE inputs are both LOW, data on the eight data input/output pins (I/O0 through I/O7) is written into the memory location addressed by the address present on the address pins (A0 through A14). Reading the device is accomplished by selecting the device and enabling the outputs, CE and OE active LOW, while WE remains inactive or HIGH. Under these conditions, the contents of the location addressed by the information on address pins are present on the eight data input/output pins. The input/output pins remain in a high-impedance state unless the chip is selected, outputs are enabled, and Write Enable (WE) is HIGH. A die coat is used to improve alpha immunity. Logic Block Diagram Pin Configurations A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 I/O0 I/O1 I/O2 GND DIP Top View 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 VCC WE A4 A3 A2 A1 OE A0 CE I/O7 I/O6 I/O5 I/O4 I/O3 21 20 19 18 17 16 15 14 13 12 11 10 9 8 I/O0 INPUT BUFFER A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 CE WE OE I/O1 ROW DECODER I/O2 SENSE AMPS 1024 x 32 x 8 ARRAY I/O3 I/O4 I/O5 COLUMN DECODER POWER DOWN I/O6 I/O7 A 10 A 12 A 13 A 11 Selection Guide -12 Maximum Access Time Maximum Operating Current L Maximum CMOS Standby Current L Cypress Semiconductor Corporation Document #: 001-06493 Rev. ** • 12 160 90 10 0.05 -15 15 155 90 10 0.05 • -20 20 150 90 10 0.05 -25 25 150 80 10 0.05 -35 35 140 70 10 0.05 -55 55 140 70 10 0.05 mA Unit ns mA A 14 OE A1 A2 A3 A4 WE V CC A5 A6 A7 A8 A9 A 10 A 11 22 23 24 25 26 27 28 1 2 3 4 5 6 7 TSOP I Top View (not to scale) A0 CE I/O 7 I/O 6 I/O 5 I/O 4 I/O 3 GND I/O 2 I/O 1 I/O 0 A 14 A 13 A 12 198 Champion Court San Jose, CA 95134-1709 • 408-943-2600 Revised February 2, 2006 [+] [+] Feedback CY7C199N Maximum Ratings (Above which the useful life may be impaired. For user guidelines, not tested.) Storage Temperature ................................. –65°C to +150°C Ambient Temperature with Power Applied............................................. –55°C to +125°C Supply Voltage to Ground Potential (Pin 28 to Pin 14) ........................................... –0.5V to +7.0V DC Voltage Applied to Outputs in High-Z State[1] ....................................–0.5V to VCC + 0.5V DC Input Voltage[1] .................................–0.5V to VCC + 0.5V Output Current into Outputs (LOW)............................. 20 mA Static Discharge Voltage.......................................... > 2001V (per MIL-STD-883, Method 3015) Latch-up Current.................................................... > 200 mA Operating Range Range Commercial Industrial Military Ambient Temperature[2] 0°C to +70°C –40°C to +85°C –55°C to +125°C VCC 5V ± 10% 5V ± 10% 5V ± 10% Electrical Characteristics Over the Operating Range [3] -12 Parameter VOH VOL VIH VIL IIX IOZ ICC Description Output HIGH Voltage Output LOW Voltage Input HIGH Voltage Input LOW Voltage Input Load Current VCC Operating Supply Current GND < VI < VCC VCC = Max., IOUT = 0 mA, Com’l f = fMAX = 1/tRC L Mil ISB1 Automatic CE Power-down Current— TTL Inputs Automatic CE Power-down Current— CMOS Inputs Max. VCC, CE > VIH, VIN > Com’l VIH or VIN < VIL, f = fMAX L Max. VCC, CE > VCC – 0.3V VIN > VCC – 0.3V or VIN < 0.3V, f = 0 Com’l L Mil 30 5 10 0.05 Output Leakage Current GND < VO < VCC, Output Disabled Test Conditions VCC = Min., IOH = –4.0 mA VCC = Min., IOL = 8.0 mA 2.2 –0.5 –5 –5 Min. 2.4 0.4 VCC + 0.3V 0.8 +5 +5 160 85 2.2 –0.5 –5 –5 Max. Min. 2.4 0.4 VCC + 0.3V 0.8 +5 +5 155 100 180 30 5 10 0.05 15 -15 Max. Unit V V V V µA µA mA mA mA mA mA mA mA mA ISB2 Electrical Characteristics Over the Operating Range[3] -20 Parameter VOH VOL VIH VIL IIX IOZ ICC Description Output HIGH Voltage Output LOW Voltage Input HIGH Voltage Input LOW Voltage Input Load Current GND < VI < VCC Output Leakage Current GND < VI < VCC, Output Disabled VCC Operating Supply Current VCC = Max., IOUT = 0 mA, f = fMAX = 1/tRC Com’l L Mil Test Conditions VCC = Min., IOH = –4.0 mA VCC = Min., IOL = 8.0 mA 2.2 –0.5 –5 –5 2.4 0.4 2.4 0.4 -25 2.4 0.4 2.2 -0.5 –5 –5 -35 2.4 0.4 VCC +0.3V 0.8 +5 +5 140 70 150 -55 Min. Max. Unit V V V V µA µA mA mA mA Min. Max. Min. Max. Min. Max. VCC 2.2 VCC 2.2 VCC +0.3V +0.3V +0.3V 0.8 +5 +5 150 90 170 -0.5 –5 –5 0.8 +5 +5 150 80 150 -0.5 –5 –5 0.8 +5 +5 140 70 150 Notes: 1. VIL (min.) = –2.0V for pulse durations of less than 20 ns. 2. TA is the “instant on” case temperature. 3. See the last page of this specification for Group A subgroup testing information. Document #: 001-06493 Rev. ** Page 2 of 10 [+] [+] Feedback CY7C199N Electrical Characteristics Over the Operating Range[3] -20 Parameter ISB1 Description Automatic CE Power-down Current— TTL Inputs Automatic CE Power-down Current— CMOS Inputs Test Conditions Max. VCC, CE > VIH, Com’l VIN > VIH or VIN < L VIL, f = fMAX Max. VCC, Com’l CE > VCC – 0.3V L VIN > VCC – 0.3V or Mil VIN < 0.3V, f = 0 30 5 10 0.05 15 -25 30 5 10 0.05 15 -35 25 5 10 0.05 15 -55 Min. Max. Unit 25 5 10 0.05 15 mA mA mA mA mA Min. Max. Min. Max. Min. Max. ISB2 Capacitance[4] Parameter CIN COUT Description Input Capacitance Output Capacitance Test Conditions TA = 25°C, f = 1 MHz, VCC = 5.0V Max. 8 8 Unit pF pF AC Test Loads and Waveforms[5] R1 481 Ω 5V OUTPUT 30 pF INCLUDING JIG AND SCOPE Equivalent to: R2 255 Ω 5V OUTPUT 5 pF INCLUDING JIG AND SCOPE 167 Ω OUTPUT 1.73V R2 255Ω 3.0V 10% GND ≤ tr R1 481 Ω ALL INPUT PULSES 90% 90% 10% ≤ tr (a) (b) THÉVENIN EQUIVALENT Data Retention Characteristics Over the Operating Range (L-version only) Parameter VDR ICCDR tCDR tR [5] [4] Description VCC for Data Retention Data Retention Current Com’l Conditions[6] Min. 2.0 Max. Unit V µA VCC = VDR = 2.0V, CE > VCC – 0.3V, VIN > VCC – 0.3V or Chip Deselect to Data Retention Time VIN < 0.3V Com’l L Operation Recovery Time 10 0 200 µA ns µs Data Retention Waveform DATA RETENTION MODE VCC 3.0V tCDR CE Note: 4. Tested initially and after any design or process changes that may affect these parameters. 5. tR< 3 ns for the -12 and the -15 speeds. tR< 5 ns for the -20 and slower speeds 6. No input may exceed VCC + 0.5V. VDR > 2V 3.0V tR Document #: 001-06493 Rev. ** Page 3 of 10 [+] [+] Feedback CY7C199N Switching Characteristics Over the Operating Range Parameter Read Cycle tRC tAA tOHA tACE tDOE tLZOE tHZOE tLZCE tHZCE tPU tPD Write tWC tSCE tAW tHA tSA tPWE tSD tHD tHZWE tLZWE Read Cycle Time Address to Data Valid Data Hold from Address Change CE LOW to Data Valid OE LOW to Data Valid OE LOW to CE LOW to CE HIGH to Low-Z[8] Low-Z[8] High-Z[8,9] 0 12 12 9 9 0 0 8 8 0 7 3 3 15 10 10 0 0 9 9 0 7 3 0 5 3 5 0 15 20 15 15 0 0 15 10 0 10 3 7 0 20 OE HIGH to High-Z[8, 9] 3 12 5 0 7 3 9 12 12 3 15 7 0 9 15 15 3 20 9 20 20 ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns Description [3, 7] 7C199-12 Min. Max. 7C199-15 Min. Max. 7C199-20 Min. Max. Unit CE LOW to Power-up CE HIGH to Power-down Cycle[10, 11] Write Cycle Time CE LOW to Write End Address Set-up to Write End Address Hold from Write End Address Set-up to Write Start WE Pulse Width Data Set-up to Write End Data Hold from Write End WE LOW to WE HIGH to High-Z[9] Low-Z[8] Switching Characteristics Over the Operating Range [3, 7] 7C199-25 Parameter Read Cycle tRC tAA tOHA tACE tDOE tLZOE tHZOE tLZCE Read Cycle Time Address to Data Valid Data Hold from Address Change CE LOW to Data Valid OE LOW to Data Valid OE LOW to Low-Z[8] OE HIGH to High-Z CE LOW to [8, 9] 7C199-35 Min. 35 Max. 7C199-55 Min. 55 Max. Unit ns 55 3 55 16 0 15 3 ns ns ns ns ns ns ns Description Min. 25 Max. 25 3 25 10 0 11 3 3 0 3 35 35 16 15 Low-Z[8] Notes: 7. Test conditions assume signal transition time of 3 ns or less for -12 and -15 speeds and 5 ns or less for -20 and slower speeds, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V, and output loading of the specified IOL/IOH and 30-pF load capacitance. 8. At any given temperature and voltage condition, tHZCE is less than tLZCE, tHZOE is less than tLZOE, and tHZWE is less than tLZWE for any given device. 9. tHZOE, tHZCE, and tHZWE are specified with CL = 5 pF as in part (b) of AC Test Loads. Transition is measured ±500 mV from steady-state voltage. 10. The internal write time of the memory is defined by the overlap of CE LOW and WE LOW. Both signals must be LOW to initiate a write and either signal can terminate a write by going HIGH. The data input set-up and hold timing should be referenced to the rising edge of the signal that terminates the write. 11. The minimum write cycle time for write cycle #3 (WE controlled, OE LOW) is the sum of tHZWE and tSD. Document #: 001-06493 Rev. ** Page 4 of 10 [+] [+] Feedback CY7C199N Switching Characteristics Over the Operating Range [3, 7] 7C199-25 Parameter tHZCE tPU tPD Write Cycle tWC tSCE tAW tHA tSA tPWE tSD tHD tHZWE tLZWE Description CE HIGH to High-Z [8, 9] 7C199-35 Min. 0 Max. 15 7C199-55 Min. 0 Max. 15 25 55 22 40 0 0 22 15 0 Unit ns ns ns ns ns ns ns ns ns ns ns 15 3 ns ns Min. 0 Max. 11 20 CE LOW to Power-up CE HIGH to Power-down [10,11] 20 35 22 30 0 0 22 15 0 Write Cycle Time CE LOW to Write End Address Set-up to Write End Address Hold from Write End Address Set-up to Write Start WE Pulse Width Data Set-up to Write End Data Hold from Write End WE LOW to High-Z[9] WE HIGH to Low-Z[8] 25 18 20 0 0 18 10 0 11 3 15 3 Switching Waveforms Read Cycle No. 1[12, 13] tRC ADDRESS tOHA DATA OUT PREVIOUS DATA VALID tAA DATA VALID Read Cycle No. 2 [13, 14] CE tACE OE tDOE tLZOE HIGH IMPEDANCE tLZCE VCC SUPPLY CURRENT tPU 50% tPD ICC 50% ISB tHZOE tHZCE DATA VALID tRC HIGH IMPEDANCE DATA OUT Notes: 12. Device is continuously selected. OE, CE = VIL. 13. WE is HIGH for read cycle. 14. Address valid prior to or coincident with CE transition LOW. Document #: 001-06493 Rev. ** Page 5 of 10 [+] [+] Feedback CY7C199N Switching Waveforms (continued) Write Cycle No. 1 (WE Controlled)[10, 15, 16] tWC ADDRESS CE tAW WE tSA tPWE tHA OE tSD DATA I/O tHZOE DATAIN VALID tHD Write Cycle No. 2 (CE Controlled)[9, 15, 16] tWC ADDRESS CE tSA tAW tHA tSCE WE tSD DATA I/O DATA IN VALID tHD Write Cycle No. 3 (WE Controlled OE LOW)[11, 16] tWC ADDRESS CE tAW WE tSA tHA tSD DATA I/O tHZWE Notes: 15. Data I/O is high impedance if OE = VIH. 16. If CE goes HIGH simultaneously with WE HIGH, the output remains in a high-impedance state. tHD DATAIN VALID tLZWE Document #: 001-06493 Rev. ** Page 6 of 10 [+] [+] Feedback CY7C199N Typical DC and AC Characteristics OUTPUT SOURCE CURRENT (mA) NORMALIZED SUPPLY CURRENT vs. SUPPLY VOLTAGE 1.4 NORMALIZED ICC, ISB 1.2 1.0 0.8 0.6 0.4 0.2 0.0 4.0 ISB 4.5 5.0 5.5 6.0 VIN = 5.0V TA = 25°C ICC NORMALIZED ICC, ISB 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0.0 –55 ISB 25 125 AMBIENT TEMPERATURE (°C) NORMALIZED ACCESS TIME vs. AMBIENT TEMPERATURE 1.6 NORMALIZED tAA 1.4 1.2 1.0 0.8 0.6 –55 VCC = 5.0V VCC = 5.0V VIN = 5.0V NORMALIZED SUPPLY CURRENT vs. AMBIENT TEMPERATURE ICC OUTPUT SOURCE CURRENT vs. OUTPUT VOLTAGE 120 100 80 60 40 20 0 0.0 1.0 2.0 3.0 4.0 VCC = 5.0V TA = 25°C SUPPLY VOLTAGE (V) NORMALIZED ACCESS TIME vs. SUPPLY VOLTAGE 1.4 NORMALIZED tAA 1.3 1.2 1.1 TA = 25°C 1.0 0.9 0.8 4.0 4.5 5.0 5.5 6.0 OUTPUT VOLTAGE (V) OUTPUT SINK CURRENT vs. OUTPUT VOLTAGE 140 120 100 80 60 40 20 0 0.0 1.0 2.0 3.0 4.0 VCC = 5.0V TA = 25°C 25 125 SUPPLY VOLTAGE (V) TYPICAL POWER-ON CURRENT vs. SUPPLY VOLTAGE 3.0 NORMALIZED IPO DELTA t AA (ns) 2.5 2.0 1.5 1.0 0.5 0.0 0.0 1.0 2.0 3.0 4.0 5.0 30.0 AMBIENT TEMPERATURE (°C) TYPICAL ACCESS TIME CHANGE vs. OUTPUT LOADING 1.25 NORMALIZED ICC OUTPUT SINK CURRENT (mA) OUTPUT VOLTAGE (V) NORMALIZED ICC vs. CYCLE TIME 25.0 20.0 15.0 10.0 5.0 0.0 0 200 400 600 800 1000 VCC = 4.5V TA = 25°C 1.00 VCC = 5.0V TA = 25°C VIN = 0.5V 0.75 0.50 10 20 30 40 SUPPLY VOLTAGE (V) CAPACITANCE (pF) CYCLE FREQUENCY (MHz) Document #: 001-06493 Rev. ** Page 7 of 10 [+] [+] Feedback CY7C199N Truth Table CE H L L L WE X H L H OE X L X H Inputs/Outputs High Z Data Out Data In High Z Read Write Selected, Output disabled Mode Deselect/Power-down Power Standby (ISB) Active (ICC) Active (ICC) Active (ICC) Ordering Information Speed (ns) 12 15 20 25 35 55 Ordering Code CY7C199N-12ZXC CY7C199N-15ZXC CY7C199NL-15ZXC CY7C199N-20PXC CY7C199N-20ZXC CY7C199N-25PXC CY7C199N-35PXC CY7C199N-55PXC Package Diagram 51-85071 51-85071 51-85071 51-85014 51-85071 51-85014 51-85014 51-85014 Package Type 28-Lead TSOP 1 (Pb-free) 28-Lead TSOP 1 (Pb-free) 28-Lead TSOP 1 (Pb-free) 28-Lead (300-Mil) Molded DIP (Pb-free) 28-Lead TSOP 1 (Pb-free) 28-Lead (300-Mil) Molded DIP (Pb-free) 28-Lead (300-Mil) Molded DIP (Pb-free) 28-Lead (300-Mil) Molded DIP (Pb-free) Operating Range Commercial Commercial Commercial Commercial Contact your Local Cypress sales representative for availability of these parts Package Diagrams 28-Lead TSOP 1 (8x13.4 mm) (51-85071) 51-85071-*G Document #: 001-06493 Rev. ** Page 8 of 10 [+] [+] Feedback CY7C199N Package Diagrams (continued) 28-Lead (300-Mil) PDIP (51-85014) SEE LEAD END OPTION 14 1 DIMENSIONS IN INCHES [MM] MIN. MAX. 0.260[6.60] 0.295[7.49] REFERENCE JEDEC MO-095 PACKAGE WEIGHT: 2.15 gms 15 28 0.030[0.76] 0.080[2.03] SEATING PLANE 1.345[34.16] 1.385[35.18] 0.290[7.36] 0.325[8.25] 0.120[3.05] 0.140[3.55] 0.009[0.23] 0.012[0.30] 0.140[3.55] 0.190[4.82] 0.115[2.92] 0.160[4.06] 0.055[1.39] 0.065[1.65] 0.015[0.38] 0.020[0.50] 3° MIN. 0.015[0.38] 0.060[1.52] 0.090[2.28] 0.110[2.79] 0.310[7.87] 0.385[9.78] SEE LEAD END OPTION LEAD END OPTION (LEAD #1, 14, 15 & 28) 51-85014-*D All products and company names mentioned in this document may be the trademarks of their respective holders. Document #: 001-06493 Rev. ** Page 9 of 10 © Cypress Semiconductor Corporation, 2006. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be used for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress. Furthermore, Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges. [+] [+] Feedback CY7C199N Document History Page Document Title: CY7C199N 32K x 8 Static RAM Document Number: 001-06493 REV. ** ECN NO. 423877 Issue Date See ECN Orig. of Change NXR New Data Sheet Description of Change Document #: 001-06493 Rev. ** Page 10 of 10 [+] [+] Feedback