CY7C281A_06

CY7C281A 1K x 8 PROM Features • CMOS for optimum speed/power • High speed — 25 ns (Commercial) • Low power • • • • • • — 495 mW (Commercial) EPROM technology 100% programmable Slim 300-mil or standard 600-mil DIP or 28-pin LCC 5V ±10% VCC, commercial and military TTL-compatible I/O Direct replacement for bipolar PROMs Capable of withstanding >2001V static discharge packages respectively. The CY7C281A is also available in a 28-pin leadless chip carrier. The memory cells utilize proven EPROM floating-gate technology and byte-wide intelligent programming algorithms. The CY7C281A is a plug-in replacements for bipolar devices and offer the advantages of lower power, superior performance, and programming yield. The EPROM cell requires only 12.5V for the super voltage, and low current requirements allow for gang programming. The EPROM cells allow each memory location to be tested 100% because each location is written into, erased, and repeatedly exercised prior to encapsulation. Each PROM is also tested for AC performance to guarantee that after customer programming, the product will meet DC and AC specification limits. Reading is accomplished by placing an active LOW signal on CS1 and CS2, and active HIGH signals on CS3 and CS4. The contents of the memory location addressed by the address lines (A0−A9) will become available on the output lines (O0−O7). Functional Description The CY7C281A is a high-performance 1024-word by 8-bit CMOS PROMs. It is packaged in 300-mil and 600-mil-wide LogicBlockDiagram A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 O4 COLUMN DECODER O3 O6 ROW DECODER PROGRAMMABLE ARRAY MULTIPLEXER O5 O7 Pin Configurations DIP Top View A7 A6 A5 A4 A3 A2 A1 A0 O0 O1 O2 GND 24 1 23 2 22 3 21 4 20 5 6 7C281A 19 18 7 17 8 16 9 10 11 12 15 14 13 VCC A8 A9 CS1 CS2 CS3 CS4 O7 O6 O5 O4 O3 O1 O0 CS1 CS2 CS3 CS4 A4 A3 A2 A1 A0 NC O0 4 3 2 1 28 27 26 25 5 24 6 23 7 7C281A 22 8 21 9 20 10 19 11 12 1314151617 18 O1 O2 GND NC O3 O4 O5 A5 A6 A7 NC V CC A8 A9 CS1 CS2 CS3 CS4 NC O7 O6 O2 LCC/PLCC Top View Cypress Semiconductor Corporation Document #: 38-04003 Rev. *C • 198 Champion Court • San Jose, CA 95134-1709 • 408-943-2600 Revised August 16, 2006 [+] [+] Feedback CY7C281A Selection Guide 7C281A-25 Maximum Access Time Maximum Operating Current Commercial 25 100 7C281A-30 30 100 Unit ns mA Maximum Ratings[1] (Above which the useful life may be impaired. For user guidelines, not tested.) Storage Temperature .....................................−65°C to +150°C Ambient Temperature with Power Applied ..................................................−55°C to +125°C Supply Voltage to Ground Potential (Pin 24 to Pin 12).................................................−0.5V to +7.0V DC Voltage Applied to Outputs in High Z State .....................................................−0.5V to +7.0V DC Input Voltage .................................................−3.0V to +7.0V DC Program Voltage (Pins 18, 20) ............................... 13.0V Static Discharge Voltage............................................ >2001V (per MIL-STD-883, Method 3015) Latch-Up Current ..................................................... >200 mA Operating Range Range Commercial Ambient Temperature 0°C to +70°C VCC 5V ±10% Electrical Characteristics Over the Operating Range[2,3] 7C281A-25 Parameter VOH VOL VIH VIL IIX IOZ IOS ICC VPP VIHP VILP IPP Description Output HIGH Voltage Output LOW Voltage Input HIGH Level Input LOW Level Input Current Test Conditions VCC = Min., IOH = −4.0 mA VCC = Min., IOL = 16.0 mA Guaranteed Input Logical HIGH Voltage for All Inputs Guaranteed Input Logical LOW Voltage for All Inputs GND < VIN < VCC −10 −10 −20 2.0 0.8 +10 +10 −90 100 12 3.0 0.4 50 13 12 3.0 0.4 50 −10 −10 −20 Min. 2.4 0.4 2.0 0.8 +10 +10 −90 100 13 Max. 7C281A-30 Min. 2.4 0.4 Max. Unit V V V V µA µA mA mA V V V mA Output Leakage Current GND < VOUT < VCC, Output Disabled Output Short Circuit Current[4] Power Supply Current Program Voltage Program HIGH Voltage Program LOW Voltage Program Supply Current VCC = Max., VOUT = GND VCC = Max., IOUT = 0 mA Commercial Capacitance[3] Parameter CIN COUT Description Input Capacitance Output Capacitance Test Conditions TA = 25°C, f = 1 MHz, VCC = 5.0V Max. 10 10 Unit pF pF Notes 1. The voltage on any input or I/O pin cannot exceed the power pin during power-up. 2. See the last page of this specification for Group A subgroup testing information. 3. See “Introduction to CMOS PROMs” in this Data Book for general information on testing. 4. For test purposes, not more than one output at a time should be shorted. Short circuit test duration should not exceed 30 seconds. Document #: 38-04003 Rev. *C Page 2 of 8 [+] [+] Feedback CY7C281A AC Test Loads and Waveforms[3] 5V OUTPUT 30pF INCLUDING JIG AND SCOPE R2 167Ω R1 250Ω 5V OUTPUT 5 pF INCLUDING JIG AND SCOPE R2 167Ω R1 250Ω 3.0V GND ≤ 5 ns ALL INPUT PULSES 90% 10% 90% 10% ≤ 5 ns (a) NormalLoad Equivalent to: THÉVENIN EQUIVALENT 100Ω OUTPUT (b) High Z Load 2.0V Switching Characteristics Over the Operating Range[1,3] 7C281A-25 Parameter tAA tHZCS tACS Description Address to Output Valid Chip Select Inactive to High Z Chip Select Active to Output Valid Min. Max. 25 15 15 7C281A-30 Min. Max. 30 20 20 Unit ns ns ns Switching Waveforms A0 − A9 ADDRESS CS3, CS4 CS1, CS2 SELECTED tAA DESELECTED tHZCS SELECTED tACS O0 − O7 DATA Document #: 38-04003 Rev. *C Page 3 of 8 [+] [+] Feedback CY7C281A Programming Information Programming support is available from Cypress as well as from a number of third party software vendors. For detailed Table 1. Mode Selection programming information, including a listing of software packages, please see the PROM Programming Information located at the end of this section. Programming algorithms can be obtained from any Cypress representative. Pin Function[5] Read or Output Disable Mode Read Output Disable Output Disable Output Disable Output Disable Program Program Verify Program Inhibit Intelligent Program Blank Check Other A9–A0 A9–A0 A9–A0 A9–A0 A9–A0 A9–A0 A9–A0 A9–A0 A9–A0 A9–A0 A9–A0 A9–A0 CS4 PGM VIH X X VIL X VILP VIHP VIHP VILP VIHP CS3 VFY VIH X VIL X X VIHP VILP VIHP VIHP VILP CS2 VPP VIL VIH X X X VPP VPP VPP VPP VPP CS1 CS1 VIL X X X VIH VILP VILP VILP VILP VILP O7–O0 D7–D0 O7–O0 High Z High Z High Z High Z D7–D0 O7–O0 High Z D7–D0 Zeros Figure 1. Programming Pinouts DIP Top View A7 A6 A5 A4 A3 A2 A1 A0 D0 D1 D2 GND 24 1 23 2 22 3 21 4 20 5 7C281A 19 6 18 7 17 8 16 9 15 10 14 11 12 13 VCC A8 A9 CS1 VPP VFY PGM D7 D6 D5 D4 D3 PLCC Top View A5 A6 A7 NC V CC A8 A9 A4 A3 A2 A1 A0 NC D0 5 6 7 8 9 10 11 4 3 2 1 28 27 26 25 24 23 7C281A 22 21 20 19 121314151617 18 CS1 VPP VFY PGM NC D7 D6 D1 D2 GND NC D3 D4 D5 Note 5. X = “don’t care” but not to exceed VCC ±5%. Document #: 38-04003 Rev. *C Page 4 of 8 [+] [+] Feedback CY7C281A Typical DC and AC Characteristics NORMALIZED SUPPLY CURRENT vs. SUPPLY VOLTAGE 1.6 NORMALIZED I CC CC 1.4 1.2 1.0 0.8 0.6 4.0 TA =25°C f = fMAX 4.5 5.0 5.5 6.0 1.2 NORMALIZED SUPPLY CURRENT vs. AMBIENT TEMPERATURE NORMALIZED ACCESS TIME 1.2 NORMALIZED ACCESS TIME vs. SUPPLY VOLTAGE NORMALIZED ICC 1.1 1.0 1.0 0.8 0.9 0.6 TA =25°C 0.4 4.0 4.5 5.0 5.5 6.0 0.8 −55 25 125 SUPPLYVOLTAGE(V) AMBIENT TEMPERATURE(°C) SUPPLYVOLTAGE(V) OUTPUT SOURCE CURRENT (mA) NORMALIZED ACCESSTIME vs.TEMPERATURE NORMALIZED ACCESS TIME 1.6 1.4 1.2 1.0 0.8 0.6 −55 25 125 OUTPUT SOURCE CURRENT vs. VOLTAGE 60 50 DELTA t AA (ns) 40 30 20 10 0 0 1.0 2.0 3.0 4.0 30.0 25.0 20.0 15.0 10.0 5.0 0.0 TYPICAL ACCESS TIME CHANGE vs. OUTPUT LOADING VCC =4.5V TA =25°C 0 200 400 600 800 1000 AMBIENT TEMPERATURE (°C) OUTPUT VOLTAGE (V) CAPACITANCE (pF) OUTPUT SINK CURRENT (mA) OUTPUT SINK CURRENT vs. OUTPUT VOLTAGE 175 150 125 100 75 50 25 0 0.0 1.0 2.0 3.0 4.0 VCC =5.0V TA =25°C NORMALIZED ICC 1.02 1.00 0.98 0.96 0.94 0.92 0.90 0.88 I CC vs.CYCLE PERIOD VCC =5.5V TA =25°C 0 25 50 75 100 OUTPUT VOLTAGE (V) CYCLE PERIOD (ns) Document #: 38-04003 Rev. *C Page 5 of 8 [+] [+] Feedback CY7C281A Ordering Information Speed (ns) 25 30 Ordering Code CY7C281A-25JC CY7C281A-30PC Package Name J64 P13 Package Type 28-Lead Plastic Leaded Chip Carrier 24-Lead (300-Mil) Molded DIP Operating Range Commercial Commercial Package Diagrams Figure 2. 28-Lead Plastic Leaded Chip Carrier J64 51-85001-*A Document #: 38-04003 Rev. *C Page 6 of 8 [+] [+] Feedback CY7C281A Package Diagrams Figure 3. 24-Lead (300-Mil) PDIP P13 51-85013-*B All product and company names mentioned in this document may be the trademarks of their respective holders. Document #: 38-04003 Rev. *C Page 7 of 8 © Cypress Semiconductor Corporation, 2006. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be used for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress. Furthermore, Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges. [+] [+] Feedback CY7C281A Document History Page Document Title: CY7C281A 1K x 8 PROM Document Number: 38-04003 REV. ** *A *B *C ECN NO. 113859 118902 122244 499538 Issue Date 03/06/02 10/09/02 12/27/02 See ECN Orig. of Change DSG GBI RBI PCI Description of Change Changed from Spec number: 38-00227 to 38-04003 Updated ordering information Added power up requirements to Maximum ratings information Updated ordering information Document #: 38-04003 Rev. *C Page 8 of 8 [+] [+] Feedback