CY8CKIT-030 PSoC® 3 Development
Kit Guide
Doc. # 001-61038 Rev. **
Cypress Semiconductor
198 Champion Court
San Jose, CA 95134-1709
Phone (USA): 800.858.1810
Phone (Intnl): 408.943.2600
http://www.cypress.com
Copyrights
Copyrights
© Cypress Semiconductor Corporation, 2011. The information contained herein is subject to change without notice. Cypress
Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress
product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor
intended to be used for medical, life support, life saving, critical control or safety applications, unless pursuant to an express
written agreement with Cypress. Furthermore, Cypress does not authorize its products for use as critical components in lifesupport systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The
inclusion of Cypress products in life-support systems application implies that the manufacturer assumes all risk of such use
and in doing so indemnifies Cypress against all charges.
Any Source Code (software and/or firmware) is owned by Cypress Semiconductor Corporation (Cypress) and is protected by
and subject to worldwide patent protection (United States and foreign), United States copyright laws and international treaty
provisions. Cypress hereby grants to licensee a personal, non-exclusive, non-transferable license to copy, use, modify, create
derivative works of, and compile the Cypress Source Code and derivative works for the sole purpose of creating custom software and or firmware in support of licensee product to be used only in conjunction with a Cypress integrated circuit as specified in the applicable agreement. Any reproduction, modification, translation, compilation, or representation of this Source
Code except as specified above is prohibited without the express written permission of Cypress.
Disclaimer: CYPRESS MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS MATERIAL, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
PARTICULAR PURPOSE. Cypress reserves the right to make changes without further notice to the materials described
herein. Cypress does not assume any liability arising out of the application or use of any product or circuit described herein.
Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure
may reasonably be expected to result in significant injury to the user. The inclusion of Cypress’ product in a life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all
charges.
Use may be limited by and subject to the applicable Cypress software license agreement.
PSoC® Creator™ is a trademark and PSoC® is a registered trademark of Cypress Semiconductor Corp. All other trademarks
or registered trademarks referenced herein are property of the respective corporations.
Flash Code Protection
Cypress products meet the specifications contained in their particular Cypress PSoC Data Sheets. Cypress believes that its
family of PSoC products is one of the most secure families of its kind on the market today, regardless of how they are used.
There may be methods, unknown to Cypress, that can breach the code protection features. Any of these methods, to our
knowledge, would be dishonest and possibly illegal. Neither Cypress nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as ‘unbreakable’.
Cypress is willing to work with the customer who is concerned about the integrity of their code. Code protection is constantly
evolving. We at Cypress are committed to continuously improving the code protection features of our products.
2
CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev. **
Contents
1. Introduction
1.1
1.2
1.3
1.4
1.5
Kit Contents .................................................................................................................5
PSoC Creator ..............................................................................................................5
Additional Learning Resources....................................................................................6
Document History ........................................................................................................6
Documentation Conventions .......................................................................................6
2. Getting Started
2.1
2.2
2.3
2.4
2.5
11
System Block Diagram ..............................................................................................11
Functional Description ...............................................................................................12
4.2.1 Power Supply .................................................................................................12
4.2.1.1 Power Supply Jumper Settings........................................................14
4.2.1.2 Grounding Scheme ..........................................................................14
4.2.1.3 Low Power Functionality ..................................................................15
4.2.2 Programming Interface...................................................................................15
4.2.2.1 On-board Programming Interface ....................................................15
4.2.2.2 JTAG/SWD Programming................................................................16
4.2.3 USB Communication......................................................................................17
4.2.4 Boost Convertor .............................................................................................18
4.2.5 32-kHz and 24-MHz Crystal ...........................................................................19
4.2.6 PSoC 3 Development Kit Expansion Ports ....................................................19
4.2.6.1 Port D...............................................................................................19
4.2.6.2 Port E ...............................................................................................21
4.2.7 RS-232 Interface ............................................................................................22
4.2.8 Prototyping Area ............................................................................................22
4.2.9 Character LCD ...............................................................................................23
4.2.10 CapSense Sensors ........................................................................................24
5. Example Projects
5.1
9
Introduction ..................................................................................................................9
Programming PSoC 3 Device ......................................................................................9
4. Hardware
4.1
4.2
7
Introduction ..................................................................................................................7
CD Installation .............................................................................................................7
Install Hardware...........................................................................................................8
Install Software ............................................................................................................8
Uninstall Software........................................................................................................8
3. Kit Operation
3.1
3.2
5
27
Voltage Display..........................................................................................................28
5.1.1 Project Description .........................................................................................28
CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev. **
3
Contents
5.2
5.3
5.4
5.5
5.1.2 Hardware Connections .................................................................................. 28
5.1.3 Del-Sig ADC Configuration ............................................................................ 28
5.1.4 Verify Output .................................................................................................. 29
Intensity LED ............................................................................................................. 29
5.2.1 Project Description......................................................................................... 29
5.2.2 Hardware Connections .................................................................................. 29
5.2.3 Verify Output .................................................................................................. 30
Low Power Demonstration ........................................................................................ 30
5.3.1 Project Description......................................................................................... 30
5.3.2 Hardware Connections .................................................................................. 30
5.3.3 Verify Output .................................................................................................. 30
CapSense Example................................................................................................... 31
5.4.1 Project Description......................................................................................... 31
5.4.2 Hardware Connections .................................................................................. 31
5.4.3 Verify Output .................................................................................................. 32
ADC and DMA-DAC Example ................................................................................... 33
5.5.1 Project Description......................................................................................... 33
5.5.2 Hardware Connections .................................................................................. 33
5.5.3 Verify Output .................................................................................................. 33
A. Appendix
A.1
A.2
A.3
4
35
Schematic.................................................................................................................. 35
Board Layout ............................................................................................................. 40
A.2.1 PDC-09589 Top ............................................................................................. 40
A.2.2 PDC-09589 Power ......................................................................................... 41
A.2.3 PDC-09589 Ground ....................................................................................... 42
A.2.4 PDC-09589 Bottom........................................................................................ 43
BOM ......................................................................................................................... 44
CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev. **
1.
Introduction
Thank you for your interest in the CY8CKIT-030 PSoC® 3 Development Kit. This kit allows you to
develop precision analog and low power designs using PSoC 3. You can design your own projects
with PSoC Creator™ or by altering sample projects provided with this kit.
The CY8CKIT-030 PSoC 3 Development Kit is based on the PSoC 3 family of devices. PSoC 3 is a
Programmable System-on-Chip™ platform for 8- and 16-bit applications. It combines precision
analog and digital logic with a high-performance CPU. With PSoC, you can create the exact
combination of peripherals and integrated proprietary IP to meet your application requirements.
1.1
Kit Contents
The PSoC 3 Development Kit contains:
■
Development board
■
Kit CD
■
Quick Start Guide
■
USB A to Mini B cable
■
3.3 V LCD module
Inspect the contents of the kit; if you find any part missing, contact your nearest Cypress sales office
for help.
1.2
PSoC Creator
Cypress's PSoC Creator software is a state-of-the-art, easy-to-use integrated development
environment (IDE) that introduces a game-changing, hardware and software design environment
based on classic schematic entry and revolutionary embedded design methodology.
With PSoC Creator, you can:
■
Create and share user-defined, custom peripherals using hierarchical schematic design.
■
Automatically place and route select components and integrate simple glue logic, normally
located in discrete muxes.
■
Trade-off hardware and software design considerations allowing you to focus on what matters
and getting to market faster.
PSoC Creator also enables you to tap into an entire tools ecosystem with integrated compiler tool
chains, RTOS solutions, and production programmers to support both PSoC 3 and PSoC 5.
CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev. **
5
Introduction
1.3
Additional Learning Resources
Visit www.cypress.com for additional learning resources in the form of data sheets, technical
reference manual, and application notes.
1.4
Document History
Revision
**
1.5
PDF Creation
Date
01/06/11
Origin of
Change
QVS
Description of Change
Initial version of kit guide
Documentation Conventions
Table 1-1. Document Conventions for Guides
Convention
6
Usage
Courier New
Displays file locations, user entered text, and source code:
C:\ ...cd\icc\
Italics
Displays file names and reference documentation:
Read about the sourcefile.hex file in the PSoC Designer User Guide.
[Bracketed, Bold]
Displays keyboard commands in procedures:
[Enter] or [Ctrl] [C]
File > Open
Represents menu paths:
File > Open > New Project
Bold
Displays commands, menu paths, and icon names in procedures:
Click the File icon and then click Open.
Times New Roman
Displays an equation:
2+2=4
Text in gray boxes
Describes cautions or unique functionality of the product.
CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev. **
2.
2.1
Getting Started
Introduction
This chapter describes how to install and configure the PSoC 3 Development Kit. Chapter 3
describes the kit operation. It explains how to program a PSoC 3 device with PSoC Programmer and
use the kit with the help of an example project. To reprogram the PSoC device with PSoC Creator,
refer to the CD installation instructions for PSoC Creator. Chapter 4 details the hardware operation.
Chapter 5 provides instructions to create a simple example project. The Appendix section provides
the schematics and BOM associated with the PSoC 3 Development Kit.
2.2
CD Installation
Follow these steps to install the PSoC 3 Development Kit software:
1. Insert the kit CD into the CD drive of your PC. The CD is designed to auto-run and the kit menu
appears.
Figure 2-1. Kit Menu
Note If auto-run does not execute, double-click AutoRun on the root directory of the CD.
CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev. **
7
Getting Started
After the installation is complete, the kit contents are available at the following location:
C:\Program Files\Cypress\PSoC 3 Development Kit\1.0
2.3
Install Hardware
No hardware installation is required for this kit.
2.4
Install Software
When installing the PSoC 3 Development Kit, the installer checks if your system has the required
software. These include PSoC Creator, PSoC Programmer, Windows Installer, .NET, Acrobat
Reader, and KEIL Complier. If these applications are not installed, then the installer prompts you to
download and install them.
Install the following software from the kit CD:
1. PSoC Creator
2. PSoC Programmer 3.12.3 or later
Note When installing PSoC Programmer, select Typical on the Installation Type page.
3. Example projects (provided in the Firmware folder)
2.5
Uninstall Software
The software can be uninstalled using one of the following methods:
8
■
Go to Start > Control Panel > Add or Remove Programs; select the Remove button.
■
Go to Start > All Programs > Cypress > Cypress Update Manager > Cypress Update Manager; select the Uninstall button.
■
Insert the installation CD and click Install PSoC 3 Development Kit button. In the CyInstaller
for PSoC 3 Development Kit 1.0 window, select Remove from the Installation Type drop-down
menu. Follow the instructions to uninstall.
CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev. **
3.
3.1
Kit Operation
Introduction
The example projects in the PSoC 3 Development Kit help you develop precision analog
applications using the PSoC 3 family of devices. The board also has hooks to enable low power
measurements for low power application development and evaluation.
3.2
Programming PSoC 3 Device
The default programming interface for the board is a USB based on-board programming interface.
To program the device, plug the USB cable to the programming USB connector J1, as shown in the
following figure.
Figure 3-1. Connect USB Cable to J1
When plugged in, the board enumerates as DVKProg. After enumeration, initiate, build, and then
program using PSoC Creator.
When using on-board programming, it is not necessary to power the board from the 12-V or 9-V DC
supply or a battery. The USB power to the programming section can be used.
If the board is already powered from another source, plugging in the programming USB does not
damage the board.
CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev. **
9
Kit Operation
The PSoC 3 device on the board can also be programmed using a MiniProg3 (CY8CKIT-002). To
use MiniProg3 for programming, use the connector J3 on the board as shown in the following figure.
Note The MiniProg3 (CY8CKIT-002) is not part of the PSoC 3 Development Kit contents. It can be
purchased from the Cypress Online Store.
Figure 3-2. Connect MiniProg
With the MiniProg3, programming is similar to the on-board programmer; however, the setup
enumerates as a MiniProg3.
10
CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev. **
4.
4.1
Hardware
System Block Diagram
The PSoC 3 Development Kit has the following sections:
■
Power supply system
■
Programming interface
■
USB communications
■
Boost convertor
■
PSoC 3 and related circuitry
■
32-kHz crystal
■
24-MHz crystal
■
Port E (analog performance port) and port D (CapSense® or generic port)
■
RS232 communications interface
■
Prototyping area
■
Character LCD interface
■
CapSense buttons and sliders
CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev. **
11
Hardware
Figure 4-1. PSoC 3 Development Kit Details
Communication USB
Boost Converter
10-Pin JTAG/SWD/SWO
Input
Debug and Prog Header
9V Battery
Power Adapter
On-Board
Programming
USB
32 kHz Crystal
24 MHz Crystal
Port D
(CapSense/
Miscellaneous
Port)
Port E
(Analog Port)
RESET Button
Variable
Resistor/
Potentiometer
CapSense
RS-232
Interface
Character LCD Interface
4.2
Functional Description
4.2.1
Power Supply
Switches/LEDs
Prototyping Area
The power supply system on this board is versatile; input supply can be from the following sources:
12
■
9-V or 12-V wall wart supply using connector J4
■
9-V battery connector using connectors BH1 and BH2
■
USB power from communications section using connector J2
■
USB power from the on-board programming section using connector J1
■
Power from JTAG/SWD programming interface using connector J3
■
Power through boost convertor that uses the input test points VBAT and GND
CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev. **
Hardware
The board power domain has five rails:
■
Vin rail: This is where the input of the on-board regulators are connected. This domain is
powered through protection diodes.
■
5-V rail: This is the output of the 5-V regulator U2. The rail is a fixed 5 V output regardless of
jumper settings. The voltage in this rail can be less than 5 V only when the board is powered by
the USB. This 5-V rail powers the circuits that require fixed 5 V supply.
■
3.3-V rail: This is the output of the 3.3-V regulator U4. This rail remains 3.3 V regardless of
jumper settings or power source changes. It powers the circuits requiring fixed 3.3 V supply such
as the on-board programming section.
■
Vddd rail: This rail provides power to the digital supply for the PSoC device. It can be derived
from either the 5 V or 3.3 V rail. The selection is made using J10 (3-pin jumper).
■
Vdda rail: This rail provides power to the analog supply of the PSoC device. It is the output of a
low noise regulator U1. The regulator is a variable output voltage and can be either 3.3 V or 5 V.
This is done by changing the position on J11 (3-pin jumper).
The following block diagram shows the structure of the power system on the board.
Figure 4-2. Power System Structure
USB
Programming
USB
Communication
Power
3.3 V
5V
Vin
3.3-V Regulator
Vddd
Selection
(J10)
Vddd
9-V Battery
5V
5-V Regulator
12-V/9-V Wall
wart
5-V/3.3-V Analog
Regulator
CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev. **
Vdda
Selection
(J11)
Vdda
13
Hardware
4.2.1.1
Power Supply Jumper Settings
Figure 4-3. Jumper Settings
Two jumpers govern the power rails on the board. J10 is responsible for the selection of Vddd (digital
power) and J11 selects Vdda (analog power).
The jumper settings for each power scheme are as follows.
Powering Scheme
Jumper Settings
Vdda = 5 V, Vddd = 5 V
J10 in 5 V setting and J11 in 5 V setting.
Vdda = 3.3 V, Vddd = 3.3 V
J10 in 3.3 V setting and J11 in 3.3 V setting.
Vdda = 5 V, Vddd = 3.3 V
J10 in 3.3 V setting and J11 in 5 V setting.
Vdda = 3.3 V, Vddd = 5 V
Can be achieved, but is an invalid condition because the PSoC 3 silicon
performance cannot be guaranteed.
Warning:
4.2.1.2
■
The PSoC device performance is guaranteed when Vdda is greater than or equal to Vddd. Failure to meet this condition can have implications on the silicon performance.
■
When USB power is used, ensure a 3.3 V setting on both analog and digital supplies. This is
because, the 5 V rail of the USB power is not accurate and is not recommended.
Grounding Scheme
The board is designed considering analog designs as major target applications. Therefore, the
grounding scheme in the board is unique to ensure precision analog performance.
There are three types of ground on this board:
■
GND - This is the universal ground where all the regulators are referred. Both Vssd and Vssa
connect to this ground through a star connection.
■
Vssd - This is the digital ground and covers the digital circuitry present on the board, such as
RS232 and LCD.
■
Vssa - This is the analog ground and covers the grounding for analog circuitry present on the
board, such as the reference block.
When creating custom circuitry in the prototyping area provided on the board, remember to use the
Vssa for the sensitive analog circuits and Vssd for the digital ones.
Port E on the board is the designated analog expansion connector. This connector brings out
ports 0, 3, and 4, which are the best performing analog ports on PSoC 3 and PSoC 5 devices. The
expansion connector, port E, has two types of grounds. One is the analog ground (GND_A in silk
14
CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev. **
Hardware
screen, Vssa in the schematic), which connects directly to the analog ground on the board. The
other ground known simply as GND, is used for the digital and high current circuitry on the
expansion board. This differentiation on the connector grounds helps the expansion board designer
to separate the analog and digital ground on any high precision analog boards being designed for
port E.
4.2.1.3
Low Power Functionality
The kit also facilitates application development, which requires low power consumption. Low power
functions require a power measurement capability, also available in this kit.
The analog supply is connected to the device through the zero-ohm resistor (R23). By removing this
resistor and connecting an ammeter in series using the test points, Vdda_p and Vdda, you can
measure the analog power used by the system.
The digital supply can be monitored by removing connection on the jumper J10 and connecting an
ammeter in place of the short. This allows to measure the digital power used by the system.
The board provides the ability to measure analog and digital power separately. To measure power at
a single point, rather than at analog and digital separately, remove the resistor R23 to disconnect the
analog regulator from powering the Vdda and short Vdda and Vddd through R30. Now, the net
power can be measured at the J10 jumper similar to the digital power measurement. To switch
repeatedly between R23 and R30, moving around the zero-ohm resistors can be discomforting.
Hence, a J38 (unpopulated) is provided to populate a male 3-pin header and have a shorting jumper
in the place of R23/R30.
While measuring device power, make the following changes in the board to avoid leakage through
other components that are connected to the device power rails.
4.2.2
■
Disconnect the RS232 power by disconnecting R58. An additional jumper capability is available
as J37 if you populate it with a 2-pin male header.
■
Disconnect the potentiometer by disconnecting J30.
■
Ground the boost pins if boost operation is not used by populating R1, R28, and R29. Also make
sure R25 and R31 are not populated.
Programming Interface
This kit allows programming in two modes:
4.2.2.1
■
Using the on-board programming interface
■
Using the JTAG/SWD programming interface that uses a MiniProg3
On-board Programming Interface
The on-board programmer interfaces with your PC through a USB connector marked as USB
programming.
CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev. **
15
Hardware
Figure 4-4. On-board Programming Interface
When the USB programming is plugged into the PC, it enumerates as DVKProg and you can use the
normal programming interface from PSoC Creator to program this board through the on-board
programmer.
A zero-ohm resistor R9 is provided on the board to disconnect power to the on-board programmer.
4.2.2.2
JTAG/SWD Programming
Apart from the on-board programming interface, the board also provides the option of using the
MiniProg3. This interface is much faster than the on-board program interface. The JTAG/SWD
programming is done through the 10-pin connector, J3.
16
CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev. **
Hardware
Figure 4-5. JTAG/SWD Programming
The JTAG/SWD programming using J3 requires the MiniProg3 programmer, which can be
purchased from http://www.cypress.com.
4.2.3
USB Communication
The board has a USB communications interface that uses the connector, as shown in Figure 4-6.
The USB connector connects to the D+ and D– lines on the PSoC to enable development of USB
applications using the board. This USB interface can also supply power to the board as discussed in
Power Supply on page 12.
CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev. **
17
Hardware
Figure 4-6. USB Interface
4.2.4
Boost Convertor
The PSoC 3 device has a unique capability of working from a voltage supply as low as 0.5 V. This is
possible using the boost convertor. The boost convertor uses an external inductor and a diode.
These components are pre-populated on the board. Figure 4-7 shows the boost convertor.
To enable the boost convertor functionality, make the following hardware changes on the board.
■
Populate resistors R25, R27, R29, and R31
■
Ensure that R1 and R28 are not populated
After making these changes, you can make a boost convertor based design by making the
appropriate configurations in the project. The input power supply to the boost convertor must be
provided through the test points marked Vbat and GND.
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CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev. **
Hardware
Figure 4-7. Boost Converter
4.2.5
32-kHz and 24-MHz Crystal
PSoC 3 has an on-chip Real Time Clock (RTC), which can function in sleep. This requires an
external 32-kHz crystal, which is provided on board to facilitate RTC based designs. The PSoC 3
also has an option for an external MHz crystal in applications where the IMO tolerance is not
satisfactory. In these applications, the board has a 24-MHz crystal to provide an accurate main
oscillator.
4.2.6
PSoC 3 Development Kit Expansion Ports
The PSoC 3 Development Kit has two expansion ports, Port D and Port E, each with their own
unique features.
4.2.6.1
Port D
This is the miscellaneous port on the board. It is designed to handle CapSense based application
boards and digital application boards. The signal routing to this port adheres to the stringent
requirements posed to provide good performance CapSense. This port can also be used for other
functions and Expansion Board Kits (EBKs).
This port is not designed for precision analog performance. The pins on the port are functionally
compatible to port B of the PSoC Development Kit. So any project made to function on port B of the
PSoC Development Kit can be easily ported over to port D on this board. A caveat to this is that
there is no opamp available on this port; therefore, opamp based designs are not recommended for
use on this port.
CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev. **
19
Hardware
The following figure shows the pin mapping for the port.
Figure 4-8. Port D
20
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Hardware
4.2.6.2
Port E
This is the analog port on this kit and has special layout considerations. It also brings out all analog
resources such as dedicated opamps to a single connect. Therefore, this port is ideal for precision
analog design development. This port is functionally compatible to port A of the PSoC Development
Kit and it is easy to port application developed on port A.
There are two types of grounds on this port, CGND1 and CGND2. The two grounds are connected to
the GND on the board, but are provided for expansion boards designed for analog performance. The
expansion boards have an analog and digital ground. The two grounds on this port help to keep it
distinct even on this board until it reaches the GND plane.
Figure 4-9. Port E
CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev. **
21
Hardware
4.2.7
RS-232 Interface
The board has an RS-232 transceiver on board for designs using RS-232 (UART). The RS-232
section power can be disconnected through a single resistor R58. This is useful for low-power
designs.
Figure 4-10. RS-232 Interface
4.2.8
Prototyping Area
The prototyping area on the board has two complete ports of the device for simple custom circuit
development. The ports in the area are port 0 and port 3, which bring out the four dedicated opamp
pins on the device. Therefore, these ports can be used with the prototyping area to create simple yet
elegant analog designs. It also brings SIOs such as port 12[4], port 12[5], port 12[6], and port 12[7]
and GPIOs such as port P6[0] and port P6[6]. There is power and ground connections close to the
prototyping space for convenience.
The area also has four LEDs and two switches for applications development. The two switches on
the board are hard-wired to port 15[5] and port 6[1]. Two LEDs out of the four are hard-wired to port
6[2] and port 6[3] and the other two are brought out on pads closer to the prototyping area.
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CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev. **
Hardware
Figure 4-11. Prototyping Area
This area also comprises of a potentiometer to be used for analog system development work. The
potentiometer connects from Vdda, which is a noise free supply and is hence capable of being used
for low noise analog applications. Potentiometer output is available on P6[5] and VR on header P6 in
prototyping area.
4.2.9
Character LCD
The kit has a character LCD module, which goes into the character LCD header, P8. The LCD runs
on a 3.3-V supply and can function regardless of the voltage on which PSoC is powered. There is a
zero-ohm resistor setting available on the LCD section (R71/72), making it possible to convert it to a
3.3 V LCD.
CAUTION: When the resistor is shifted to support a 5 V LCD module, plugging in a 3.3 V LCD module into the board can damage the LCD module.
Figure 4-12. Pin 1 Indication
CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev. **
23
Hardware
Figure 4-13. LCD Connected on P8 Connector
4.2.10
CapSense Sensors
The board layout has considered the special requirements for CapSense. It has two CapSense
buttons and a 5-element CapSense slider. The CapSense buttons are connected to pins P5[6] and
P5[5]. The slider elements are connected to pins P5[0:4].
The Cmod (modulation capacitor) is connected to pin P6[4] and an optional Rb (bleeder resistor) is
available on P15[4].
24
CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev. **
Hardware
Figure 4-14. CapSense Sensors
CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev. **
25
Hardware
26
CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev. **
5.
Example Projects
To access example projects described in this section, open the PSoC Creator start page. For
additional example projects, visit http://www.cypress.com.
Figure 5-1. PSoC Creator Start Page
Follow these steps to open and program example projects:
1. Click on Example Projects from Kits and Solutions on the PSoC Creator Start page.
2. Create a folder in the desired location and click OK.
3. The project opens in PSoC Creator and is saved to that folder.
4. Build the example project to generate the .hex file.
5. To program the example projects, power the board using the instructions in On-board Programming Interface on page 15.
6. Click the Program icon to program the board.
CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev. **
27
Example Projects
5.1
Voltage Display
5.1.1
Project Description
This example code measures a simple analog voltage controlled by the potentiometer. The code
uses the internal Delta-Sigma ADC configured for a 20-bit operation; the ADC range is 0 to Vdda.
The voltage measurement resolution is in microvolts. The results are displayed on the character
LCD module.
Note The PSoC 3 Development Kit is factory-programmed with the Voltage Display example
project.
5.1.2
Hardware Connections
The example requires the character LCD on P8. Because it uses the potentiometer, the jumper
POT_PWR should be in place. This connects the potentiometer to the Vdda.
5.1.3
Del-Sig ADC Configuration
Figure 5-2. Delta-Sigma ADC Configuration
The Del-Sig ADC is configured as follows:
28
■
Continuous mode of operation is selected because the ADC scans only one channel.
■
Conversion rate is set to 187 samples/sec, which is the maximum sample rate possible at 20-bit
resolution.
■
Range is set to Vssa to Vdda in single ended mode because the potentiometer output is a single
ended signal that can go from 0 to Vdda. Therefore, at 20-bit resolution, the ADC will resolve in
steps of Vdda/220.
CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev. **
Example Projects
5.1.4
Verify Output
Build and program the example project and reset the device. The LCD shows the voltage reading
corresponding to the voltage on the potentiometer. Figure 5-3 demonstrates the functionality. When
you turn the potentiometer, the voltage value changes. You can also verify the voltage on the
potentiometer using a precision multimeter.
Note The potentiometer connects to a differential ADC, which works in single-ended mode. This
means the ADC input is measured against internal Vssa. Any offset in the measurement can be
positive or negative. This can result in a small offset voltage, even when the potentiometer is zero.
Figure 5-3. Voltage Display
5.2
Intensity LED
5.2.1
Project Description
This example code uses a pulse width modulator (PWM) to illuminate an LED. When the pulse width
of the PWM varies, the LED brightness changes. By continuously varying the pulse width of the
PWM, the example code makes an LED go from low brightness to a high brightness and back.
5.2.2
Hardware Connections
No hardware connections are required for this project, because all the connections are hard wired to
specific pins on the board.
CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev. **
29
Example Projects
5.2.3
Verify Output
When the example code is built and programmed into the device, reset the device by pressing the
RESET button or power cycling the board.
The project output is LED3 glowing with a brightness control that changes with time (see Figure 5-4).
Figure 5-4. Verify Output - Example Project
5.3
Low Power Demonstration
5.3.1
Project Description
This example project demonstrates the low power functionality of PSoC 3. The project implements
an RTC based code, which goes to sleep and wakes up on the basis of switch inputs.
The RTC uses an accurate 32-kHz clock generated using the external crystal provided on the board.
When there is a key press, the device is put to sleep while the RTC is kept active.
5.3.2
Hardware Connections
The project requires a 3.3 V LCD to view the time display. No extra connections are required for
project functionality. To make low power measurements using this project, refer and implement the
changes proposed in Low Power Functionality on page 15.
5.3.3
Verify Output
In normal operation, the project displays the time starting from 00:00:00. When you press the SW2
button, the device is put to sleep. If an ammeter is connected to measure the system current (refer
Low Power Functionality on page 15 for details), a system current of less than 2 µA is displayed.
The device wakes up when SW2 is pressed again and displays the time on the LCD. The following
figures show the output display.
30
CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev. **
Example Projects
Figure 5-5. PSoC 3 in Active Mode
Figure 5-6. PSoC 3 in Sleep Mode
5.4
CapSense Example
5.4.1
Project Description
This example project provides a platform to build CapSense based projects using PSoC 3. The
example uses two CapSense buttons and one 5-element slider provided on the board. Each
capacitive sensor on the board is scanned using the Cypress CSD algorithm. The buttons are pretuned in the example code to take care of factors such as board parasitic.
5.4.2
Hardware Connections
This project uses the LCD for display; therefore, ensure that it is plugged into the port. There are no
specific hardware connections required for this project because all connections are hard wired on
the board.
CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev. **
31
Example Projects
5.4.3
Verify Output
Build and program the example project and reset the device. The LCD displays the status of the two
buttons as ON/OFF. The LCD also shows the slider touch position as a percentage. When you touch
either of the buttons, the corresponding button's state changes on the LCD. When the slider is
touched, the corresponding finger position is displayed as a percentage on the LCD.
Figure 5-7. CapSense Slider
Figure 5-8. CapSense Button
32
CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev. **
Example Projects
5.5
ADC and DMA-DAC Example
5.5.1
Project Description
This project demonstrates sine wave generation by using an 8-bit DAC and DMA. The sine wave
period is based on the current value of the ADC value of the potentiometer.
The firmware reads the voltage output by the board potentiometer and displays the raw counts on
the board character LCD display. An 8-bit DAC outputs a table generated sine wave to an LED using
DMA at a frequency proportional to the ADC count.
5.5.2
Hardware Connections
For this example, the character LCD must be installed on P8. The example uses the potentiometer;
therefore, the jumper POT_PWR should also be in place. This jumper connects the potentiometer to
the Vdda.
5.5.3
Verify Output
Build, program the device, and press the Reset button on the PSoC 3 Development Kit to see the
ADC output displayed on the LCD. LED4 is an AC signal output whose period is based on the ADC.
Turning the potentiometer results in LCD value change. This also results in change in the period of
the sine wave fed into LED4, which can also be observed.
Figure 5-9. ADC Output
CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev. **
33
Example Projects
34
CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev. **
Schematic
Power Supply
NO LOAD
TP4 RED
V5.0
5.0V/1A LDO
U2
3
3216
R24
2 0805
AP1117D50G
TO-252
VIN
+
2
VOUT
C143216 +
D-64
2
9V Battery
Terminals
GND
TP3 RED
NO LOAD
V3.3
VSSD
GND
R26
ZERO
V5.0
LM1117MPX-3.3
VIN
1
+ C2
10 uFd 16v
2
VOUT
GND
4
TAB
3216
U4
+ C15
10 uFd 16v
VDDA
GND
OUT
SENSE
nSHDN
GND
GND1
GND2
Byp
VDDA
0805
0805
VSSD
1
ZERO
NO LOAD
VSSA
VSSD
2
1
J11
V5.0
V3.3
J10
Note:
For 5V: J11-3 to J11-2, J10-3 to J10-2
For 3.3V: J11-2 to J11-1, J10-2 to J10-1
For 5V Analog,3.3V Digital: J11-3 to J11-2, J10-2 to J10-1
1
VSSB
+ C13
3
2
1
0805
R57
1
2
3
VSSA
D5
2
J38
VDDD
330 ohm
2 2
Note: Load R30 when either
Analog and Digital regulator required
1
2
3
VSSA
R11
1K
0805
1
R15
GND
1
3216
LED Green
0805
R13
3.74K
V5.0
ZERO NO LOAD
GND
1
1
4
VDDD
R30
2
R12
3.16K
SENSE
3
6
7
GND
VDDD VDDA
3
2SENSE
1SEL3V3
5
10 uFd 16v
0.1 uFd
C17
2
VDDA_P
RED
10 uFd 16v
IN
+ C5
SEL3V3 2
3216
1
1
BAT 9V MALE
VDDA_P
LT1763CS8
0603
8
J33
VSSD
5V/3.3V/0.5A LDO
U1
2
2
1
3
0402
NEG2
NEG1
NEG3
9V
0603
GND
BH1
R23
ZERO
0805
BAT 9V FEMALE
2
3.3V/0.8A LDO
3
2
1
3216
1
3
2
1
3
SOT-223
1
BH2
10 uFd 16v
0805
SS12-E3/61T
GND
POS2
POS1
POS3
C4
D4
1
POWER JACK P-5
1
ZERO
2
VIN
SS12-E3/61T
1
1
J4
D-64
10 uFd 16v
D3
1 2
3
2
GND
+9V/+12V, 1A
3
2
1
A.1
Appendix
1
A.
VSSD
VSSA
Note: Load R25, R29 and R31 for operating the device on Boost
Internal Boost Regulator
VDDD
Ind
VDDA
R31
NO LOAD
0805
R25
NO LOAD
L1
Vboost
0805
R29
NO LOAD
VBAT
TP2
RED
0805
VBAT
D6
1 R27
ZERO
SOT23
7032
2
0805
22 uH
0805
0402
GND
GND
0.1 uFd
1210
C6
22 uFd
10V
C22
22 uFd
10V
TP1
BLACK
GND
1210
GND
C23
0805
C3
R1
NO LOAD
ZHCS
0402
0.1 uFd
R28
NO LOAD
VSSB
Note: Load R1,R28 and Un-Load R27 for low power application
CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev. **
35
VDDD
VDDD
VCCd
0402
C44
1.0 uFd
ZERO
VSSD
Ind
Vboost
VBAT
VSSD
VSSB
CY8C3866AXI-040 TQFP100
1
NO LOAD
1
C40
0402
0.1 uFd
VDDA
VSSA
VCCa
C37
0603
C36
C38
1.0 uFd 0402 0.1 uFd
0402
0.1 uFd
VSSA
VSSD
32.768KHz XTAL
Y2
1
2
P12[1]
P12[0]
P3[7]
P3[6]
0603
J16
P3[0]
P3[1]
P3[2]
P3[3]
P3[4]
P3[5]
1
0603
P1[6]
P1[7]
P12[6]
P12[7]
P5[4]
P5[5]
P5[6]
P5[7]
DP_P
DM_P
P0[3]
P0[2]
P0[1]
P0[0]
P4[1]
P4[0]
P12[3]
P12[2]
VSSA
VDDD
R36
R39
ZERO
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
VDDio0
P0_3
P0_2
P0_1
P0_0
P4_1
P4_0
SIO_P12_3
SIO_P12_2
VSSd
VDDa
VSSa
VCCa
NC8
NC7
NC6
NC5
NC4
NC3
P15_3
P15_2
SIO, I2C1_SDA P12_1
SIO, I2C1_SCL P12_0
P3_7
P3_6
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
TP5
NO LOAD
/XRES
P5[0]
P5[1]
P5[2]
P5[3]
SWDIO
SWDCK
P1[2]
SWO
TDI
P1[5]
P2_5
P2_6
P2_7
P12_4 I2C0_SCL, SIO
P12_5 I2C0_SDA, SIO
P6_4
P6_5
P6_6
P6_7
VSSb
Ind
Vboost
Vbat
VSSd
XRES
P5_0
P5_1
P5_2
P5_3
P1_0
P1_1
P1_2
P1_3
P1_4
P1_5
3
4
5
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
1
1 PIN HDR
NO LOAD
1
0603
NO LOAD
2200 pFd Cmod
2
1
0805
1
VSSD
VDDA
0603
R2
3K
R8 NO LOAD
1.5K
P2[5]
P2[6]
P2[7]
P12[4]
P12[5]
P6[4]
P6[5]
P6[6]
C39
P6[7]
J8
J22
VDDio2
P2_4
P2_3
P2_2
P2_1
P2_0
P15_5
P15_4
P6_3
P6_2
P6_1
P6_0
VDDd
VSSd
VCCd
P4_7
P4_6
P4_5
P4_4
P4_3
P4_2
P0_7
P0_6
P0_5
P0_4
VSSD
P15[4]
Rbleed
J12
1 PIN HDR 1 PIN HDR
NO LOAD
NO LOAD
1
1
U7
VSSD
C25
0603
5 pFd
2
VBUS2
1 PIN HDR
J26
2
0.1 uFd
P4[7]
P4[6]
P4[5]
P4[4]
P4[3]
P4[2]
P0[7]
P0[6]
P0[5]
P0[4]
P2[4]
P2[3]
P2[2]
P2[1]
P2[0]
P15[5]
P15[4]
P6[3]
P6[2]
P6[1]
P6[0]
0402
100
99
98
97
96
95
94
93
92
91
90
89
88
87
86
85
84
83
82
81
80
79
78
77
76
C43
1 PIN HDR
NO LOAD
R38
2.2K
VDDA
1
1
VDDio1
P1_6
P1_7
P12_6_SIO
P12_7_SIO
P5_4
P5_5
P5_6
P5_7
P15_6 DP
P15_7 DM
VDDd
VSSd
VCCd
NC1
NC2
P15_0
P15_1
P3_0
P3_1
P3_2
P3_3
P3_4
P3_5
VDDio3
1
VDDD
0603
1
J25
1
0603
C41
0.1 uFd
1
0603
R47
C42
1.0 uFd
C27
5 pFd
NO LOAD
1 PIN HDR
VSSA
VSSA
VDDA
1 PIN HDR
NO LOAD
0402
C34
0.1 uFd
VCCd
VDDD
Y3
0402
VSSD
C29
C33
0.1 uFd
1.0 uFd 0603
C31
22 pFd
C35
0.1 uFd
0402
0402
C30
22 pFd
C26
0.1 uFd
VSSA
VSSD
PSoC 3 Section
36
0402
VSSA
0402
VSSD
R35
ZERO
24 MHz Crystal
2
1
DP 1
DM 1
1
0603
0603
1
0603
22E R33
2
2
22E R32
ZERO
J18
Note:
Place De-Caps near to the Chip
CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev. **
C7
0402
C18
0402
0.1 uFd
C12
0402
0.1 uFd
C20
0402
0.1 uFd
C21
0402
0.1 uFd
C10
0402
0.1 uFd
PLACE ONE CAP PER EACH VCC ON U5.
0.1 uFd
VDDD
GND
2
0402
0402
1
1
4
5
PD0/FD8
PD1/FD9
PD2/FD10
PD3/FD11
PD4/FD12
PD5/FD13
PD6/FD14
PD7/FD15
RDY0/SLRD
RDY1/SLWR
4
15
16
5
SCL
SDA
18
19
20
21
22
23
24
25
45
46
47
48
49
50
51
52
J40 NO LOAD
1
3
5
7
9
P2[3]
P2[4]
P2[5]
P2[6]
P2[7]
2
4
6
8
10
50MIL KEYED SMD
VSSD
1 TV1
/XRES
10-PIN TRACE HEADER
SWDIO
SWDCK
SWO
VBUS1
R21
39K
1%
FIRMWARE UPDATE
REQUIRED FOR
USB BACKVOLTAGE
COMPLIANCE.
GND
P3[0]
P3[1]
P3[2]
P3[3]
P3[4]
P3[5]
P3[6]
P3[7]
8
7
6
5
4
3
2
1
NO LOAD
VDDD
J5
330 ohm
2
1
0805
SW2
2A
2B
1A
1B
P6[1]
SW PUSHBUTTON
2A
2B
VSSD
VSSA
VSSD
J14
1
VSSA
NO LOAD
P5[6]
P5[5]
P5[4]
P5[3]
0603
ZERO
0603
0603
ZERO
0603
J28
VSSA
VDDD
P6[6]
P6[0]
P12[7]
P12[6]
P12[5]
P12[4]
J32
NO LOAD
J34
NO LOAD
8
7
6
5
4
3
2
1
J31
NO LOAD
CapSense
CapSense Button and Slider
1
8
7
6
5
4
3
2
1
1
J29
NO LOAD
CapSense
CSB2
VSSD
1 PIN HDR
1
1
1
1
NO LOAD
VDDA
1
1
1 PIN HDR
VDDD
CSB1
J6
1
1
VSSA1 PIN HDR
J35
ZERO
VSSD
1 PIN HDR 1 PIN HDR 1 PIN HDR
1
VDDA
1
1 PIN HDR
VSSD
VDDD
NO LOAD J7
1
1
ZERO
NO LOAD
J27
NO LOAD J36
1
1
CapSense Linear Slider 5 Seg
CSS1
SW PUSHBUTTON
R48
1
SW3
1A
1B
ZERO
1
VSSD
R55 10K
VSSA
NO LOAD
P15[5]
Note: Load R56 for
high precision analog
P6[5]
LED1
LED2
1
LED Red
1
0805
3
R54
1
1
1
2
R49 R50 R51 R52 R53
V5.0 V3.3
8
7
6
5
4
3
2
1
1
10 uFd 16v
C45 P6[3]
8
7
6
5
4
3
2
1
1
2
2
0805
LED Red
LED4
+
0805
P6[5]
VDDA
P6
0805
3216
P5[2]
0805
POT 10K R56
to disconnect Capacitive Sensors
5
R59
1
330 ohm
2
LED Red
LED3
P5[1]
330 ohm
2
0805
P6[5]
1
0603
R60
1
1
Note: Un-Load R48 - R54
ZERO
2
330 ohm
2
1
4
P6[2]
R61
1
3
2
NO LOAD
P5[0]
LED2
VSSD
1
1 PIN HDR
0603
1
2
3
1
1
LED Red
LED2
J30
1
2
R62
1
0805
0603
2
2A
2B
SW PUSHBUTTON
ZERO
P3
RECP 8X1
LED1
LED1
Breadboard
NO LOAD
VDDA
SW1
1A
1B
/XRES
2
NO LOAD
P4
RECP 8X1
Prototype Area
8
7
6
5
4
3
2
1
8
7
6
5
4
3
2
1
P0[0]
P0[1]
P0[2]
P0[3]
P0[4]
P0[5]
P0[6]
P0[7]
8
7
6
5
4
3
2
1
GND
J50
R22
62K
1%
1
14
57
26
28
53
56
12
41
FX2LP Programmer
GND
0603
6
10
2
CP
GND3
GND4
GND5
GND6
GND
24LC00/SN 8-SOIC
GND1
GND2
AGND1
AGND2
1
2
3
7
SDA
6
CTL0/FLAGA
CTL1/FLAGB
CTL2/FLAGC
1
2
R5
2.2K
VDDD
33
34
35
36
37
38
39
40
0603
NC1
NC2
NC3
NC4
GND
R6
2.2K
0402
SCL
8-SOIC
WAKEUP#
29
30
31
3V3_FX12P
U3
VCC
CLKOUT
44
NO LOAD
GND
PB0/FD0
PB1/FD1
PB2/FD2
PB3/FD3
PB4/FD4
PB5/FD5
PB6/FD6
PB7/FD7
IFCLK
54
0402
0402
2
10K
13
TV-20R
TV2
1
TP2
SWD/SWV/JTAG
2
D-64
2
2
D-64
D-64
2
R17
J9
100K
0.01 uFd
8
DMINUS
DPLUS
3V3_FX12P
R3
1
PA0/nINT0
PA1/nINT1
PA2/SLOE
PA3/WU2
PA4/FIFOADR0
PA5/FIFOADR1
U5
PA6/PKTEND
PA7/FLAGD
CY7C68013A-56LTXC
RESET#
9
8
D11
1
D9
1
D10
1
D+
D-
50MIL KEYED SMD
VSSD
VSSD
RESERVED
6
7
S1
S2
S3
S4
42
VBUS1
USB MINI B
C8
AVCC1
AVCC2
SWDIO
SWDCK
SWO
TDI
/XRES
2
4
6
8
10
1
3
7
0.1 uFd
Y1
24 MHz
XTALOUT
0.1 uFd
GND
1
2
3
4
5
0805
2
0.1 uFd
J1
VBUS
DM
DP
ID
GND
0402
11
32
C16
0402
1
GND
VCC1
VCC2
C11
2.2 uFd
6.3V
0402
1
3
5
7
9
C1
3
XTALIN
VBUS1 2
0402
R9
ZERO
17
27
43
55
D-64
2
D-64
C19
GND
8
9
J3
1
1
PLACE C11 AND C16 CLOSE
CLOSE TO U5-3 AND U5-7.
R14
100K
1%
0603
D2
VBUS1 2
D8
V5.0
1
1
VIN
V3.3
VCC3
VCC4
VCC5
VCC6
SS12-E3/61T
SS12-E3/61T
3V3_FX12P
VSSD
VSSA
VSSD
P9 RECP 8X1
CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev. **
37
GND
CGND1
Use Separate Track
for CGND1 to GND
P1
P3[6]
P3[4]
P3[2]
P3[0]
J23
1
1
P0[6]
P0[4]
P0[2]
P0[0]
NO LOAD
J20
1
1
P4[6]
P4[4]
P4[2]
P4[0]
NO LOAD
J17
1
1
NO LOAD
J13
1
P12[2]
SCL P12[0]
1
V5.0
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
P3[7]
P3[5]
P3[3]
P3[1]
Expansion Connectors
P2
P1[6]
TDI
P1[2]
SWDIO
J15
P0[7]
P0[5]
P0[3]
P0[1]
1
1
P2[6]
P2[4]
P2[2]
P2[0]
NO LOAD
J19
P4[7]
P4[5]
P4[3]
P4[1]
1
1
P5[6]
P5[4]
P5[2]
P5[0]
NO LOAD
J21
P12[3]
P12[1] SDA
VSSA
V3.3
1
NO LOAD
J24
VIN
1
NO LOAD
1
P12[2]
SCL P12[0]
V5.0
1
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
P1[7]
P1[5]
SWO
SWDCK
P2[7]
P2[5]
P2[3]
P2[1]
P5[7]
P5[5]
P5[3]
P5[1]
P12[3]
P12[1] SDA
V3.3
VIN
NO LOAD
20x2 RECP RA
20x2 RECP RA
CGND1
CGND1
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
Port E (Analog EBK Connector)
VSSD
Port D (Misc Connector)
VSSD
VDDA
NO LOAD
J39
1 R73
ZERO
1
VREF
2 P0[3]
LM4140 NO LOAD
VIN
VREF
6
VREF
NO LOAD
1 R34
ZERO
C24
1.0 uFd
NO LOAD
1 R37
ZERO
2
0603
NC
5
VSSA
3216
C32
+
C28
0402
0.1 uFd
VSSA
1
4
7
8
GND
GND1
GND2
GND3
EN
10 uFd 16v
0805
3
2 P3[2]
0805
1
0805
U6
2
VSSA
38
Voltage Reference
CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev. **
CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev. **
39
A.2
Board Layout
A.2.1
PDC-09589 Top
40
CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev. **
A.2.2
PDC-09589 Power
CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev. **
41
A.2.3
42
PDC-09589 Ground
CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev. **
A.2.4
PDC-09589 Bottom
CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev. **
43
A.3
BOM
Item Qty
Reference
Value
Description
Manufacturer
Mfr Part Number
PCB
Cypress
PDC-09589
1
1
BH1
BAT 9V MALE
BATTERY HOLDER 9V Male
PC MT
Keystone Electronics
593
2
1
BH2
BAT 9V FEMALE
BATTERY HOLDER 9V Female
Keystone Electronics
PC MT
594
3
9
C2,C4,C5,C13,C14,C1
10 uFd 16v
5,C28,C45,C46
CAP 10UF 16V TANTALUM
10% 3216
TAJA106K016R
4
2
C6,C22
CAP CER 22UF 10V 10% X5R
Kemet
1210
C1210C226K8PACTU
5
29
C7,C10,C12,C16,C17,
C18,C19,C20,C21,C2
6,C32,C33,C34,C35,C
36,C38,C40,C41,C43, 0.1 uFd
C47,C48,C49,C50,C5
1,C52, C53, C1, C3,
C23
CAP .1UF 16V CERAMIC Y5V
0402
Panasonic - ECG
ECJ-0EF1C104Z
6
2
C8,C9
0.01 uFd
CAP 10000PF 16V CERAMIC
0402 SMD
Panasonic - ECG
ECJ-0EB1C103K
7
1
C11
2.2 uFd
CAP CER 2.2UF 6.3V 20%
X5R 0402
Panasonic - ECG
ECJ-0EB0J225M
8
4
C29,C37,C42,C44
1.0 uFd
CAP CERAMIC 1.0UF 25V X5R
Taiyo Yuden
0603 10%
TMK107BJ105KA-T
9
4
C30,C31,C25, C27
22pF
CAP, CER, 22 pF, 50V, 5%,
COG, 0603, SMD
ECJ-0EC1H220J
10
1
C39
2200 pFd
SMD/SMT 0805 2200pF 50volts
Murata
C0G 5%
GRM2165C1H222JA01
D
11
6
D1,D2,D3,D4, D7, D8
SS12-E3/61T
DIODE SCHOTTKY 20V 1A
SMA
Vishay/General Semiconductor
SS12-E3/61T
12
1
D5
LED Green
LED GREEN CLEAR 0805
SMD
Chicago Miniature
CMD17-21VGC/TR8
13
1
D6
ZHCS
DIODE SCHOTTKY 40V 1.0A
SOT23-3
Zetex
ZHCS1000TA
14
2
J1,J2
USB MINI B
CONN USB MINI AB SMT
RIGHT ANGLE
TYCO
1734035-2
15
1
J3
50MIL KEYED
SMD
CONN HEADER 10 PIN 50MIL
Samtec
KEYED SMD
16
1
J4
POWER JACK P- CONN JACK POWER 2.1mm
5
PCB RA
CUI
PJ-102A
17
5
TP1, J26, J27, J35,
J28
BLACK TEST
POINT
TEST POINT PC MINI .040"D
Black
Keystone Electronics
5001
19
4
LED1,LED2,LED3,LE
D4
LED Red
LED RED CLEAR 0805 SMD
Rohm Semiconductor
SML-210LTT86
20
1
L1
22 uH
INDUCTOR SHIELD PWR
22UH 7032
TDK Corporation
SLF7032T-220MR96-2PF
21
2
P1,P2
20x2 RECP RA
CONN FMALE 40POS DL .100 Sullins Electronics
R/A GOLD
Corp.
PPPC202LJBN-RC
22
1
P7
DB9 FEMALE
CONN DB9 FMALE VERT
PRESSFIT SLD
Norcomp Inc.
191-009-223R001
23
1
P8
LCD HEADER W/ CONN RECEPT 16POS .100
O BACKLIGHT
VERT AU
Tyco Electronics
1-534237-4
24
2
R3,R4
100K
Panasonic - ECG
ERJ-2GEJ104X
44
22 uFd
RES 100K OHM 1/16W 5%
0402 SMD
AVX
Panasonic - ECG
FTSH-105-01-L-DV-K
CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev. **
Item Qty
Reference
Value
Description
Manufacturer
Mfr Part Number
RES 0.0 OHM 1/10W 5% 0805
Panasonic-ECG
SMD
ERJ-6GEY0R00V
ERJ-2GEJ222X
25
6
R9,R23,R24,R26,R27,
ZERO
R71
26
2
R5,R6
2.2K
RES 2.2K OHM 1/16W 5%
0402 SMD
27
1
R11
1K
RES 1.0K OHM 1/8W 5% 0805
Panasonic - ECG
SMD
ERJ-6GEYJ102V
28
1
R12
3.16K
RES 3.16K OHM 1/10W .5%
0603 SMD
Yageo
RT0603DRD073K16L
29
1
R13
3.74K
RES 3.74K OHM 1/10W 1%
0603 SMD
Panasonic - ECG
ERJ-3EKF3741V
30
1
R14
100K
RES 100K OHM 1/10W 1%
0603 SMD
Yageo
RC0603FR-07100KL
31
5
R15,R59,R60,R61,R6
330 ohm
2
RES 330 OHM 1/10W 5% 0805
Panasonic - ECG
SMD
ERJ-6GEYJ331V
32
8
R17,R40,R41,R42,R4
10K
3,R44,R45,R46
RES 10K OHM 1/16W 5% 0402 Stackpole Electronics
SMD
Inc
RMCF 1/16S 10K 5% R
33
13
R35,R36,R39,R47,R4
8,R49,R50,R51,R52,R ZERO
53,R54,R64,R66
RES ZERO OHM 1/16W 5%
0603 SMD
Panasonic - ECG
ERJ-3GEY0R00V
34
2
R32,R33
22E
RES 22 OHM 1/16W 1% 0603
SMD
Panasonic - ECG
ERJ-3EKF22R0V
35
2
R63,R65
100 ohm
RES 100 OHM 1/8W 5% 0805
SMD
Rohm
MCR10EZHJ101
36
1
R56
POT 10K
POT 10K OHM 9MM SQ PLASBourns Inc.
TIC
3310Y-001-103L
37
1
R58
10E
RES 10 OHM 1/8W 5% 0805
SMD
RMCF 1/10 10 5% R
38
1
R68
100 ohm
RES 100 OHM 1/16W 5% 0603
Panasonic - ECG
SMD
ERJ-3GEYJ101V
39
1
R69
10K
RES 10K OHM 1/16W 5% 0603
Panasonic - ECG
SMD
ERJ-3GEYJ103V
40
3
SW1,SW2,SW3
SW PUSHBUTTON
LT SWITCH 6MM 160GF
H=2.5MM SMD
EVQ-Q2P02W
41
1
U1
LT1763CS8
IC LDO REG LOW NOISE ADJ
Linear Technology
8-SOIC
LT1763CS8#PBF
42
1
U2
AP1117D50G
IC REG LDO 1.0A 5.0V TO-252 Diodes Inc
AP1117D50G-13
24LC00/SN
Panasonic - ECG
Stackpole Electronics
Inc
Panasonic - ECG
43
1
U3
24LC00/SN
IC EEPROM 128BIT 400KHZ
8SOIC
44
1
U4
LM1117MPX-3.3
IC REG 3.3V 800MA LDO SOTNational Semiconductor LM1117IMP-3.3/NOPB
223
45
1
U5
CY7C68013A56LTXC
IC, FX2 HIGH-SPEED USB
PERIPHERAL CONTROLLER
QFN56
Cypress Semiconductor CY7C68013A-56LTXC
46
1
U7
CY8C3866AXI040 TQFP100
PSoC3 Mixed-Signal Array
Cypress Semiconductor CY8C3866AXI-040
47
1
U8
MAX3232CDR
IC 3-5.5V LINE DRVR/RCVR
16-SOIC
Texas Insturments
MAX3232IDR
48
1
Y1
24 MHz
RESONATOR, 24.000MHZ,
WITH CAPS, SMD
Murata
CSTCE24M0XK2010R0
49
1
Y2
32.768KHz XTAL
CRYSTAL 32.768 KHZ CYL
12.5PF CFS308
Citizen America Corpo- CFS308-32.768KDZFration
UB
50
1
Y3
24 MHz Crystal
CRYSTAL 24.000MHZ 20PF
SMD
ECS Inc
CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev. **
Microchip Technology
ECS-240-20-5PX-TR
45
Item Qty
Reference
Value
Description
Manufacturer
Mfr Part Number
51
3
J8,J33, TP2
RED TEST
POINT
TEST POINT PC MINI .040"D
RED
Keystone Electronics
5000
52
1
R38
2.2K
RES 2.2KOHM 1/16W
2700PPM 5%0603
Panasonic - ECG
ERA-V27J222V
53
2
J10,J11
3p_jumper
CONN HEADER VERT SGL
3POS GOLD
3M
961103-6404-AR
54
1
J30
2p_jumper
CONN HEADER VERT SGL
2POS GOLD
3M
961102-6404-AR
55
1
NA
3.3V LCD Module
3.3V LCD Module 16POS w/16
Lumex
16POS w/16 pin
pin header installed
header installed
56
1
NA
16 pin header
CONN HEADER VERT SGL
16POS GOLD
3M
961116-6404-AR
57
6
D9, D10, D11, D12,
D13, D14
ESD diode
SUPPRESSOR ESD 5VDC
0603 SMD
Bourns Inc.
CG0603MLC-05LE
58
1
R21
39K
RES 39.0K OHM 1/10W 1%
0603 SMD
Rohm Semiconductor
MCR03EZPFX3902
59
1
R22
62K
RES 62.0K OHM 1/10W 1%
0603 SMD
Rohm Semiconductor
MCR03EZPFX6202
1.0 uFd
CAP CERAMIC 1.0UF 25V X5R
Taiyo Yuden
0603 10%
TMK107BJ105KA-T
LCM-S01602DTR/A-3
No Load Components
60
1
C24
61
13
J5,J6,J12,J14,J29,J31
,J18,J22,J25,TP3,TP4, RED
J16,J39
TEST POINT PC MINI .040"D
RED
Keystone Electronics
5000
62
4
J7,J32,J34,J36
BLACK
TEST POINT PC MINI .040"D
Black
Keystone Electronics
5001
63
1
TP5
WHITE
TEST POINT PC MINI .040"D
WHITE
Keystone Electronics
5002
64
1
J50
Breadboard
BREADBOARD 17x5x2
3M
923273-I
65
4
P3,P4,P6,P9
RECP 8X1
CONN RECT 8POS .100 VERT 3M
929850-01-08-RA
10K
POT 10K OHM 1/4" SQ CERM
Bourns Inc.
SL ST
3362P-1-103LF
66
1
R67
67
10
R30,R34,R57,R72,R2
5,R31,R70,R37,R29, ZERO
R73
RES 0.0 OHM 1/10W 5% 0805
Panasonic-ECG
SMD
ERJ-6GEY0R00V
68
1
R55
10K
TRIMPOT 10K OHM 4MM TOP
Bourns Inc.
ADJ SMD
3214W-1-103E
69
2
R1,R28
ZERO
RES ZERO OHM 1/10W 5%
0603 SMD
Panasonic - ECG
ERJ-3GEY0R00V
70
1
U6
LM4140
IC REF PREC VOLT
MICROPWR 8-SOIC
National Semiconductor LM4140ACM-1.0/NOPB
71
1
R8
1.5K
RES 1.5KOHM 1/10W
1500PPM 5%0805
Panasonic - ECG
ERA-S15J152V
72
1
R2
3K
RES 1/10W 3K OHM 0.1%
0805
Stackpole Electronics
Inc
RNC 20 T9 3K 0.1% R
73
1
P5
4x1 RECP
CONN RECEPT 4POS .100
VERT GOLD
3M
929850-01-04-RA
74
1
J38
3p_jumper
CONN HEADER VERT SGL
3POS GOLD
3M
961103-6404-AR
75
1
J37
2p_jumper
CONN HEADER VERT SGL
2POS GOLD
3M
961102-6404-AR
76
1
J40
50MIL KEYED
SMD
CONN HEADER 10 PIN 50MIL
Samtec
KEYED SMD
46
FTSH-105-01-L-DV-K
CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev. **
Item Qty
Reference
Value
Description
Manufacturer
77
2
CSB1,CSB2
CapSense
CapSense Button
Cypress
78
1
CSS1
CapSense Linear Slider 5 Seg
CapSense Slider
Cypress
79
9
J9,J13,J15,J17,J19,J2
PADS
0,J21,J23,J24
PADS
80
2
TV1,TV2
PADS
PADS
Mfr Part Number
Install On Bottom of PCB As Close To Corners As Possible
81
BUMPER CLEAR .500X.23"
SQUARE
5
Richco Plastic Co
RBS-3R
Special Jumper Installation Instructions
82
1
J30
Rectangular Connectors MINI
Install jumper
across pins 1 and JUMPER GF 13.5 CLOSE
TYPE BLACK
2
Kobiconn
151-8030-E
83
2
J10, J11
Rectangular Connectors MINI
Install jumper
across pins 1 and JUMPER GF 13.5 CLOSE
TYPE BLACK
2
Kobiconn
151-8030-E
CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev. **
47
48
CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev. **
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