CY8CKIT-062S2-43012
PSoC 62S2 Wi-Fi BT Pioneer Kit Guide
Doc. # 002-28109 Rev. *E
Cypress Semiconductor
198 Champion Court
San Jose, CA 95134-1709
www.cypress.com
Copyrights
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reproduce the Software solely for use with Cypress hardware products, only internally within your organization, and (b) to
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Cypress, the Cypress logo, Spansion, the Spansion logo, and combinations thereof, WICED, PSoC, CapSense, EZ-USB, FRAM, and Traveo are trademarks or registered trademarks of Cypress in the United States and other countries. For a more
complete list of Cypress trademarks, visit cypress.com. Other names and brands may be claimed as property of their
respective owners.
CY8CKIT-062S2-43012 PSoC 62S2 Wi-Fi BT Pioneer Kit Guide, Doc. # 002-28109 Rev. *E
2
Contents
Safety and Regulatory Compliance Information
1. Introduction
1.1
1.2
1.3
1.4
1.5
1.6
1.7
3.3
19
Theory of Operation...................................................................................................19
KitProg3: On-Board Programmer/Debugger..............................................................24
2.2.1 Programming and Debugging using ModusToolbox ......................................24
2.2.2 USB-UART Bridge..........................................................................................28
2.2.3 USB-I2C Bridge..............................................................................................29
3. Hardware
3.1
3.2
8
Kit Contents .................................................................................................................9
Getting Started...........................................................................................................10
Board Details .............................................................................................................10
Additional Learning Resources..................................................................................16
Technical Support......................................................................................................16
Documentation Conventions......................................................................................16
Acronyms...................................................................................................................17
2. Kit Operation
2.1
2.2
5
30
Schematics ................................................................................................................30
Hardware Functional Description...............................................................................30
3.2.1 CY8CMOD-062S2-43012 (MOD1).................................................................30
3.2.2 PSoC 5LP-based KitProg3 (U2).....................................................................35
3.2.3 Serial Interconnection between PSoC 5LP and PSoC 6 MCU ......................36
3.2.4 Serial Interconnection Between PSoC 5LP and CYW43012 .........................37
3.2.5 Power Supply System ....................................................................................37
3.2.6 I/O Headers....................................................................................................40
3.2.7 CapSense Circuit ...........................................................................................41
3.2.8 LEDs ..............................................................................................................42
3.2.9 Push Buttons..................................................................................................43
3.2.10 Cypress Quad SPI NOR Flash.......................................................................43
3.2.11 Cypress Quad SPI F-RAM .............................................................................44
3.2.12 microSD card section .....................................................................................44
3.2.13 PSoC 6 USB Section .....................................................................................45
3.2.14 Potentiometer Section....................................................................................45
PSoC 62S2 Wi-Fi BT Pioneer Kit Rework .................................................................46
3.3.1 CapSense Shield ...........................................................................................46
3.3.2 ETM Trace Header.........................................................................................46
3.3.3 microSD Card Detect Multiplexing .................................................................46
3.3.4 microSD Card SPI Multiplexing......................................................................47
3.3.5 U.FL (UMCC) Connector for External Antenna ..............................................47
3.3.6 U.FL (UMCC) Connector for Antenna Diversity..............................................47
CY8CKIT-062S2-43012 PSoC 62S2 Wi-Fi BT Pioneer Kit Guide, Doc. # 002-28109 Rev. *E
3
Contents
3.4
3.5
Bill of Materials ..........................................................................................................48
Frequently Asked Questions......................................................................................48
Revision History
CY8CKIT-062S2-43012 PSoC 62S2 Wi-Fi BT Pioneer Kit Guide, Doc. # 002-28109 Rev. *E
50
4
Safety and Regulatory Compliance
Information
The CY8CKIT-062S2-43012 PSoC® 62S2 Wi-Fi BT Pioneer Kit is intended for development
purposes only. Users are advised to test and evaluate this kit in an RF development environment.
This kit is not a finished product and when assembled may not be resold or otherwise marketed
unless all required authorizations are first obtained. Contact support@cypress.com for details.
The CY8CKIT-062S2-43012, as shipped from the factory, has been verified to meet with the
requirements of CE as a Class A product.
PSoC 62S2 Wi-Fi BT Pioneer Boards contain electrostatic discharge
(ESD)- sensitive devices. Electrostatic charges readily accumulate on
the human body and any equipment, which can cause a discharge
without detection. Permanent damage may occur on devices
subjected to high-energy discharges. Proper ESD precautions are
recommended to avoid performance degradation or loss of
functionality. Store unused PSoC 62S2 Wi-Fi BT Pioneer Boards in the
protective shipping package.
End-of-Life/Product Recycling
The end-of-life cycle for this kit is five years from the date of
manufacture mentioned on the back of the box. Contact your nearest
recycler to discard the kit.
CY8CKIT-062S2-43012 PSoC 62S2 Wi-Fi BT Pioneer Kit Guide, Doc. # 002-28109 Rev. *E
5
General Safety Instructions
ESD Protection
ESD can damage boards and associated components. Cypress recommends that you perform
procedures only at an ESD workstation. If an ESD workstation is unavailable, use appropriate ESD
protection by wearing an anti-static wrist strap attached to a grounded metal object.
Handling Boards
CY8CKIT-062S2-43012 PSoC 62S2 Wi-Fi BT Pioneer Kit is sensitive to ESD. Hold the board only by
its edges. After removing the board from its box, place it on a grounded, static-free surface. Use a
conductive foam pad, if available. Do not slide the board over any surface.
Regulatory Compliance Information
The CY8CKIT-062S2-43012 PSoC 62S2 Wi-Fi BT Pioneer Kit contains devices that transmit and
receive radio signals in accordance with the spectrum regulations for the 2.4-GHz and 5-GHz
unlicensed frequency range.
Cypress Semiconductor Corporation has obtained regulatory approvals for this kit to be used in
specific countries. These countries include the United States (FCC Part 15), Canada (IC RSS210),
and Japan (JRF/TELEC). Additional regional regulatory agency approval may be required to operate
these throughout the world.
This kit, as shipped from the factory, has been tested and found to comply with the limits and
requirements for the following compliances:
■
As a Class B digital device, pursuant to part 15 of the FCC Rules.
■
As a Class B digital apparatus, compliant with Canadian ICES-003.
CAUTION:
Only the antenna(s) that were certified with the module may be used.
Other antennas may be used only if they are of the same type and have
the same or lower gain.
The manufacturer is not responsible for any radio or television
interference caused by unauthorized modifications to this equipment.
Such modifications could void the user's authority to operate the
equipment.
CY8CKIT-062S2-43012 PSoC 62S2 Wi-Fi BT Pioneer Kit Guide, Doc. # 002-28109 Rev. *E
6
Regulatory Statements and Product Labeling
United States (FCC)
The CY8CKIT-062S2-43012 contains Type1LV modular transmitter that complies with Part 15 of the
Federal Communications Commission (FCC) Rules.
The FCC ID for this device is VPYLBEE59B1LV.
Operation is subject to the following two conditions:
■
This device may not cause harmful interference
■
This device must accept any interference received, including interference that may cause undesired operation.
CAUTION: Changes or modifications not expressly approved by the party responsible for
compliance could void the user’s authority to operate the equipment. The antennas for this
transmitter must be installed to provide a separation distance of 20 cm from all persons and must not
be co-located or operating in conjunction with any other antenna or transmitter.
Canada (IC)
This device complies with the Industry Canada license-exempt RSS standard(s). Operation is subject to the following two conditions:
■
This device may not cause interference.
■
This device must accept any interference, including interference that may cause undesired operation of the device.
This equipment complies with radio frequency exposure limits set forth by Industry Canada for an
uncontrolled environment. This equipment should be installed and operated with minimum distance
20 cm between the device and the user or bystanders.
CAUTION: Any changes or modifications not expressly approved by the party responsible for
compliance could void the user’s authority to operate the equipment.
Contains IC: 772C-LBEE59B1LV
Le présent appareil est conforme aux CNR d'Industrie Canada applicables aux appareils radio
exempts de licence. L'exploitation est autorisée aux deux conditions suivantes: (1) l'appareil ne doit
pas produire de brouillage, et (2) l'utilisateur de l'appareil doit accepter tout brouillage radioélectrique
subi, même si le brouillage est susceptible d'en compromettre le fonctionnement.
Cet équipement est conforme aux limites d'exposition aux radiofréquences définies par Industrie
Canada pour un environnement non contrôlé. Cet équipement doit être installé et utilisé avec un
minimum de 20cm de distance entre le dispositif et l'utilisateur ou des tiers.
Contains IC: 772C-LBEE59B1LV
Japan (TELEC)
Manufactured by Murata Manufacturing
R
001-P01338
CY8CKIT-062S2-43012 PSoC 62S2 Wi-Fi BT Pioneer Kit Guide, Doc. # 002-28109 Rev. *E
7
1.
Introduction
Thank you for your interest in the CY8CKIT-062S2-43012 PSoC 62S2 Wi-Fi BT Pioneer Kit. The
PSoC 62S2 Wi-Fi BT Pioneer Kit enables you to evaluate and develop your applications using the
PSoC 62 Series MCU (hereafter called “PSoC 6 MCU”) and CYW43012 WICED Wi-Fi/BT combo
device.
PSoC 6 MCU is Cypress’ latest, ultra-low-power PSoC specifically designed for wearables and IoT
products. PSoC 6 MCU is a true programmable embedded system-on-chip, integrating a 150-MHz
Arm® Cortex®-M4 as the primary application processor, a 100-MHz Arm Cortex-M0+ that supports
low-power operations, up to 2 MB Flash and 1 MB SRAM, Secure Digital Host Controller (SDHC)
supporting SD/SDIO/eMMC interfaces, CapSense® touch-sensing, and programmable analog and
digital peripherals that allow higher flexibility, in-field tuning of the design, and faster time-to-market.
The PSoC 6 BLE Pioneer Board offers compatibility with Arduino™ shields. The board features a
PSoC 6 MCU, and a CYW43012 Wi-Fi/Bluetooth combo module. Cypress CYW43012 is a 28-nm,
ultra-low-power device that supports single-stream, dual-band IEEE 802.11n-compliant Wi-Fi MAC/
baseband/radio and Bluetooth 5.0 BR/EDR/LE. The WLAN section supports SDIO interface to the
host MCU (PSoC 6 MCU), and the Bluetooth section supports high-speed 4-wire UART interface to
the host MCU. In addition, the board features an onboard programmer/debugger (KitProg3), a
512-Mbit Quad SPI NOR flash, a 4-Mbit Quad SPI F-RAM, a micro-B connector for USB device
interface, a 5-segment CapSense slider, two CapSense buttons, a microSD card holder, an RGB
LED, two user LEDs, one potentiometer, and two push buttons. The board supports operating
voltages from 1.8 V to 3.3 V for PSoC 6 MCU.
You can use ModusToolbox™ to develop and debug your PSoC 6 MCU projects. ModusToolbox
software is a set of tools that enable you to integrate Cypress devices into your existing development
methodology.
If you are new to PSoC 6 MCU and ModusToolbox IDE, refer to the application note AN221774 Getting Started with PSoC 6 MCU to help you familiarize with the PSoC 6 MCU and help you create
your own design using the ModusToolbox IDE.
CY8CKIT-062S2-43012 PSoC 62S2 Wi-Fi BT Pioneer Kit Guide, Doc. # 002-28109 Rev. *E
8
Introduction
1.1
Kit Contents
The CY8CKIT-062S2-43012 PSoC 62S2 Wi-Fi BT Pioneer Kit has the following contents, as shown
in Figure 1-1.
■
PSoC 62S2 Wi-Fi BT Pioneer Board
■
USB Type-A to Micro-B cable
■
Four jumper wires (4 inches each)
■
Two jumper wires (5 inches each)
■
Quick Start Guide
Figure 1-1. Kit Contents
Inspect the contents of the kit; if you find any part missing, contact your nearest Cypress sales office
for help: www.cypress.com/support.
CY8CKIT-062S2-43012 PSoC 62S2 Wi-Fi BT Pioneer Kit Guide, Doc. # 002-28109 Rev. *E
9
Introduction
1.2
Getting Started
This guide will help you get acquainted with the PSoC 62S2 Wi-Fi BT Pioneer Kit:
■
The Kit Operation chapter on page 19 describes the major features of the PSoC 62S2 Wi-Fi BT
Pioneer Kit and functionalities such as programming, debugging, and the USB-UART and USBI2C bridges.
■
The Hardware chapter on page 30 provides a detailed hardware description, methods to use the
onboard NOR flash, kit schematics, and the bill of materials (BOM).
■
Application development using PSoC 62S2 Wi-Fi BT Pioneer Kit is supported in various
development ecosystems such as ModusToolbox and Mbed OS. For the latest software support
for this development kit including the different development ecosystems, refer to the kit webpage.
■
1.3
❐
ModusToolbox software is a free development ecosystem that includes the ModusToolbox
IDE. Using ModusToolbox IDE, you can enable and configure device resources, middleware
libraries, and program and debug the device. You can download the software from the
ModusToolbox home page. See the ModusToolbox User Guide for additional information.
❐
Mbed OS: Visit Cypress’ Mbed OS page on instructions to develop applications on Cypress’
target board on the Mbed OS platform.
There are wide range of code examples to evaluate the PSoC 62S2 Wi-Fi BT Pioneer board.
These examples help you familiarize PSoC 6 MCU and create your own design. These examples
are available in various development ecosystems such as ModusToolbox IDE and Mbed OS.
Visit Cypress’ code example page to access examples for the following development
ecosystems:
❐
ModusToolbox based examples
❐
Mbed OS based examples
Board Details
The PSoC 62S2 Wi-Fi BT Pioneer Board that has the following features:
■
CY8CMOD-062S2-43012 carrier module that contains
❐
PSoC 6 MCU (CY8C624ABZI-S2D44)
❐
Murata 1LV ultra-small 2.4/5.0-GHz WLAN and Bluetooth functionality module based on
CYW43012
■
512-Mbit external Quad SPI NOR Flash that provides a fast, expandable memory for data and
code
■
4-Mbit Quad SPI ferroelectric random-access memory (F-RAM)
■
KitProg3 onboard SWD programmer/debugger with USB-UART and USB-I2C bridge functionality
■
CapSense touch-sensing slider (5 elements), two buttons, based on self-capacitance (CSD) and
mutual-capacitance (CSX) sensing
■
A micro-B connector for USB device interface for PSoC 6 MCU
■
1.8 V and 3.3 V operation of PSoC 6 MCU is supported
■
Two user LEDs, an RGB LED, two user buttons, and a reset button for PSoC 6 MCU
■
A potentiometer
■
One Mode selection button and one Status LED for KitProg3
■
A microSD Card holder
CY8CKIT-062S2-43012 PSoC 62S2 Wi-Fi BT Pioneer Kit Guide, Doc. # 002-28109 Rev. *E
10
Introduction
Figure 1-2 shows the pinout of the Pioneer Board.
Figure 1-2. Pioneer Board Pinout
P6_0/SCL
P6_1/SDA
VREF/AREF
GND/GND
P12_2/D13
P12_1/D12
P12_0/D11
P12_3/D10
P7_6/D9
P7_5/D8
P1_4
P0_4
P7_4
NC
NC
NC
NC
NC
NC
NC
NC
VTRAG/IOREF
XRES/RESET
V 3.3/3.3V
V 5.0/5V
GND/GND
GND/GND
VIN/Vin
P10_0/A0
P10_1/A1
P10_2/A2
P10_3/A3
P10_4/A4
P10_5/A5
P10_6
P10_7
BT_UART_RXD
BT_UART_TXD
BT_UART_CTS
BT_UART_RTS
WL_UART_RX
WL_UART_TX
WL_IO1
WL_IO2
NC
P13_5
P13_4
P8_0
P13_6
P1_3
P0_3
P0_2
P9_0
P9_1
P9_2
P9_3
P9_4
P9_5
P9_6
P9_7
P5_7/D7
P5_6/D6
P5_5/D5
P5_4/D4
P5_3/D3
P5_2/D2
P5_1/D1
P5_0/D0
BT_I2S_CLK
BT_I2S_WS
BT_I2S_DO
BT_I2S_DI
BT_IO2
BT_IO3
BT_IO4
BT_IO5
P7_3
P0_5
P1_1
LEGEND
Arduino Uno R3
PSoC 6 I/Os
WL/BT I/Os
NC
P11_1
P1_5
Table 1-1. Pioneer Board Pinout
Pin
Primary On-board
Function
Secondary On-board
Function
Connection details
PSoC 6 MCU Pins
XRES
Hardware Reset
–
–
P0[2]
GPIO on non-Arduino
header IO0 (J22.1)
–
–
P0[3]
GPIO on non-Arduino
header IO1 (J22.2)
–
–
P0[4]
User button with
Hibernate wakeup
capability
GPIO on non-Arduino –
header (J21.9)
P0[5]
RGB green LED
(LED5)
GPIO on non-Arduino –
header (J24.3)
CY8CKIT-062S2-43012 PSoC 62S2 Wi-Fi BT Pioneer Kit Guide, Doc. # 002-28109 Rev. *E
11
Introduction
Table 1-1. Pioneer Board Pinout (continued)
Pin
P1[0]
P1[1]
Primary On-board
Function
CapSense RX for
buttons and
CapSense TX for
sliders
Secondary On-board
Function
Connection details
GPIO on non-Arduino Remove R33 to disconnect from CapSense.
header IO7 (J22.8) Populate R145 to connect to GPIO on nonArduino header.
RGB red LED (LED5) GPIO on non-Arduino –
header (J24.1)
P1[2]
USB Host Enable
–
–
P1[3]
GPIO on non-Arduino
header J22.3
–
–
P1[4]
User button with
Hibernate wakeup
capability
GPIO on non-Arduino –
header (J21.10)
P1[5]
Orange user LED
(LED8)
GPIO on non-Arduino –
header (J24.2)
P5[0]
UART_RX
Arduino D0 (J4.1)
Remove R21 to disconnect from KitProg3.
P5[1]
UART_TX
Arduino D1 (J4.2)
Remove R61 to disconnect from KitProg3.
P5[2]
UART_RTS
Arduino D2 (J4.3)
Remove R19 to disconnect from KitProg3.
P5[3]
UART_CTS
Arduino D3 (J4.4)
P5[4]
Arduino D4 (J4.5)
–
–
P5[5]
Arduino D5 (J4.6)
–
–
P5[6]
Arduino D6 (J4.7)
–
–
P5[7]
Arduino D7 (J4.8)
–
–
P6[0]
I2C SCL
Arduino (J3.10)
Remove R18 to disconnect from KitProg3.
Remove R58 to disconnect from KitProg3.
P6[1]
I2C SDA
Arduino (J3.9)
P6[2]
USB VBUS Detect
–
–
Remove R59 to disconnect from KitProg3.
P6[3]
USB Interrupt
–
–
P6[4]
PSoC 6 MCU JTAG
TDO/SWD SWO
–
–
P6[5]
PSoC 6 MCU JTAG
TDI
–
–
P6[6]
PSoC 6 MCU JTAG
TMS/SWD SWDIO
–
–
P6[7]
PSoC 6 MCU JTAG
TCK/SWD SWCLK
–
–
P7[0]
ETM Clock
–
–
P7[1]
CapSense CINTA
–
–
P7[2]
CapSense CINTB
–
–
P7[3]
RGB blue LED
(LED5)
GPIO on non-Arduino –
header (J24.5)
CY8CKIT-062S2-43012 PSoC 62S2 Wi-Fi BT Pioneer Kit Guide, Doc. # 002-28109 Rev. *E
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Introduction
Table 1-1. Pioneer Board Pinout (continued)
Pin
P7[4]
Primary On-board
Function
Secondary On-board
Function
GPIO on non-Arduino
header IO15 (J21.8)
CapSense Shield
Connection details
Remove R155 to disconnect from IO15
(J21.8).
Populate R38 to connect to CapSense
Shield.
P7[5]
Arduino D8 (J3.1)
–
–
P7[6]
Arduino D9 (J3.2)
–
–
P7[7]
CapSense CMOD
–
–
P8[0]
GPIO on non-Arduino
header (J22.5)
–
–
P8[1]
CapSense Button0
TX
GPIO on non-Arduino Remove R24 to disconnect from CapSense.
header IO8 (J21.1) Populate R144 to connect to GPIO on nonArduino header.
P8[2]
CapSense Button1
TX
GPIO on non-Arduino Remove R25 to disconnect from CapSense.
header IO9 (J21.2) Populate R143 to connect to GPIO on nonArduino header.
P8[3]
CapSense Slider0
RX
GPIO on non-Arduino Remove R28 to disconnect from CapSense.
header IO10 (J21.3) Populate R142 to connect to GPIO on nonArduino header.
P8[4]
CapSense Slider1
RX
GPIO on non-Arduino Remove R29 to disconnect from CapSense.
header IO11 (J21.4) Populate R152 to connect to GPIO on nonArduino header.
P8[5]
CapSense Slider2
RX
GPIO on non-Arduino Remove R30 to disconnect from CapSense.
header IO12 (J21.5) Populate R153 to connect to GPIO on nonArduino header.
P8[6]
CapSense Slider3
RX
GPIO on non-Arduino Remove R31 to disconnect from CapSense.
header IO13 (J21.6) Populate R151 to connect to GPIO on nonArduino header.
P8[7]
CapSense Slider4
RX
GPIO on non-Arduino Remove R32 to disconnect from CapSense.
header IO14 (J21.7) Populate R149 to connect to GPIO on nonArduino header.
P9[0]
Extended Arduino A8
(J2.2)
ETM TRACEDATA[3] Remove R125 to disconnect from J2
header.
Populate R126 to connect to ETM Trace
header.
P9[1]
Extended Arduino A9
(J2.4)
ETM TRACEDATA[2] Remove R124 to disconnect from J2
header.
Populate R127 to connect to ETM Trace
header.
P9[2]
Extended Arduino
A10 (J2.6)
ETM TRACEDATA[1] Remove R123 to disconnect from J2
header.
Populate R128 to connect to ETM Trace
header.
CY8CKIT-062S2-43012 PSoC 62S2 Wi-Fi BT Pioneer Kit Guide, Doc. # 002-28109 Rev. *E
13
Introduction
Table 1-1. Pioneer Board Pinout (continued)
Pin
P9[3]
Primary On-board
Function
Extended Arduino
A11 (J2.8)
Secondary On-board
Function
Connection details
ETM TRACEDATA[0] Remove R117 to disconnect from J2 header.
Populate R129 to connect to ETM Trace
header.
P9[4]
Extended Arduino
A12 (J2.10)
–
–
P9[5]
Extended Arduino
A13 (J2.12)
–
–
P9[6]
Extended Arduino
A14 (J2.14)
–
–
P9[7]
Extended Arduino
A15 (J2.16)
–
–
P10[0]
Arduino A0 (J2.1)
–
–
P10[1]
Arduino A1 (J2.3)
–
–
P10[2]
Arduino A2 (J2.5)
–
–
P10[3]
Arduino A3 (J2.7)
–
–
P10[4]
Arduino A4 (J2.9)
–
–
P10[5]
Arduino A5 (J2.11)
–
–
P10[6]
Potentiometer output
P10[7]
Extended Arduino A7
(J2.15)
–
–
P11[0]
QSPI F-RAM CS
–
–
P11[1]
Red user LED
(LED9)
P11[2]
QSPI Flash CS
–
–
P11[3:6]
QSPI Flash IO[3:0]
–
–
P11[7]
QSPI Flash CLK
–
–
P12[0]
Arduino header D11
(J3.4)
–
–
P12[1]
Arduino header D12
(J3.5)
–
–
P12[2]
Arduino header D13
(J3.6)
–
–
P12[3]
Arduino header D10
(J3.3)
–
–
P12[4]
microSD card CMD
–
Remove R168 to disconnect from microSD
card connector.
P12[5]
microSD card CLK
–
Remove R166 to disconnect from microSD
card connector.
P12[6]
ECO Crystal XIN
–
–
P12[7]
ECO Crystal XOUT
–
–
Extended Arduino A6 Remove R51 to disconnect from
(J2.13)
potentiometer.
GPIO on non-Arduino –
header (J24.4)
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Introduction
Table 1-1. Pioneer Board Pinout (continued)
Pin
Primary On-board
Function
Secondary On-board
Function
P13[0]
microSD card DAT0
microSD card MOSI
Connection details
Remove R164 to disconnect from microSD
port (J20.7).
Populate R169 to connect to microSD
(J20.3).
P13[1]
microSD card DAT1
microSD card MISO
Remove R163 to disconnect from microSD
port (J20.8).
Populate R165 to connect to microSD
(J20.7).
P13[2]
microSD card DAT2 microSD card SPI CLK Remove R162 to disconnect from microSD
port (J20.1)
Populate R167 to connect to microSD
(J20.5)
P13[3]
microSD card DAT3
microSD card SPI
SSEL
–
P13[4]
GPIO on non-Arduino
header IO5 (J22.6)
–
–
P13[5]
GPIO on non-Arduino
header IO6 (J22.7)
–
–
P13[6]
GPIO on non-Arduino
header IO3 (J22.4)
–
–
P13[7]
microSD card chip
detect
GPIO on non-Arduino Remove R161 to disconnect from microSD
header IO16 (J24.6) card detect
Populate R160 to connect to IO16 (J24.6)
CYW43012 Pins
BT_UART_TXD
UART interface with
Host MCU (PSoC 6
MCU)
–
–
BT_UART_RXD UART interface with
Host MCU (PSoC 6
MCU)
–
–
BT_UART_CTS
UART interface with
Host MCU (PSoC 6
MCU)
–
–
BT_UART_RTS
UART interface with
Host MCU (PSoC 6
MCU)
–
–
BT_I2S_CLK
I2S serial clock
–
–
BT_I2S_WS
I2S serial word select
–
–
BT_I2S_DO
I2S serial data out
–
–
BT_I2S_DI
I2S serial data in
–
–
BT_IO_2
Bluetooth generalpurpose I/Os
–
–
BT_IO_3
Bluetooth generalpurpose I/Os
–
–
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Introduction
Table 1-1. Pioneer Board Pinout (continued)
Primary On-board
Function
Secondary On-board
Function
BT_IO_4
Bluetooth generalpurpose I/Os
–
–
BT_IO_5
Bluetooth generalpurpose I/Os
–
–
WL_UART_RX
Wi-Fi debug UART
Rx pin
–
–
WL_UART_TX
Wi-Fi debug UART
Tx Pin
–
–
WL_GPIO_1
Programable GPIO
–
–
WL_GPIO_2
Programable GPIO
–
–
Pin
1.4
Connection details
Additional Learning Resources
Cypress provides a wealth of data at www.cypress.com/psoc6 to help you to select the right PSoC
device for your design and to help you to quickly and effectively integrate the device into your
design.
1.5
Technical Support
For assistance, visit Cypress Support or contact customer support at +1(800) 541-4736 Ext. 3 (in the
USA) or +1 (408) 943-2600 Ext. 3 (International).
You can also use the following support resources if you need quick assistance:
1.6
■
Self-help (Technical Documents).
■
Local Sales Office Locations.
Documentation Conventions
Table 1-2. Document Conventions for Guides
Convention
Usage
Courier New
Displays file locations, user entered text, and source code:
C:\...cd\icc\
Italics
Displays file names and reference documentation:
Read about the sourcefile.hex file in the PSoC Creator User Guide.
File > Open
Represents menu paths:
File > Open > New Project
Bold
Displays commands, menu paths, and icon names in procedures:
Click the File icon and then click Open.
Times New Roman
Displays an equation:
2+2=4
Text in gray boxes
Describes cautions or unique functionality of the product.
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Introduction
1.7
Acronyms
Table 1-3. Acronyms Used in this Document
Acronym
Definition
ADC
Analog-to-Digital Converter
BLE
Bluetooth Low Energy
BOM
Bill of Materials
BT
Bluetooth
CINT
Integration Capacitor
CMOD
Modulator Capacitor
CPU
Central Processing Unit
CSD
CapSense Sigma Delta
CSX
CapSense Crosspoint
DC
Direct Current
Del-Sig
Delta-Sigma
DMA
Direct Memory Access
ECO
External Crystal Oscillator
ESD
Electrostatic Discharge
GPIO
General-Purpose Input/Output
HID
Human Interface Device
I2C
Inter-Integrated Circuit
I2S
Inter-IC Sound
IC
Integrated Circuit
IDE
Integrated Development Environment
IoT
Internet of Things
LED
Light-emitting Diode
LPO
Low Power Oscillator
PC
Personal Computer
PDM
Pulse Density Modulation
PSoC
Programmable System-on-Chip
PWM
Pulse Width Modulation
QSPI
Quad Serial Peripheral Interface
SAR
Successive Approximation Register
SDHC
Secure Digital Host Controller
SDIO
Secure Digital Input Output
SMIF
Serial Memory Interface
SPI
Serial Peripheral Interface
SRAM
Serial Random Access Memory
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17
Introduction
Table 1-3. Acronyms Used in this Document (continued)
Acronym
Definition
SWD
Serial Wire Debug
UART
Universal Asynchronous Receiver Transmitter
USB
Universal Serial Bus
WCO
Watch Crystal Oscillator
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2.
Kit Operation
This chapter introduces you to various features of the PSoC 62S2 Wi-Fi BT Pioneer Board, including
the theory of operation and the onboard KitProg3 programming and debugging functionality,
USB-UART and USB-I2C bridges.
2.1
Theory of Operation
The PSoC 62S2 Wi-Fi BT Pioneer Board is built around a PSoC 6 MCU. Figure 2-1 shows the block
diagram of the PSoC 6 MCU device used on the board. For details of device features, see the device
datasheet.
Figure 2-2 shows the block diagram of the CYW9-BASE-01 Pioneer Board (modified for CY8CKIT062S2-43012).
Figure 2-1. PSoC 6 MCU Block Diagram
System Resources
8 KB $ 8 KB $
FLASH Controller
FPU, NVIC, MPU
Power
Sleep Control
POR
BOD
OVP
LVD
REF
SRAM2
256 KB
256 KB
SRAM Controller
SRAM Controller
SRAM Controller
DMA
SRAM1
512 KB
4 Channel
2048+32 KB
150 MHz (1.1V)
50 MHz (0.9V)
SRAM0
DW1
Cortex M4
29 Channel
SONOS
FLASH
DW0
SWJ/ETM/ITM/CTI
29 Channel
CPU Subsystem
PSoC 62
CY8C62X8,
CY8C62XA
SWJ/MTB/CTI
CRYPTO
AES,SHA,CRC,
TRNG,RSA,ECC
Initiator/MMIO
ROM
Cortex M0+
100 MHz (1.1V)
25 MHz (0.9V)
64 KB
MUL, NVIC, MPU
ROM Controller
System Interconnect (Multi Layer AHB, IPC, MPU/SMPU)
PWRSYS-LP/ULP
Power Modes
Active/Sleep
LowePowerActive/Sleep
DeepSleep
Hibernate
Backup
USB-FS
Host + Device
2x SDHC
SD/SDIO/eMMC
SMIF
Serial Memory Interface (QSPI)
1024 bit
EFUSE
Energy Profiler
PDM/PCM
2x I2S
4x SCB
I2C, UART
I2C,SPI,UART
I2C,SPI
8x SCB
1x SCB
LCD
32x TCPWM
CSD
CapSense
TIMER,CTR,QD, PWM
x1
Audio
Subsystem
SARMUX
High Speed I/O Matrix, Smart I/O, Boundary Scan
2x Smart IO
FS/LS
PHY
Backup
Backup Control
BREG
RTC
WCO
SAR
ADC
(12-bit)
2x LPCOMP
Test
TestMode Entry
Digital DFT
Analog DFT
Prog.
Analog
IOSS GPIO
Reset
Reset Control
XRES
DMA
MMIO
Peripheral Interconnect (MMIO,PPU)
PCLK
Low Power Comparator
Buck
Clock
Clock Control
ILO
WDT
IMO
ECO
FLL
2xPLL
98x GPIO Enh, 6x GPIO OVT
IO Subsystem
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Kit Operation
Figure 2-2. Block Diagram of Pioneer Board
CYW9‐BASE‐01 Architecture Block Diagram
Cypress Device
KitProg3 Mode
Switch & LED
20‐Pin ETM
header
10‐pin SWD/
JTAG header
1.8~3.3V
VDDA
SWD
JTAG
TRACE
SWD
JTAG 1.8~3.3V
VTARG_REF
P5LP_VDD
Reset
Button
VTARG_REF
Potentiometer
No Load
2 x User
buttons
Loaded Device
VBACKUP
VDDD
SWD
I2C/UART_RX/UART_TX
P5LP_VDD
USB
(Micro‐B)
VTARG
Level
Translator
KitProg3
(PSoC 5LP)
User LEDs
(RGB, Red,
Orange)
VDDIO_0
QSPI NOR
Flash
UART_CTS
P5LP_VDD
WL_VDDIO
Level
Translator
VTARG
Monitoring
VTARG
UART_RTS
BT_UART TX, RX, CTS, RTS
WL_UART TX, RX, KP_GPIO_0
Carrier
Module
QSPI F‐RAM
VDDIO_0
VDDIO_0
microSD Card
Slot
I2C EEPROM
3.3V, VTARG
KP_VBUS
2 x CapSense Buttons,
1 x 5‐segment
CapSense Slider
PSoC 6 MCU I/
O Headers
(Arduino)
PSoC 6 MCU I/
O Headers
(Non Arduino)
USB Host & Device
The PSoC 62S2 Wi-Fi BT Pioneer Kit comes with the PSoC 62S2 Wi-Fi BT Pioneer Board.
Figure 2-3 and Figure 2-4 show the markup of the Pioneer Board.
Figure 2-3. PSoC 62S2 Wi-Fi BT Pioneer Board - Top View
35
29
29
34 16
33 16
32
31
1
28 30
29
28
2
27
26
25
24
3
4
23
5
22
21
6
20
19
18
7
8
9
10
9
11
12
13
14
15 16
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17
20
Kit Operation
Figure 2-4. PSoC 62S2 Wi-Fi BT Pioneer Board - Bottom View
The PSoC 62S2 Wi-Fi BT Pioneer Board has the following peripherals:
1. Power LED (LED1): This Yellow LED indicates the status of power supplied to board.
2. KitProg3 USB connector (J6): The USB cable provided along with the PSoC 62S2 Wi-Fi BT
Pioneer Board connects between this USB connector and the PC to use the KitProg3 onboard
programmer and debugger and to provide power to the board.
3. PSoC 6 MCU VDD power selection jumper (J14): This jumper is used to select the PSoC 6
MCU VDD supply voltage between 1.8 V and 3.3 V.
4. KitProg3 programming mode selection button (SW3): This button can be used to switch
between various modes of operation of KitProg3 (CMSIS-DAP BULK, CMSIS-DAP HID or
DAPLink modes). For more details, see the KitProg3 User Guide.
5. PSoC 6 MCU VDD current measurement jumper (J15): An ammeter can be connected to this
jumper to measure the current consumed by the PSoC 6 MCU VDD power domain.
6. PSoC 6 MCU VDDIO2 and CYW43012 VDDIO power selection jumper (J16): This jumper is
used to select the PSoC 6 MCU VDDIO2 and CYW43012 VDDIO supply voltage between 1.8 V
and 3.3 V. This is not loaded by default.
7. PSoC 6 MCU VDDIO0 current measurement jumper (J19): An ammeter can be connected to
this jumper to measure the current consumed by the PSoC 6 MCU VDDIO0 power domain. This
is not loaded by default.
8. External power supply VIN connector (J5): This connector connects an external DC power
supply input to the onboard regulators.
9. PSoC 6 MCU user buttons (SW2 and SW4): These buttons can be used to provide an input to
PSoC 6 MCU. Note that by default these buttons connect the PSoC 6 MCU pin to ground when
pressed, so you need to configure the PSoC 6 MCU pin as a digital input with resistive pull-up for
detecting the button press. These buttons also provides a wake-up source from low-power
modes of the device. In addition, this button can be used to activate the regulator control output
from PSoC 6 MCU.
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Kit Operation
10. Potentiometer connection jumper (J25): This jumper connects the PSoC 6 MCU VDDA to
potentiometer.
11. Potentiometer (R1): This is a 10k Ohm potentiometer connected to PSoC 6 MCU pin P10[6]. It
can be used to simulate a sensor output to PSoC 6 MCU.
12. Arduino-compatible power header (J1): This header powers the Arduino shields. It also has a
provision to power the kit though the VIN input.
13. PSoC 6 MCU reset button (SW1): This button is used to reset PSoC 6 MCU. It connects the
PSoC 6 MCU reset (XRES) pin to ground.
14. PSoC 6 MCU debug and trace header (J12): This header can be connected to an Embedded
Trace Macrocell (ETM)-compatible programmer/debugger. This is not loaded by default.
15. PSoC 6 MCU program and debug header (J11): This 10-pin header allows you to program and
debug the PSoC 6 MCU using an external programmer such as MiniProg4.
16. Arduino Uno R3-compatible I/O headers (J2, J3, and J4): These I/O headers bring out pins
from PSoC 6 MCU to interface with the Arduino shields. Some of these pins are multiplexed with
onboard peripherals and are not connected to PSoC 6 MCU by default. For a detailed information on how to rework the kit to access these pins, see Table 1-1 on page 11.
17. CapSense slider (SLIDER) and buttons (BTN0 and BTN1): The CapSense touch-sensing
slider and two buttons, all of which are capable of both self-capacitance (CSD) and mutualcapacitance (CSX) operation, allow you to evaluate Cypress’ fourth-generation CapSense technology. The slider and buttons have a 1-mm acrylic overlay for smooth touch sensing.
18. PSoC 6 MCU VDDIO2 current measurement jumper (J18): An ammeter can be connected to
this jumper to measure the current consumed by the PSoC 6 MCU VDDIO2 power domain. This
is not loaded by default.
19. CYW43012 VDDIO current measurement jumper(J17): An ammeter can be connected to this
jumper to measure the current consumed by the CYW43012 VDDIO power domain.
20. Cypress serial NOR flash memory (S25FL512S, U3): The S25HL512S NOR flash of 512-Mbit
capacity is connected to the Quad SPI interface of the PSoC 6 MCU. The NOR device can be
used for both data and code memory with execute-in-place (XIP) supports and encryption.
21. Cypress PSoC 6 (2M) with CYW43012 Carrier Module (CY8CMOD-062S2-43012, MOD1):
This kit is designed to highlight the features of the PSoC 6 MCU on the
CY8CMOD-062S2-43012. For details, see CY8CMOD-062S2-43012 (MOD1) on page 30.
22. CYW43012 based Murata Type 1LV module: The Type 1LV module is an ultra-small module
that includes 2.4 GHz and 5 GHz dual-band WLAN and Bluetooth functionality. Based on
Cypress CYW43012, the module provides high-efficiency RF front end circuits. To ease Wi-Fi
certification, the Type 1LV module complies with IEEE 802.11a/b/g/n and Bluetooth Version 5.0
plus EDR, Power Class 1 + BLE.
23. Wi-Fi/BT antenna: This is the onboard antenna connected to the Wi-Fi and Bluetooth module.
24. PSoC 6 MCU: This kit is designed to highlight the features of the PSoC 6 MCU. For details on
PSoC 6 MCU pin mapping, refer to Table 1-1 on page 11.
25. Cypress serial Ferroelectric RAM (CY15B104QSN, U4): The CY15B104QSN is a 4-Mbit nonvolatile memory employing an advanced ferroelectric process. F-RAM is nonvolatile and performs reads and writes similar to a RAM. It provides reliable data retention for 151 years and is
connected to the Quad SPI interface of the PSoC 6 MCU.
26. CYW43012 VBAT current measurement jumper (J8): An ammeter can be connected to this
jumper to measure the current consumed by the CYW43012 VBAT power domain.
27. CYW43012 VBAT power selection jumper (J9): This jumper is used to select the CYW43012
VBAT supply voltage between 1.8 V, 3.3 V and 3.6 V.
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22
Kit Operation
28. PSoC 6 MCU user LEDs (LED8 and LED9): These two user LEDs can operate at the entire
operating voltage range of PSoC 6 MCU. The LED is active LOW, so the pins must be driven to
ground to turn ON the LED.
29. PSoC 6 I/O header (J21, J22, J24): These headers provide connectivity to PSoC 6 MCU GPIOs
that are not connected to the Arduino compatible headers. Some of these I/Os are also
connected to on-board peripherals see Table 1-1 on page 11 for pin mapping.
30. RGB LED (LED5): This onboard RGB LED can be controlled by the PSoC 6 MCU. The LEDs
are active LOW, so the pins must be driven to ground to turn ON the LEDs.
31. Wi-Fi/BT GPIO header (J23): This header brings out few IOs of the CYW43012 for general
purpose applications.
32. PSoC 6 USB device connector (J7): The USB cable provided with the PSoC 62S2 Wi-Fi BT
Pioneer Kit can also be connected between this USB connector and the PC to use the PSoC 6
MCU USB device applications.
33. Optional USB Host power supply header (J10): This header provides an option to supply
external power to the PSoC 6 USB when used as a USB Host.
34. KitProg3 status LED (LED2): This Yellow LED indicates the status of KitProg3. For details on
the KitProg3 status, see the KitProg3 User Guide.
35. KitProg3 (PSoC 5LP) programmer and debugger (CY8C5868LTI-LP039, U2): The PSoC 5LP
device (CY8C5868LTI-LP039) serving as KitProg3, is a multi-functional system, which includes
a SWD programmer, debugger, USB-I2C bridge and USB-UART bridge. For more details, see
the KitProg3 User Guide.
36. microSD Card holder (J20): Provide SDHC interface with microSD cards with the option to
detect the presence of the card.
See Hardware Functional Description on page 30 for details on various hardware blocks.
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Kit Operation
2.2
KitProg3: On-Board Programmer/Debugger
The PSoC 62S2 Wi-Fi BT Pioneer Board can be programmed and debugged using the onboard
KitProg3. KitProg3 is an onboard programmer/debugger with USB-UART and USB-I2C functionality.
A Cypress PSoC 5LP device is used to implement KitProg3 functionality. For more details on the
KitProg3 functionality, see the KitProg3 User Guide.
2.2.1
Programming and Debugging using ModusToolbox
This section presents a quick overview of programming and debugging using ModusToolbox. For
detailed instructions, see Help > ModusToolbox IDE Documentation > User Guide.
1. Connect the board to the PC using the USB cable, as shown in Figure 2-5. It enumerates as a
USB Composite Device if you are connecting it to your PC for the first time. KitProg3 can operate
either in CMSIS-DAP Bulk mode (default), CMSIS-DAP HID mode or DAPLink mode (DAPLink
mode is required for programing using Mbed CLI). KitProg3 also supports CMSIS-DAP Bulk with
two UARTs. Programming is faster with the Bulk mode. The status LED (Yellow) is always ON in
Bulk mode, ramping at 1 Hz rate in HID mode, and ramping at 2 Hz rate in DAPLink mode. Press
and release the Mode select button (SW3) to switch between these modes. If you do not see the
desired LED status, see the KitProg3 User Guide for details on the KitProg3 status and
troubleshooting instructions.
Figure 2-5. Connect USB Cable to USB Connector on the Board
2. In the ModusToolbox IDE, import the desired code example (application) into a new workspace.
a. Click on New Application from Quick Panel.
Figure 2-6. Create New Application
CY8CKIT-062S2-43012 PSoC 62S2 Wi-Fi BT Pioneer Kit Guide, Doc. # 002-28109 Rev. *E
24
Kit Operation
b. Select the CY8CKIT-062S2-43012 in the Choose Hardware Target window and click Next,
as shown in Figure 2-7.
Figure 2-7. New Application Creation: Choose Target Hardware
c. Select the application in Starter Application window and click Next, as shown in Figure 2-8.
Figure 2-8. New Application Creation: Select Starter Application
d. Click Finish in Summary window, as shown in Figure 2-9.
Figure 2-9. New Application Creation: Summary
CY8CKIT-062S2-43012 PSoC 62S2 Wi-Fi BT Pioneer Kit Guide, Doc. # 002-28109 Rev. *E
25
Kit Operation
3. To build and program a PSoC 6 MCU application, in the Project Explorer, select
project. In the Quick Panel, scroll to the Launches section and click the Program
(KitProg3) configuration as shown in Figure 2-10.
Figure 2-10. Programming in ModusToolbox
4. ModusToolbox has an integrated debugger. To debug a PSoC 6 MCU application, in the Project
Explorer, select project. In the Quick Panel, scroll to the Launches section and
click the Debug (KitProg3) configuration as shown in Figure 2-11. For a detailed
explanation on how to debug using ModusToolbox, see KBA224621.
Figure 2-11. Debugging in ModusToolbox
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Kit Operation
2.2.1.1
Using the OOB Example – PSoC 6 MCU: Hello World
The PSoC 62S2 Wi-Fi BT Pioneer Board is by default programmed with the code example: PSoC 6
MCU: Hello World. The steps below describe on how to use the example. For a detailed description
of the project refer to the example’s readme file in the GitHub repository.
Note: At any point of time, if you overwrite the OOB example, you can restore it back by
programming the PSoC 6 MCU: Hello World. Refer Programming and Debugging using
ModusToolbox on page 24 for programming the board.
1. Connect the board to your PC using the provided USB cable through the KitProg3 USB
connector.
2. Open a terminal program and select the KitProg3 COM port. Set the serial port parameters to
8N1 and 115200 baud.
3. Press the reset button (SW1) on the board and confirm that terminal application displays code
example title and other text Figure 2-12.
Figure 2-12. Hello World in Terminal
4. Confirm that the kit LED blinks at 1 Hz.
5. Press the Enter key. Confirm that the kit LED stops blinking. The terminal displays the message
“LED blinking paused”.
6. Press the Enter key again. Confirm that the kit LED resumes blinking at 1 Hz. The message
displayed on the terminal is updated to “LED blinking resumed”.
You can repeat steps 5 and 6 indefinitely.
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Kit Operation
2.2.2
USB-UART Bridge
The KitProg3 on the PSoC 62S2 Wi-Fi BT Pioneer Board can act as a USB-UART bridge.
The primary UART and flow-control lines between the PSoC 6 MCU and the KitProg3 are hard-wired
on the board, as Figure 2-13 shows.
Figure 2-13. UART Connection between KitProg3 and PSoC 6
.LW3URJ
@
The secondary UART and flow-control lines between the CYW43012 and the KitProg3 are hardwired on the board, as Figure 2-14 shows.
Figure 2-14. UART Connection between KitProg3 and CYW43012
.LW3URJ
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湘ICP备2023018690号
