LUPA-4000

LUPA-4000 4M Pixel CMOS Image Sensor (SPI) interface. It is housed in a 127-pin ceramic PGA package. This data sheet allows the user to develop a camera-system based on the described timing and interfacing. Main features The main features of the image sensor are identified as: • 2048 x 2048 active pixels (4M pixel resolution) • 12 µm2 square pixels (based on the high-fill factor active pixel sensor technology of FillFactory (US patent No. 6,225,670 and others)) • Peak QE x FF of 37.50% • Optical format: 24,6 mm x 24,6 mm • Pixel rate of 66 MHz using a 33 MHz system clock • Optical dynamic range: 66 dB (2000:1) in single slope operation and up to 90 dB in multiple slope operation • 2 On-chip 10 bit, 33 MSamples/s ADC • Full snapshot shutter • Random programmable windowing and sub-sampling modes • 127-pin PGA package • Binning (Voltage averaging in X-direction) • Programmable read out direction (X and Y) Part Number and ordering information Name Package Monochrome/color Monochrome Preamble Overview This document describes the interfacing and the driving of the LUPA-4000 image sensor. This 4 mega-pixel CMOS active pixel sensor features synchronous shutter and a maximal frame-rate of 15 fps in full resolution. The readout speed can be boosted by means of sub sampling and windowed Region Of Interest (ROI) readout. High dynamic range scenes can be captured using the double and multiple slope functionality. The sensor can be used with one or two outputs. Two on chip 10-bit ADC's can be used to convert the analog data to a 10-bit digital word stream. The sensor uses a 3-wire Serial-Parallel CYIL1SM4000AA-GDC 127 pin ceramic PGA The LUPA-4000 is also available in color or monochrome without the cover glass. Please contact Cypress for more information. Cypress Semiconductor Corporation Document Number: 38-05712 Rev. *B • 198 Champion Court • San Jose, CA 95134-1709 • 408-943-2600 Revised Januari 4, 2007 LUPA-4000 TABLE OF CONTENTS Preamble ........................................................................................................................................................... 1 Overview ...................................................................................................................................................... 1 Main features ............................................................................................................................................... 1 Part Number and ordering information.......................................................................................................... 1 Specifications ................................................................................................................................................... 4 General specifications .................................................................................................................................. 4 Electro-optical specifications ........................................................................................................................ 4 Features and general specifications ............................................................................................................ 6 Electrical specifications ................................................................................................................................ 7 Sensor architecture .......................................................................................................................................... 8 The 6-T pixel ................................................................................................................................................ 8 Frame rate and windowing ........................................................................................................................... 9 Output amplifier ............................................................................................................................................ 9 Pixel array drivers ........................................................................................................................................ 10 Column amplifiers ........................................................................................................................................ 10 Analog to Digital Converter .......................................................................................................................... 10 Synchronous shutter .................................................................................................................................... 11 Non-destructive readout (NDR) ................................................................................................................... 12 Operation and signalling .............................................................................................................................. 12 Pixel array signals ........................................................................................................................................ 14 Timing and read out of the image sensor ...................................................................................................... 16 Timing of the pixel array ............................................................................................................................... 16 Read out of the image sensor ...................................................................................................................... 18 Serial-Parallel-Interface (SPI) ...................................................................................................................... 24 Pin list ................................................................................................................................................................ 25 Geometry and mechanical specifications ...................................................................................................... 29 Bare die ........................................................................................................................................................ 29 Package drawing ......................................................................................................................................... 30 Bonding pads ............................................................................................................................................... 32 Bonding diagram .......................................................................................................................................... 33 Glass transmittance ..................................................................................................................................... 34 Handling and soldering precautions .............................................................................................................. 35 Ordering Information .................................................................................................................................... 35 Disclaimer .................................................................................................................................................... 35 APPENDIX A: LUPA-4000 evaluation system ................................................................................................ 36 APPENDIX B: Frequently Asked Questions ................................................................................................... 37 Document History Page ................................................................................................................................... 38 LIST OF FIGURES Spectral response curve ..................................................................................................................................... 5 Photo-voltaic response curve ............................................................................................................................. 6 Block diagram of the image sensor .................................................................................................................... 8 6T-pixel architecture ........................................................................................................................................... 8 Output stage architecture ................................................................................................................................... 9 ADC timing ......................................................................................................................................................... 10 In- and external ADC connections ...................................................................................................................... 11 Document Number: 38-05712 Rev. *B Page 2 of 38 LUPA-4000 Synchronous shutter operation ........................................................................................................................... 11 Principle of non-destructive readout. .................................................................................................................. 12 Internal timing of the pixel................................................................................................................................... 14 Integration and read out in parallel ..................................................................................................................... 16 Integration and readout sequentially .................................................................................................................. 16 Timing of the pixel array ...................................................................................................................................... 17 Readout of the image sensor. F.O.T ................................................................................................................... 18 X- and Y-addressing ........................................................................................................................................... 19 X-addressing. From bottom to top ....................................................................................................................... 20 Output signal related to Clock_x signal ............................................................................................................... 21 Standard timing for the R.O.T. Only pre_col and Norowsel control signals are required .................................... 22 Reduced standard ROT by means of Sh_col signal............................................................................................ 22 X- and Y-addressing with precharging of the buses ........................................................................................... 23 SPI block diagram and timing ............................................................................................................................. 24 Die figure of the LUPA-4000 ............................................................................................................................... 29 Package drawing of the LUPA-4000 package .................................................................................................... 30 LUPA-4000 package specifications with die ....................................................................................................... 31 Placing of the bonding pads on the LUPA-4000 package .................................................................................. 32 Bonding pads diagram of the LUPA-4000 package ........................................................................................... 33 Transmission characteristics of the D263 glass used as protective cover for the LUPA-4000 sensors. ............ 34 Content of the LUPA-4000 evaluation kit ........................................................................................................... 36 Dual slope diagram ............................................................................................................................................. 37 LIST OF TABLES General specifications ........................................................................................................................................ 4 Electro-optical specifications .............................................................................................................................. 4 Features and general specifications ................................................................................................................... 6 Recommended operation conditions .................................................................................................................. 7 Frame rate as function of ROI read out and/or sub sampling ............................................................................. 9 ADC specifications ............................................................................................................................................. 10 Advantages and disadvantages of non-destructive readout. .............................................................................. 12 Power supplies ................................................................................................................................................... 12 Overview of the power supplies related to the pixel signals ............................................................................... 13 Overview of bias signals ..................................................................................................................................... 13 Overview of the in- and external pixel array signals ........................................................................................... 15 Timing specifications .......................................................................................................................................... 17 Read-out timing specifications ............................................................................................................................ 19 Read-out timing specifications with precharching of the buses .......................................................................... 23 SPI parameters ................................................................................................................................................... 24 Document Number: 38-05712 Rev. *B Page 3 of 38 LUPA-4000 Specifications General specifications Table 1. General specifications Parameter Pixel architecture Pixel size Resolution Pixel rate Shutter type Full frame rate Specification 6T-pixel 12 µm x 12 µm 2048 x 2048 66 MHz Pipelined snapshot shutter 15 frames/second Remarks Based on the high fill-factor active pixel sensor technology of FillFactory The resolution and pixel size results in a 24,6 mm x 24,6 mm optical active area. Using a 33 MHz system clock and 1 or 2 parallel outputs. Full snapshot shutter (integration during read out is possible). Frame rate increase possible with ROI read out and/or sub sampling. Electro-optical specifications Overview Table 2. Electro-optical specifications Parameter FPN PRNU Conversion gain Output signal amplitude Saturation charge Sensitivity Peak QE * FF Peak SR * FF Dark current (@ 21 °C) Noise electrons S/N ratio Spectral sensitivity range Parasitic sensitivity MTF Power dissipation Specification 50 ns >50 ns 200 ns (more information on this timing can be found in section 4.2.2.a) >20 ns >0 ns Please note that the pixel rate is the double frequency of the Clock_x frequency. To obtain a pixel rate of 66 MHz, one needs to apply a pixel clock Clock_x of 33MHz. When only 1 analog output is used 2 pixels are output every Clock_x period. When Clock_x is high, the first pixel is selected, when Clock_x is low, the next pixel is selected. Consequently, during 1 complete period of Clock_x 2 pixels are readout by the output amplifier. If 2 analog outputs are used each Clock-X period 1 pixel is presented at each output. Value As soon as a new line is selected, it has to be read out by the output amplifiers. Before the pixels of the selected line can be multiplexed onto the output amplifiers, one has to wait a certain time, indicated as the ROT or Row overhead time shown in Figure 15. This is the time to get the data stable from the pixels to the output bus before the output stages. This ROT is in fact lost time and rather critical in a high-speed sensor. Different timings to reduce this ROT are explained in next paragraph. During the selection of 1 line, 2048 pixels are selected. These 2048 pixels have to be readout by 1 (or 2) output amplifier. Document Number: 38-05712 Rev. *B Page 19 of 38 LUPA-4000 Figure 16. X-addressing. From bottom to top: Clock_x, Sync_x, internal selection pixel 1&2, internal selection pixel 3&4, internal selection pixel 5 & 6 The first pixel that is selected is the x-address downloaded in the SPI. The starting address is the number downloaded into the SPI, multiplied with 2. Windowing is achieved by a starting address downloaded in the SPI and the size of the window. In the x-direction, the size is determined by the moment a new Clock_y is given. In the y-direction, the sync_y pulse determines the size. Conse- quently, the best way to obtain a certain window is by using an internal counter in the controller. Figure 16 is the simulation result after extraction of the layout module from a different sensor to show the principle. In this figure the pixel clock has a frequency of 50 MHz, which would result in a pixel rate of 100 Msamples/sec. Figure shows the relation between the applied Clock_x and the output signal. Document Number: 38-05712 Rev. *B Page 20 of 38 LUPA-4000 Figure 17. Output signal related to Clock_x signal. From bottom to top: Clock_x, Sync_x and output. The output level before the first pixel is the level of the last pixel of previous line Pixel 1 Pixel2….: Pixel period : 20nsec Output 1 saturated dark Sync_x Clock_x: 25MHz As soon as Sync_x is high and 1 rising edge of Clock_x occurs, the pixels are brought to the analog outputs. This is again the simulation result of a comparable sensor to show the principle. Please note there is a time difference between the clock edge and the moment the data is seen at the output. As this time difference is very difficult to predict in advance, it is advisable to have the ADC sampling clock flexible to set an optimal Add sampling point. The time differences can easily vary between 5 - 15 nsec and have to be tested on the real devices. Reduced Row Overhead Time timing The row overhead time is the time between the selection of lines that one has to wait to get the data stable at the column amplifiers. This row overhead time is a loss in time, which should be reduced as much as possible. Document Number: 38-05712 Rev. *B Page 21 of 38 LUPA-4000 Standard timing (200 ns) Figure 18. Standard timing for the R.O.T. Only pre_col and Norowsel control signals are required In this case the control signals Norowsel and pre_col are made active for about 20 nsec from the moment the next line is selected. The time these pulses have to be active is related with the biasing resistance Pre_load. The lower this resistance, the shorter the pulse duration of Norowsel and pre_col may be. After these pulses are given, one has to wait for at least 180 nsec before the first pixels can be sampled. For this mode Sh_col must be made active (low) all the time. Back-up timing (ROT =100-200 ns) A straightforward way of reducing the R.O.T is by using a sample and hold function. By means of Sh_col the analog data is tracked during the first 100 nsec during the selection of a new set of lines. After 100 nsec, the analog data is stored. The ROT is in this case reduced to 100 nsec, but as the internal data was not stable yet dynamic range is lost because not the complete analog levels are reached yet after 100 ns. Figure 18 shows this principle. Sh_col is now a pulse of 100 ns-200 ns starting at the same moment as pre_col and Norowsel. The duration of Sh_col is equal to the ROT. The shorter this time the shorter the ROT will be however this lowers also the dynamic range. In case "voltage averaging" is required, the sensor must work in this mode with Sh_col signal and a "voltage averaging" signal must be generated after Sh_col drops and before the readout starts (see Figure 15) Figure 19. Reduced standard ROT by means of Sh_col signal. pre_col (short pulse), Norowsel (short pulse) and Sh_col (large pulse) Precharging of the buses This timing mode is exactly the same as the mode without sample and hold, except that the prebus1 and prebus2 signals are activated. It should be noticed that the precharging of the buses can be combined with all of the timing modes discussed above. The idea is to have a short pulse of about 5 ns to precharge the output buses to a well-known level. This mode makes the ghosting of bad columns impossible. In this mode, Nsf_load must be made much larger (at least 1 Mohms). Document Number: 38-05712 Rev. *B Page 22 of 38 LUPA-4000 Figure 20. X- and Y-addressing with precharging of the buses Table 14. Read-out timing specifications with precharching of the buses Symbol a b c d e f g h i Name Sync_Y Sync_Y-Clock_Y Clock_Y-Sync_Y NoRowSel Pre_col Sh_col Voltage averaging Sync_X-Clock_X Prebus pulse >20 ns >0 ns >0 ns >50 ns >50 ns 200 ns (or cst low, depending on timing mode) >20 ns >0 ns As short as possible Value Document Number: 38-05712 Rev. *B Page 23 of 38 LUPA-4000 Serial-Parallel-Interface (SPI) The SPI is required to upload the different modes. Table 15 shows the parameters and there bit position Table 15. SPI parameters Parameter Y-direction Y-address X-voltage averaging enable X-subsampling X-direction X-address Nr output amplifiers DAC 0 1-10 11 12 13 14-23 24 25-31 Bit nr. Bit 1 is LSB 1: Enabled 1: Subsampling 0: From left to right Bit 14 is LSB 0: 1 Output Bit 25 is LSB and only one output is used. The DAC will have the lowest level at its output. When using sub sampling, only even X-addresses may be applied. Remarks 1: from bottom to top When all zeros are loaded into the SPI, the sensor will start at pixel 0,0. The scanning will be from left to right and from top to bottom. There will be no sub-sampling or voltage averaging Figure 21. SPI block diagram and timing To sensor Bit 31 32 outputs to sensor Bit 0 D Load_addr C Q spi_in Clock_spi Load_addr Spi_in Clock_spi D C Q Clock_spi E ntire uploadable block Unity Ce ll spi_in Load_addr B0 B1 B2 B31 command applied to sensor Document Number: 38-05712 Rev. *B Page 24 of 38 LUPA-4000 Pin list Table 16 is a list of all the pins and their functionalities. Pad 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 Pin E1 F1 D2 G2 G1 F2 H1 H2 J2 J1 K1 M2 L1 M1 N2 P1 P2 N1 P3 Q1 Q2 R1 R2 Q3 Q4 N3 Q5 Q6 Q7 R3 M3 L2 L3 Pin Name sync_x eos_x vdd clock_x eos_spi spi_data spi_load spi_clock gndo out2 out2DC voo out1DC out1 gndo vaa gnda va3 vpix psf_load nsf_load muxbus_load uni_load_fast pre_load out_load dec_x_load uni_load col_load dec_y_load vdd gndd prebus1 prebus2 Pin Type Input Testpin Supply Input Testpin Input Input Input Ground Output Output Supply Output Output Ground Supply Ground Supply Supply Input Input Input Input Input Input Input Input Input Input Supply Ground Input Input Description Digital input. Synchronises the X-address register. Indicates when the end of the line is reached. Power supply digital modules. Digital input. Determines the pixel rate. Checks if the data is transferred correctly through the SPI. Digital input. Data for the SPI. Digital input. Loads data into the SPI. Digital input. Clock for the SPI. Ground output stages Analog output 2. Reference output 2. Power supply output stages Reference output 1. Analog output 1. Ground output stages. Power supply analog modules. Ground analog modules. Power supply column modules. Power supply pixel array. Analog reference input. Biasing for column modules. Connect with R=1MΩ to Vaa and decouple with C=100nF to gnda. Analog reference input. Biasing for column modules. Connect with R=5kΩ to Vaa and decouple with C=100nF to gnda. Analog reference input. Biasing for multiplex bus. Connect with R=25kΩ to Vaa and decouple with C=100nF to gnda. Analog reference input. Biasing for column modules. Connect with R=10kΩ to Vaa and decouple with C=100nF to gnda. Analog reference input. Biasing for column modules. Connect with R=3kΩ to Vaa and decouple with C=100nF to gnda. Analog reference input. Biasing for output stage. Connect with R=60kΩ to Vaa and decouple with C=100nF to gnda. Analog reference input. Biasing for X-addressing. Connect with R=2MΩ to Vdd and decouple with C=100nF to gndd. Analog reference input. Biasing for column modules. Connect with R=1MΩ to Vaa and decouple with C=100nF to gnda. Analog reference input. Biasing for column modules. Connect with R=1MΩ to Vaa and decouple with C=100nF to gnda. Analog reference input. Biasing for Y-addressing. Connect with R=2MΩ to Vdd and decouple with C=100nF to gndd. Power supply digital modules. Ground digital modules. Digital input. Control signal to reduce readout time. Digital input. Control signal to reduce readout time. Document Number: 38-05712 Rev. *B Page 25 of 38 LUPA-4000 Pad 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 Pin Q8 R4 R5 R6 R7 K2 Q9 Q10 R8 R9 R10 R11 Q11 R12 Q12 P15 Q14 Q15 R13 R14 R15 P14 Q13 R16 Q16 P16 N14 N15 L16 L15 N16 M16 L14 M15 M14 K14 J14 J15 J16 Pin Name sh_col pre_col norowsel clock_y sync_y eos_y_r temp_diode_p temp_diode_n vpix vmem_l vmem_h vres vres_ds ref_low linear_conv bit_9 bit_8 bit_7 bit_6 bit_5 bit_4 bit_3 bit_2 bit_1 bit_0 clock gndd vddd gnda vdda bit_inv CMD_SS analog_in CMD_FS ref_high vres_ds vres vpre_l vdd Pin Type Input Input Input Input Input Testpin Testpin Testpin Supply Supply Supply Supply Supply Input Input Output Output Output Output Output Output Output Output Output Output Input Supply Supply Supply Supply Input Input Input Input Input Supply Supply Supply Supply Description Digital input. Control signal of the column readout. Digital input. Control signal of the column readout to reduce row-blanking time. Digital input. Control signal of the column readout. Digital input. Clock of the Y-addressing. Digital input. Synchronises the Y-address register. Indicates when the end of frame is reached when scanning in the 'right' direction. Anode of temperature diode. Cathode of temperature diode. Power supply pixel array. Power supply Vmem drivers. Power supply Vmem drivers. Power supply reset drivers. Power supply reset drivers. Analog reference input. Low reference voltage of ADC. (see Figure 7 for exact resistor value) Digital input. 0= linear conversion; 1= gamma correction. Digital output 1 (MSB). Digital output 1 . Digital output 1 . Digital output 1 . Digital output 1 . Digital output 1 . Digital output 1 . Digital output 1 . Digital output 1 . Digital output 1 (LSB). ADC clock input. Digital GND of ADC circuitry. Digital supply of ADC circuitry (nominal 2.5V). Analog GND of ADC circuitry. Analog supply of ADC circuitry (nominal 2.5V). Digital input. 0=no inversion of output bits; 1 = inversion of output bits. Analog reference input. Biasing of second stage of ADC. Connect to VDDA with R=50 kΩ and decouple with C=100 nF to GNDa. Analog input of 1st ADC. Analog reference input. Biasing of first stage of ADC. Connect to VDDA with R=50 kΩand decouple with C=100 nF to GNDa. Analog reference input. High reference voltage of ADC. (see Figure 7 for exact resistor value) Power supply reset drivers. Power supply reset drivers. Power supply precharge drivers. Must be able to sink current. Can also be connected to ground. Power supply digital modules. Page 26 of 38 Document Number: 38-05712 Rev. *B LUPA-4000 Pad 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 Pin K15 K16 H15 H16 G16 F16 E16 G15 G14 F14 E14 D16 E15 F15 D15 C15 D14 B16 B14 C16 A16 B15 A15 A14 C14 B13 A13 A9 A10 A11 A12 B7 B8 B9 B10 B11 B6 A8 A7 B12 Pin Name vmem_h vmem_l ref_low linear_conv bit_9 bit_8 bit_7 bit_6 bit_5 bit_4 bit_3 bit_2 bit_1 bit_0 clock gndd vddd gnda vdda bit_inv CMD_SS analog_in CMD_FS ref_high vres_ds vres vmem_h vmem_l vpix reset reset_ds mem_hl precharge sample temp_diode_n temp_diode_p precharge_bias photodiode gndd vdd Pin Type Supply Supply Input Input Output Output Output Output Output Output Output Output Output Output Input Supply Supply Supply Supply Input Input Input Input Input Supply Supply Supply Supply Supply Input Input Input Input Input Testpin Testpin Input Testpin Ground Supply Power supply Vmem drivers. Power supply Vmem drivers. Description Analog reference input. Low reference voltage of ADC. (see Figure 7 for exact resistor value) Digital input. 0= linear conversion; 1= gamma correction. Digital output 2 (MSB). Digital output 2 . Digital output 2 . Digital output 2 . Digital output 2 . Digital output 2 . Digital output 2 . Digital output 2 . Digital output 2 . Digital output 2 (LSB). ADC clock input. Digital GND of ADC circuitry. Digital supply of ADC circuitry (nominal 2.5V). Analog GND of ADC circuitry. Analog supply of ADC circuitry (nominal 2.5V). Digital input. 0=no inversion of output bits; 1 = inversion of output bits. Biasing of second stage of ADC. Connect to VDDA with R=50 kΩ and decouple with C=100 nF to GNDa. Analog input 2nd ADC. Analog reference input. Biasing of first stage of ADC. Connect to VDDA with R=50 kΩ and decouple with C=100 nF to GNDa. Analog reference input. High reference voltage of ADC. (see Figure 7 for exact resistor value) Power supply reset drivers. Power supply reset drivers. Power supply Vmem drivers. Power supply Vmem drivers. Power supply pixel array. Digital input. Control of reset signal in the pixel. Digital input. Control of double slope reset in the pixel. Digital input. Control of Vmem signal in pixel. Digital input. Control of Vprecharge signal in pixel. Digital input. Control of Vsample signal in pixel. Cathode of temperature diode. Anode of temperature diode. Analog reference input. Biasing for pixel array. (seeTable 10 for exact resistor and capacitor value) Output photodiode. Ground digital modules. Power supply digital modules. Document Number: 38-05712 Rev. *B Page 27 of 38 LUPA-4000 Pad 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127E2 Pin A6 A1 A5 A2 A3 B5 A4 B1 B2 C1 D1 B4 B3 C2 E2 Pin Name eos_y_l sync_y clock_y norowsel volt. averaging pre_col sh_col prebus2 prebus1 dec_y_load vpix va3 gnda vaa gndd Pin Type Testpin Input Input Input Input Input Input Input Input Input Supply Supply Ground Supply Ground Description Indicates when the end of frame is reached when scanning in the 'left' direction. Digital input. Synchronises the Y-address register. Digital input. Clock of the Y-addressing. Digital input. Control signal of the column readout. Digital input. Control signal of the voltage averaging in the column readout. Digital input. Control signal of the column readout to reduce row-blanking time. Digital input. Control signal of the column readout. Digital input. Control signal to reduce readout time. Digital input. Control signal to reduce readout time. Analog reference input. Biasing for Y-addressing. Power supply pixel array. Power supply column modules. Ground analog modules. Power supply analog modules. Ground digital modules. 3. All unused inputs should be tied to a non-active level (e.g. VDD or GND). REMARKS: 1. All pins with the same name can be connected together. 2. All digital input are active high (unless mentioned otherwise). Document Number: 38-05712 Rev. *B Page 28 of 38 LUPA-4000 Geometry and Mechanical specifications Bare die Figure 22. Die figure of the LUPA-4000 27200 m Pixel array of 2048 x 2048 pixels Pixel 0,0 25610 m Pixel 0,0 is located at 478 µm from the left side of the die and 1366 µm from the bottom side of the die. Document Number: 38-05712 Rev. *B Page 29 of 38 LUPA-4000 Package drawing The LUPA-4000 is packaged in a 127-pin PGA package. Figure 23. Package drawing of the LUPA-4000 package Document Number: 38-05712 Rev. *B Page 30 of 38 LUPA-4000 Figure 24. LUPA-4000 package specifications with die Document Number: 38-05712 Rev. *B Page 31 of 38 LUPA-4000 Bonding pads The bonding pads are located as indicated below. Figure 25. Placing of the bonding pads on the LUPA-4000 package Document Number: 38-05712 Rev. *B Page 32 of 38 LUPA-4000 Bonding diagram The die is bonded to the bonding pads of the package as indicated below Figure 26. Bonding pads diagram of the LUPA-4000 package. The die will be placed in the package in a way that the center of the light sensitive area will match the center of the package. Document Number: 38-05712 Rev. *B Page 33 of 38 LUPA-4000 Glass transmittance A D263 glass will be used as protection glass lid on top of the LUPA-4000 monochrome sensors. Figure 24 shows the transmission characteristics of the D263 glass Figure 27. Transmission characteristics of the D263 glass used as protective cover for the LUPA-4000 sensors 100 90 Transmission [%] 80 70 60 50 40 30 20 10 0 400 500 600 700 800 900 Wavelength [nm ] Document Number: 38-05712 Rev. *B Page 34 of 38 LUPA-4000 Handling and soldering precautions Special care should be given when soldering image sensors with color filter arrays (RGB color filters), onto a circuit board, since color filters are sensitive to high temperatures. Prolonged heating at elevated temperatures may result in deterioration of the performance of the sensor. The following recommendations are made to ensure that sensor performance is not compromised during end-users' assembly processes. Board Assembly: Device placement onto boards should be done in accordance with strict ESD controls for Class 0, JESD22 Human Body Model, and Class A, JESD22 Machine Model devices. Assembly operators should always wear all designated and approved grounding equipment; grounded wrist straps at ESD protected workstations are recommended including the use of ionized blowers. All tools should be ESD protected. Manual Soldering: When a soldering iron is used the following conditions should be observed: • Use a soldering iron with temperature control at the tip. • The soldering iron tip temperature should not exceed 350°C. • The soldering period for each pin should be less than 5 seconds. Precautions and cleaning: Avoid spilling solder flux on the cover glass; bare glass and particularly glass with antireflection filters may be adversely affected by the flux. Avoid mechanical or particulate damage to the cover glass. It is recommended that isopropyl alcohol (IPA) is used as a solvent for cleaning the image sensor glass lid. When using other solvents, it should be confirmed beforehand whether the solvent will dissolve the package and/or the glass lid or not. Ordering Information FillFactory Part Number LUPA-4000-M Disclaimer The LUPA-4000 is only to be used for non-military applications. A strict exclusivity agreement prevents us to sell the LUPA-4000 to customers who intend to use it for military applications. FillFactory image sensors are only warranted to meet the specifications as described in the production data sheet. Specifications are subject to change without notice. Please contact info@FillFactory.com for more information. Cypress Semiconductor Part Number CYIL1SM4000AA-GBC Document Number: 38-05712 Rev. *B Page 35 of 38 LUPA-4000 APPENDIX A: LUPA-4000 evaluation system For evaluating purposes an LUPA-4000 evaluation kit is available. The LUPA-4000 evaluation kit consists of a multifunctional digital board (memory, sequencer and IEEE 1394 Fire Wire interface) and an analog image sensor board. Visual Basic software (under Win 2000 or XP) allows the grabbing and display of images and movies from the sensor. All acquired images and movies can be stored in different file formats (8 or 16-bit). All setting can be adjusted on the fly to evaluate the sensors specs. Default register values can be loaded to start the software in a desired state Figure 28. Content of the LUPA-4000 evaluation kit Please contact Fillfactory (info@Fillfactory.com) if you want any more information on the evaluation kit. Document Number: 38-05712 Rev. *B Page 36 of 38 LUPA-4000 APPENDIX B: Frequently Asked Questions Q: How does the dual (multiple) slope extended dynamic range mode works? A: Figure 29. Dual slope diagram Reset pulse Double slope reset pulse Read out Reset level 1 p1 Reset level 2 p2 p3 p4 Saturation level Double slope reset time (usually 510% of the total integration time) Total integration time The green lines are the analog signal on the photodiode, which decrease as a result of exposure. The slope is determined by the amount of light at each pixel (the more light the steeper the slope). When the pixels reach the saturation level the analog signal will not change despite further exposure. As you can see without any double slope pulse pixels p3 and p4 will reach saturation before the sample moment of the analog values, no signal will be acquired without double slope. When double slope is enabled a second reset pulse will be given (blue line) at a certain time before the end of the integration time. This double slope reset pulse resets the analog signal of the pixels BELOW this level to the reset level. After the reset the analog signal starts to decrease with the same slope as before the double slope reset pulse. If the double slope reset pulse is placed at the end of the integration time (90% for instance) the analog signal that would have reach the saturation levels aren't saturated anymore (this increases the optical dynamic range) at read out. It's important to notice that pixel signals above the double slope reset level will not be influenced by this double slope reset pulse (p1 and p2). All products and company names mentioned in this document may be the trademarks of their respective holders. Document Number: 38-05712 Rev. *B Page 37 of 38 © Cypress Semiconductor Corporation, 2006. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be used for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress. Furthermore, Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges. LUPA-4000 Document History Page Document Title: LUPA-4000 4M PIXEL CMOS Image Sensor Document Number: 38-05712 REV. ** *A *B ECN. 310396 497132 649219 Issue Date See ECN See ECN See ECN Orig. of Change FPW QGS FPW Initial Cypress Release Converted to Frame file Ordering information update+ title update + package spec label Description of Change Document Number: 38-05712 Rev. *B Page 38 of 38