Please note that Cypress is an Infineon Technologies Company.
The document following this cover page is marked as “Cypress” document as this is the
company that originally developed the product. Please note that Infineon will continue
to offer the product to new and existing customers as part of the Infineon product
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Continuity of document content
The fact that Infineon offers the following product as part of the Infineon product
portfolio does not lead to any changes to this document. Future revisions will occur
when appropriate, and any changes will be set out on the document history page.
Continuity of ordering part numbers
Infineon continues to support existing part numbers. Please continue to use the
ordering part numbers listed in the datasheet for ordering.
www.infineon.com
S6BP202A
ASSP, 42V, 2.4A, Synchronous
Buck-boost DC/DC Converter IC
S6BP202A is a 1-Ch Buck-boost DC/DC converter IC with four built-in switching FETs. This IC is able to supply up to 2.4A of load
current within the very wide range from 2.5V to 42V in the input voltage. This IC has an operation mode that is automatically changed
to PFM operation during low load, which can achieve super-high efficiency with a very low quiescent current 20 µA. It is possible to
provide stable output voltage from an automotive cold cranking and load dump, up to 42V, conditions within 1 ms transition time. As
a result, this IC is suitable for power supply solutions of automotive and Industrial applications. This IC has the SYNC function,
which is able to inputs an external clock signal. When an external clock signal in the range from 200 kHz to 400 kHz is inputted,
the FETs perform the switching operation with synchronizing signal from an external clock. When an external clock signal is not
inputted, the FETs perform the switching operation from an internal clock. The internal clock signal in the range from 200 kHz to 2.1
MHz can be set by an external resistor. Since external voltage setting resistors and phase compensation capacitors are not required
with this IC, it can reduce the number of parts and a part mounting area. This IC has five protection functions, input under voltage
lockout (input UVLO), output under voltage protection (output UVP), output over voltage protection (output OVP), output over current
protection (output OCP), and thermal shutdown (TSD). Moreover, this IC has the power good (PG) function that indicates the state
of the output voltage (VOUT pin). When the output voltage reaches the PG voltage, the PG signal is outputted.
Features
Applications
◼ Wide input voltage range: 2.5V to 42V
◼ Preset output voltage: 5.000V
◼ Wide operating frequency range: 200 kHz to 2.1 MHz
◼ External synchronized clock range: 200 kHz to 400 kHz
◼ SYNC function
SYNC_IN:
External clock input
(Unless inputting clock, this IC operates by internal clock)
◼ Super-high efficiency by PFM operation
◼ Instrument cluster
◼ Advanced driver assistance systems (ADAS)
◼ Gateway module
◼ Automotive applications
◼ Industrial applications
Block Diagram
(When setting MODE pin to a low level)
◼ Automatic PWM/PFM switching operation and fixed PWM
operation are selectable by MODE pin
Battery
◼ Built-in switching FET
2.5-42V
S6BP202A
◼ Synchronous current mode architecture
◼ Shutdown current: Lower than 1 µA
Enable
◼ Quiescent current: 20 µA
5V
◼ Power Good Monitor
Output
voltage monitoring by window comparator
reset time: 14 ms
PWM/PFM
Switch
Power-on
◼ Soft start time without load dependence: 0.9 ms
(When switching frequency = 2.1 MHz)
5V LDO,
Enable
External
Clock for
Synchronization
OSC,
External
SYNC
BuckBoost
DC/DC
Converter
2.1 MHz
5V / 2.4A
◼ Enhanced protection functions
Input
UVLO
Output UVP: 92.0%
Output OVP: 108.0%
Output OVC
Thermal shutdown
◼ Small ETSSOP16 package (exposed PAD): 5 mm × 6.4 mm
◼ AEC-Q100 compliant (Grade-1)
Cypress Semiconductor Corporation
Document Number: 002-08496 Rev. *F
•
Frequency Setting
198 Champion Court
Protection
Power
Good
Power Good
GND
•
San Jose, CA 95134-1709
•
408-943-2600
Revised November 18, 2020
S6BP202A
More Information
Cypress provides a wealth of data at www.cypress.com/pmic to help you to select the right PMIC device for your design, and to
help you to quickly and effectively integrate the device into your design. Following is an abbreviated list for S6BP202A.
◼ Overview: Automotive PMIC Portfolio, Automotive PMIC
Roadmap
◼ Product Selector:
S6BP202A:
1-Ch Buck-Boost Automotive PMIC
◼ Application Notes: Cypress offers S6BP202A application
notes. Recommended application notes for getting started
with S6BP202A are:
AN99497: Designing a Power Management System
with S6BP201A, S6BP202A, and S6BP203A
AN201006: Thermal Considerations and Parameters
Document Number: 002-08496 Rev. *F
◼ Evaluation Kit Operation Manual:
S6SBP202A1FVA1001:
Power block of automotive instrument cluster
◼ Related Products:
S6BP201A,
S6BP203A:
1-Ch Buck-Boost Automotive PMIC
S6BP401A:
6-Ch Automotive PMIC for ADAS
S6BP501A, S6BP502A:
3-Ch Automotive PMIC for Instrument Cluster
Page 2 of 19
S6BP202A
Contents
Features................................................................................................................................................................................... 1
Applications ............................................................................................................................................................................ 1
Block Diagram......................................................................................................................................................................... 1
More Information .................................................................................................................................................................... 2
1.
Product Lineup ............................................................................................................................................................... 4
2.
Pin Assignment .............................................................................................................................................................. 4
3.
Pin Descriptions ............................................................................................................................................................. 4
4.
Architecture Block Diagram .......................................................................................................................................... 6
5.
Absolute Maximum Ratings .......................................................................................................................................... 7
6.
Recommended Operating Conditions .......................................................................................................................... 7
7.
Electrical Characteristics .............................................................................................................................................. 8
8.
Functional Description .................................................................................................................................................. 9
8.1
Block Description ........................................................................................................................................................... 9
8.2
Protection Function Table............................................................................................................................................ 10
9.
Application Circuit Example and Parts list ................................................................................................................ 11
10. Application Note ........................................................................................................................................................... 12
10.1 Setting the Operation Conditions ................................................................................................................................. 12
11. Reference Data ............................................................................................................................................................. 14
12. Usage Precaution ......................................................................................................................................................... 16
13. RoHS Compliance Information ................................................................................................................................... 16
14. Ordering Information ................................................................................................................................................... 16
15. Package Dimensions ................................................................................................................................................... 17
16. Major Changes ............................................................................................................................................................. 18
Document History ................................................................................................................................................................. 18
Sales, Solutions, and Legal Information ............................................................................................................................. 19
Document Number: 002-08496 Rev. *F
Page 3 of 19
S6BP202A
1. Product Lineup
The VOUT output voltage, SYNC function, VOUT UVP threshold, VOUT OVP threshold, power-on reset time of this product are set
at the factory shipment.
Part Number (MPN)
Order
Code
S6BP202A1FST2B00A
1F
MPN: Marketing Part Number
VOUT
VOUT UVP Threshold [%] VOUT OVP Threshold [%] Power-on
SYNC
Output
Reset
Voltage [V] Function Falling (Typ) Rising(Typ) Rising (Typ) Falling (Typ)
Time[s]
5.000
SYNC_IN
92.0
93.0
108.0
107.0
14.0m
2. Pin Assignment
Figure 2-1 Pin Assignment
(Top view)
PGND1
1
16
PGND2
LX1
2
15
LX2
PVIN
3
14
VOUT
BST
4
13
FB
EP: GND
VIN
5
12
RT
ENA
6
11
SYNC
MODE
7
10
PG
VCC
8
9
GND
(SEC016)
3. Pin Descriptions
Table 3-1 Pin Descriptions
Pin No.
1
2
3
4
5
6
7
8
9
Pin Name
PGND1
LX1
PVIN
BST
VIN
ENA
MODE
VCC
GND
I/O
−
O
I
I
I
I
I
O
−
10
PG
O
11
SYNC
I
12
RT
O
13
14
15
16
EP
FB
VOUT
LX2
PGND2
GND
I
O
O
−
−
Document Number: 002-08496 Rev. *F
Description
GND pin for built-in switching FET
Inductor connection pin
Power supply pin for PWM controller and switching FETs
BST(Boost) capacitor connection pin
Power supply pin
DC/DC converter enable pin
PWM/PFM operation control pin
VCC capacitor connection pin. LDO output pin of Internal reference voltage
GND pin
Open drain output pin for power good. When being used, connect PG pin to VCC pin or
VOUT pin. When not being used, leave PG pin open.
External clock input pin
For the SYNC pin setting, refer to "10.1 Setting the Operation Conditions"
Timing resistor connection pin for internal clock (switching frequency)
For the resistance, refer to "10.1 Setting the Operation Conditions"
Output voltage feedback pin
DC/DC converter output pin
Inductor connection output pin.
GND pin for built-in switching FET
GND pin
Page 4 of 19
S6BP202A
Figure 3-1 I/O Pin Equivalent Circuit Diagram
VIN 5
PVIN 3
PVIN 3
VCC 8
14 VOUT
4 BST
GND 9
15 LX2
2 LX1
PGND1 1
PGND2 16
PGND1 1
PGND2 16
VIN 5
10 PG
FB 13
13 FB
8 VCC
GND 9
GND 9
GND 9
VIN 5
VCC 8
VCC 8
ENA 6
MODE 7
SYNC 11
GND 9
GND 9
GND 9
VCC 8
12 RT
GND 9
Document Number: 002-08496 Rev. *F
Page 5 of 19
S6BP202A
4. Architecture Block Diagram
Figure 4-1 Architecture Block Diagram
VIN
5
VIN
VCC
6
5V
LDO
ENA
VIN
UVLO
BGR
RT
SYNC
TSD
9
OSC
VCC
UVLO
GND
SYNC
8
12
11
SYNC
7
MODE
MODE
ck
Bypass
SW
VCC
Buck-Boost DC/DC Converter
PG
PG
FB
LX1
VIN
Slope
ck
2
LS
Low Side
FET1
1
PGND1
Document Number: 002-08496 Rev. *F
VOUT
LS
PFMCMP
High Side
FET1
FB
PVIN
ErrAMP
3
BST
ICMP
4
PWM
Logic
Boost
Mode
Pulse
10
13
14
VOUT
High Side
FET2
LX2
15
Low Side
FET2
PGND2
16
Page 6 of 19
S6BP202A
5. Absolute Maximum Ratings
Parameter
Symbol
VVIN
VPVIN
VVCC
VBST
VLX1
VLX2
VFB
Terminal voltage(*1)
VRT
VMODE
VSYNC
VENA
VPG
VBST-LX
Difference voltage(*1)
VGND
PG output current
IPG
Power dissipation (*1)
PD
Storage temperature
TSTG
*1: When PGND1 = PGND2 = GND = 0V
Power supply voltage (*1)
Condition
VIN pin
PVIN pin
VCC pin
BST pin
LX1 pin
LX2 pin
FB pin
RT pin
MODE pin
SYNC pin
ENA pin
PG pin
Between BST–LX1 pins
Between GND–PGND1 pins, Between GND–PGND2 pins
PG pin
Ta ≤ ±25°C
−
Min
−0.3
−0.3
−0.3
−0.3
−2.0
−2.0
−0.3
−0.3
−0.3
−0.3
−0.3
−0.3
−0.3
−0.3
−3
0
−55
Rating
Max
+48.0
+48.0
+6.9
+48.0
+48.0
+6.9
VVCC
VVCC
VVCC
VVCC
+48.0
+6.9
+6.9
+0.3
0
3324 (*2)
+150
Unit
V
V
V
V
V
V
V
V
V
V
V
V
V
V
mA
mW
°C
*2: When the product is mounted on 76.2 mm × 114.3 mm, four-layer FR-4 board
Warning:
1. Semiconductor devices may be permanently damaged by application of stress (including, without limitation, voltage, current or
temperature) in excess of absolute maximum ratings. Do not exceed any of these ratings.
6. Recommended Operating Conditions
Parameter
Symbol
Power supply voltage (*1)
VVIN
Terminal voltage (*1)
Difference voltage(*1)
VBST
VLX1
VLX2
VFB
VMODE
VSYNC
VENA
VPG
VBST-LX1
VGND
IPG
CBST
CVCC
RRT
Condition
VIN pin
At start-up
After start-up
BST pin
LX1 pin
LX2 pin
FB pin
MODE pin
SYNC pin
ENA pin
PG pin
Between BST−LX1 pins
Between GND−PGND1 pins,Between GND−PGND2 pins
PG pin (sink current)
Between BST−LX1 pins
Between VCC−GND pins
Between RT−GND pins. When using internal clock
Min
5.0
2.5
0.0
−1.0
−1.0
0.0
0.0
0.0
0.0
0.0
0.0
−0.05
0
0.068
2.2
22
Value
Typ
12.0
12.0
−
+12.0
−
−
−
−
12.0
−
−
0.00
−
0.100
4.7
−
Max
42.0
42.0
47.5
+42.0
+5.5
5.5
5.5
5.5
42.0
5.5
5.5
+0.05
1
0.470
10.0
270
Unit
V
V
V
V
V
V
V
V
V
V
V
V
mA
µF
µF
kΩ
PG output current
BST capacitance
VCC capacitance
Timing resistance
Operating ambient
Ta
−
−40
+25
+125
°C
Temperature
*1: When PGND1 = PGND2 = GND = 0V
Warning:
1. The recommended operating conditions are required in order to ensure the normal operation of the semiconductor device. All of
the device's electrical characteristics are warranted when the device is operated under these conditions.
2. Any use of semiconductor devices will be under their recommended operating condition.
3. Operation under any conditions other than these conditions may adversely affect reliability of device and could result in device
failure.
4. No warranty is made with respect to any use, operating conditions or combinations not represented on this data sheet. If you
are considering application under any conditions other than listed herein, please contact sales representatives beforehand.
Document Number: 002-08496 Rev. *F
Page 7 of 19
S6BP202A
7. Electrical Characteristics
VIN=PVIN=12V, ENA=5V
(Unless specified otherwise, these are the electrical characteristics under the recommended operating environment.)
Parameter
VOUT output voltage
FB input resistance
Buck-boost
DC/DC
converter
Block
5V LDO block
VIN UVLO
block
VCC UVLO
block
ENA pin
Switching FET
on-resistance
switching FET
leakage current
Soft-start time
OSC block
PG block
(UVP, OVP)
Thermal
shutdown
block (TSD)
VVOUT
RFB
IVOUT = 0A, When VVOUT = 5.000
EN = 0V, Ta = +25°C
LX1 = −30 mA (Between PVIN−LX1)
LX1 = 30 mA (Between LX1−PGND1)
LX2 = −30 mA (Between VOUT−LX2)
LX2 = 30 mA (Between LX2−PGND2)
RHSIDEFET1
RLSIDEFET1
RHSIDEFET2
RLSIDEFET2
ILEAK
ILKPG
VOLPG
TPPG
At power shutdown
TRPG
TTSDH
At power good
−
TTSDL
Hysteresis
Current limit
VCC output voltage
VIN UVLO falling threshold
VIN UVLO rising threshold
VCC UVLO falling threshold
VCC UVLO rising threshold
ILIMT
VVCC
Enable condition
MODE input voltage
MODE Input current
Switching frequency
(SYNC output frequency)
VUVLOVINHL
VUVLOVINLH
VUVLOVCCHL
VUVLOVCCLH
VENA
VDSB
IENA
VMODE_L
VMODE_H
IMODE
FOSC
SYNC input frequency
SYNC input duty ratio
VSYNC_L
VSYNC_H
VSYNC_L
VSYNC_H
SYNC leakage current
ILKSYNC
VOUT UVP falling
threshold
PGUVPHL
VOUT UVP rising threshold
PGUVPLH
VOUT OVP rising
threshold
VOUT OVP falling
threshold
Leak current
Low level output voltage
Delay time
at abnormal detection
Power-on reset time
Shutdown temperature
Shutdown current
−
RRT = 22 kΩ
PVIN ≥ 7.5V, Ta = 25 °C
PVIN = 4.5V, Ta = 25 °C
PVIN = 12V, L = 2.2 µH
VIN = 12V
VIN input voltage when falling
VIN input voltage when rising
VCC input voltage when falling
VCC input voltage when rising
Enable voltage range
Disable voltage range
VENA = 12V
Automatic PWM/PFM switching
Fixed PWM operation
MODE = 5.0V
RRT = 22kΩ
RRT = 270kΩ
When selecting SYNC_IN
When selecting SYNC_IN
When selecting SYNC_IN
When selecting SYNC_IN
VSYNC = 5.0V, When selecting
SYNC_IN
Falling threshold for VOUT output
voltage setting
Rising threshold for VOUT output
voltage setting
Rising threshold for VOUT output
voltage setting
Falling threshold for VOUT output
voltage setting
VPWRGD = 5.0V, VENA = 0V
IPGSINK = 1 mA
TSS
IVOUT
SYNC input threshold
SYNC block
(SYNC_IN)
Condition
Maximum output current
ENA input current
MODE pin
Symbol
PGOVPLH
PGOVPHL
VIN input current, VENA = 0V
Supply
VIN input current, VENA = 12V,
current
Quiescent current
IVOUT = 0A,
IVINQ
MODE/SYNC/PG Pins = OPEN
*1: The electrical characteristic is ensured by statistical characterization and indirect tests.
Document Number: 002-08496 Rev. *F
IVINSDN
Min
4.925
3.84
−
−
−
−
Value
Typ
5.000
4.80
150
150
150
150
Max
5.075
5.76
−
−
−
−
−
−
5
0.855
2.4 (*1)
1.0 (*1)
2.4 (*1)
4.9
2.30
4.55
2.30
4.55
1.10
0.0
−
0.0
2.0
−
2.0
180
0.0
2.0
200
+20
0.9
−
−
−
5.0
2.40
4.75
2.40
4.75
−
−
1
−
−
5
2.1
200
−
−
−
+50
−
5
10
µA
90.5
92.0
93.5
%
91.5
93.0
94.5
%
106.5
108.0
109.5
%
105.5
107.0
108.5
%
0
0.025
−
0.05
1
0.15
µA
V
−
7(*1)
12(*1)
µs
9.1
−
Unit
V
MΩ
mΩ
mΩ
mΩ
mΩ
µA
0.945 ms
−
A
−
A
−
A
5.1
V
2.50
V
4.95
V
2.50
V
4.95
V
VVIN
V
0.2
V
3
µA
0.4
V
VVOUT
V
10
µA
2.2 MHz
220 kHz
0.4
V
VVOUT
V
400 kHz
+80
%
14.0
18.9
165 (*1) −
ms
°C
−
10 (*1)
−
°C
−
1
5
µA
−
20
40
µA
Page 8 of 19
S6BP202A
8. Functional Description
8.1
Block Description
Input Under Voltage Lockout (Input UVLO)
The input UVLO is the function that prevents a malfunction of this IC from the following status, and protects poststage devices.
Transitional
state at start-up
drop of power supply voltage
To prevent such a malfunction, this protection monitors the VIN input voltage and VCC voltage. When either VIN or VCC voltage falls
to the UVLO falling threshold, 2.4V (Typ), or lower, the IC stops the VOUT voltage output and becomes UVLO status. When both VIN
and VCC voltages reach the UVLO rising threshold, 4.75V (Typ), or higher, the IC is released from the UVLO state and returns to the
normal operation.
Momentary
Output Under Voltage Protection (Output UVP)
The output UVP is the function that monitors the voltage drop of the VOUT pin and notifies by the PG pin.
When the output voltage falls to the UVP falling threshold (PGUVPHL) for the output voltage setting or lower, the PG voltage is fixed to
the low level. The IC becomes the UVP status, but the switching operation is maintained under the UVP status.
When the output voltage once again reaches the UVP rising threshold (PGUVPLH) for the output voltage setting or higher, the IC is
released from the UVP state and the PG voltage is fixed to the high level.
Output Over Voltage Protection (Output OVP)
The output OVP is the function that monitors the voltage rise of the VOUT pin and stops the switching operations, which protects
poststage devices from overvoltage. Also, the VOUT state is notified by the PG pin.
When the output voltage rises to the OVP falling threshold (PGOVPLH) for the output voltage setting or higher, the PG voltage is fixed
to the low level. The IC becomes the OVP status, and the switching operations of the high-Side FETs are stopped. When the output
voltage once again falls to the OVP falling threshold (PGOVPHL) for the output voltage setting or lower, the IC is released from the
OVP state and resumes the switching operations. The PG voltage is fixed to the high level again.
Output Over Current Protection (Output OCP)
The output OCP is the function that limits the excessive current load and protects poststage devices.
Thermal Shutdown (TSD)
The TSD is the function that protects the IC from heat-destruction. When the junction temperature reaches +165°C (Typ), the highside and low-side switching FET are turned off and the IC becomes the TSD status. When the junction temperature once again falls
to +155°C (Typ) or lower, the IC is released from the TSD state and restarts the power supply.
Document Number: 002-08496 Rev. *F
Page 9 of 19
S6BP202A
8.2
Protection Function Table
The following table shows the state of each pin when each protection function operates.
Table 8-1 Protection Function Table
Function
Shutdown operation
ENA Pin
Setting
L
PG Pin
Output
Hi-Z (*1)
DC/DC
Converter
Operation
Shutdown
Remarks
It is recommended to connect PG pin to VCC pin or VOUT
pin via a pull-up resistor.
When setting ENA pin to a low level, Both VCC pin and
VOUT pin voltages drop to 0V. Therefore, PG pin outputs
0V.
−
After releasing UVLO state, this IC is automatically reset
with soft start.
Nominal operation
H
Hi-Z (*1) Switching
Input under voltage protection
H
L
Shutdown
(Input UVLO)
Output under voltage
protection
H
L
Switching
−
(Output UVP)
Output over voltage protection
H
L
Shutdown
−
(Output OVP)
Output over current protection
OCP operates to drop the output voltage.
H
L
Switching
(Output OCP)
Thermal shutdown
After releasing TSD state, this IC is automatically reset
H
L
Shutdown
(TSD)
with soft start.
*1: PG pin is formed as an open drain structure. The internal MOSFET is in the OFF state.
Document Number: 002-08496 Rev. *F
Page 10 of 19
S6BP202A
9. Application Circuit Example and Parts list
Figure 9-1 Application Circuit Example
VIN
CVIN
0.1 μF
VIN 5
VCC
CVCC
VCC 8
VOUT
4.7 μF
MODE
S6BP202A
FB 13
CPVIN
10 μF
4 BST
CBST
0.1 μF
2 LX1
LLX
2.2 μH
MODE 7
15 LX2
SYNC
SYNC 11
14 VOUT
ENA
ENA 6
RT 12
RRT
22 kΩ
VIN
3 PVIN
VOUT
VOUT
CVOUT_1
22 μF
CVOUT_2
22 μF
1 PGND1
GND 9
16 PGND2
GND EP
10 PG
RPG
1 MΩ
VCC or VOUT
PG
FOSC = 2.1 MHz
When selecting “VOUT output voltage = 5.0V”
Table 9-1 Parts List
Symbo
Item
l
CVIN,
Ceramic
CBST
capacitor
Ceramic
CPVIN
capacitor
Ceramic
CVCC
capacitor
CVOUT_1
Ceramic
,
capacitor
CVOUT_2
LLX
Inductor
RRT
Resistor
RPG
Resistor
TDK: TDK Corporation
KOA: KOA Corporation
Vendor
Package Size
(W×L×H[mm])
0.1 μF CGA2B3X7R1H104K050BB
TDK
1.0×0.5×0.5
X7R, Rated voltage: 50 Vdc
CGA9N3X7R1H106K230KB
TDK
5.7×5.0×2.3
X7R, Rated voltage: 50 Vdc
4.7 μF CGA4J3X7R1C475K125AB
TDK
2.0×1.25×1.25
X7R, Rated voltage: 16 Vdc
TDK
3.2×2.5×2.5
X7R, Rated voltage: 16 Vdc
TDK
KOA
KOA
7.2×6.9×4.5
0.8×1.6×0.45
0.8×1.6×0.45
DCR: 14.6 mΩ, IDC_MAX: 5.5A
−
−
Value
10 μF
22 μF
Part Number
CGA6P1X7R1C226M250AC
2.2 μH CLF7045T-2R2N-D
22 kΩ RK73H1JTTD2202F
1 MΩ RK73H1JTTD1004F
Document Number: 002-08496 Rev. *F
Remarks
Page 11 of 19
S6BP202A
10. Application Note
10.1 Setting the Operation Conditions
Operation State of DC/DC Convertor When Selecting SYNC_IN
The operation stage of DC/CD converter is set by both MODE pin and SYNC pin.
Table 10-1 Operation State of DC/DC Convertor When Selecting SYNC_IN
MODE Pin SYNC Pin (Signal Input)
Operation State of DC/DC Convertor
Automatic PWM/PFM switching operation from an internal clock
L (*3)
Fixed PWM operation with synchronizing signal from an external clock (*2)
L (*3)
External clock input (*5)
Prohibition of use (*1)
H (*4)
Fixed PWM operation from an internal clock
L (*3)
Fixed PWM operation with synchronizing signal from an external clock (*2)
H (*4)
External clock input (*5)
Prohibition of use (*1)
H (*4)
*1: When selecting SYNC_IN and setting SYNC pin to a high level, the quiescent current (IVINQ) is increased.
*2: Set the timing resistance (RRT) to 330 kΩ.
*3: Apply the GND1 or GND2 voltage.
*4: Apply the VOUT voltage.
*5: Apply the VOUT voltage at a high level. Apply the GND1 or GND2 voltage at a low level
Setting of Switching Frequency (Internal Clock)
The switching frequency (internal clock) can be set by RT resistor, which value is the timing resistance (RRT), connected to RT pin.
Set the timing resistance in a range within the following graph
Figure 10-1 FOSC vs RRT Measured Characteristic
FOSC vs RRT Measured Characteristic
2.5
FOSC [MHz]
2.0
1.5
1.0
0.5
0.0
0
100
200
RRT [kΩ]
300
400
S6BP202AGraph001
Document Number: 002-08496 Rev. *F
Page 12 of 19
S6BP202A
The reference value can be calculated by the following formula.
FOSC [Hz] ≈
1
R RT × 21.7 × 10−12
FOSC
: Switching frequency [Hz]
RRT
: Timing resistance [Ω]
Setting of Soft-start Time
The Soft-start time is determined by the timing resistance (RRT), the value of the resistor connected to RT pin.
TSS [s] =
1
× 2 × 1024
FOSC
TSS
: Soft-start time [s]
FOSC
: Switching frequency [Hz]
Consideration of VOUT Maximum Output Current
Make sure the VOUT maximum output current in a range within the following graph.
Figure 10-2 IVOUT vs VVIN
IVOUT vs VVIN
3.0
Ta=+25oC, FOSC=2.1MHz
Ta=+125oC, FOSC=2.1MHz
2.5
IVOUT [A]
2.0
1.5
1.0
0.5
0.0
0
1
2
3
4
5 6 7
VVIN [V]
8
9 10 11 12
S6BP202AGraph002
Document Number: 002-08496 Rev. *F
Page 13 of 19
S6BP202A
11. Reference Data
The followings are the reference data measured under the conditions shown in ”9. Application Circuit Example and Parts list”.
Efficiency (Fixed PWM)
100
100
VVIN = 12 V
VVIN = 2.5 V
VVIN = 4.5 V
90
80
70
70
60
50
VVIN = 42 V
40
50
40
30
20
20
10
10
0.01
0.1
Load Current [A]
1
VVIN = 2.5 V
VVIN = 4.5 V
VVIN = 12 V
VVIN = 42 V
60
30
0
0.001
VVOUT = 5 V, FOSC = 2.1 MHz set, TA = +25oC,
LLX = 2.2 µH, CVOUT_1 = CVOUT_2 = 22 µF
90
80
Efficiency [%]
Efficiency [%]
Efficiency (Automatic PWM/PFM)
VVOUT = 5 V, FOSC = 2.1 MHz set, TA = +25oC,
LLX = 2.2 µH, CVOUT_1 = CVOUT_2 = 22 µF
0
0.001
3
0.01
0.1
Load Current [A]
S6BP202AGraph004-1
Load Regulation (Fixed PWM)
Line Regulation (Fixed PWM)
VVIN = 12V, VVOUT = 5 V, FOSC = 2.1 MHz set,
LLX = 2.2 µH, CVOUT_1 = CVOUT_2 = 22 µF
VVOUT = 5 V, FOSC = 2.1 MHz set,
LLX = 2.2 µH, CVOUT_1 = CVOUT_2 = 22 µF
5.06
5.06
5.04
5.04
5.02
TA = +125 C
TA = +25 oC
5.00
VVOUT = 5 V, Load Current = 0 A, FOSC = 2.1 MHz set,
LLX = 2.2 µH, CVOUT_1 = CVOUT_2 = 22 µF
100
TA = +125 oC,
Load Current = 1.5 A
5.00
o
TA = +25 C,
Load Current = 2.4 A
80
60
TA = +125oC
TA = +25oC
40
4.96
TA = －40 oC
o
4.94
4.94
4.92
0
4.92
0
0.5
140
120
4.98
4.98
4.96
IVINQ vs VVIN (Automatic PWM/PFM)
5.02
o
VVOUT [V]
VVOUT [V]
5.08
3
S6BP202AGraph004-2
IVINQ [µA]
5.08
1
1.0
1.5
Load Current [A]
2.0
2.5
TA = －40 C,
Load Current = 2.4 A
20
TA = －40oC
5
10
15
20 25
VVIN [V]
30
S6BP202AGraph005
35
40
45
0
0
5
10
15
20 25
VVIN [V]
30
Turn On Response
Turn Off Response
VVIN = 12 V, VVOUT = 5 V, Load Current = 0 A, FOSC = 2.1 MHz set,
TA = +25oC, LLX = 2.2 µH, CVOUT_1 = CVOUT_2 = 22 µF
VVIN = 12 V, VVOUT = 5 V, Load Current = 0 A, FOSC = 2.1 MHz set,
TA = +25oC, LLX = 2.2 µH, CVOUT_1 = CVOUT_2 = 22 µF
Automatic PWM/PFM
Automatic PWM/PFM
ENA
5 V/div
ENA
5 V/div
VOUT
5 V/div
VOUT
5 V/div
LX1
2 A/div
LX1
2 A/div
PG
5 V/div
PG
5 V/div
VCC
5 V/div
VCC
5 V/div
2 ms/div
S6BP202AGraph009-1
Document Number: 002-08496 Rev. *F
40
45
S6BP202AGraph008-1
S6BP202AGraph006
2 ms/div
35
S6BP202AGraph009-2
Page 14 of 19
S6BP202A
Load Transient Response
Load Transient Response
VVIN = 12 V, VVOUT = 5 V, FOSC = 2.1 MHz set, TA = +25oC,
LLX = 2.2 µH, CVOUT_1 = CVOUT_2 = 22 µF
VVIN = 12 V, VVOUT = 5 V, FOSC = 2.1 MHz set, TA = +25oC,
LLX = 2.2 µH, CVOUT_1 = CVOUT_2 = 22 µF
Automatic PWM/PFM
Automatic PWM/PFM
VOUT
200 mV/div
VOUT
200 mV/div
AC-Coupled
AC-Coupled
Load
Current
1 A/div
Load
Current
1 A/div
0A
2.4 A
/ 10 µs
PG
5 V/div
2.4 A
/ 10 µs
0A
PG
5 V/div
200 µs/div
200 µs/div
S6BP202AGraph010-1
S6BP202AGraph010-2
Cold Crank Line Transient Response
Load Dump Line Transient Response
VVOUT = 5 V, Load Current = 0.2 A, FOSC = 2.1 MHz set, TA = +25oC,
LLX = 2.2 µH, CVOUT_1 = CVOUT_2 = 22 µF
VVOUT = 5 V, Load Current = 2.4 A, FOSC = 2.1 MHz set, TA = +25oC,
LLX = 2.2 µH, CVOUT_1 = CVOUT_2 = 22 µF
Automatic PWM/PFM
Automatic PWM/PFM
40 V
11 V
/ 1 ms
VIN
2 V/div
11 V
/ 1 ms
VIN
10 V/div
2.5 V
2.5 V
/ 1 ms
11 V
40 V
/ 1 ms
6V
VOUT
200 mV/div
VOUT
200 mV/div
AC-Coupled
AC-Coupled
PG
5 V/div
PG
5 V/div
4 ms/div
1 ms/div
S6BP202AGraph011-1
S6BP202AGraph011-2
Switching Waveform
Ripple Waveform
VVIN = 12 V, VVOUT = 5 V, Load Current = 2.4 A, FOSC = 2.1 MHz set,
TA = +25oC, LLX = 2.2 µH, CVOUT_1 = CVOUT_2 = 22 µF
VVIN = 12 V, VVOUT = 5 V, Load Current = 0 A, FOSC = 2.1 MHz set,
TA = +25oC, LLX = 2.2 µH, CVOUT_1 = CVOUT_2 = 22 µF
Automatic PWM/PFM
LX1
2 V/div
Automatic PWM/PFM
VOUT
50 mV/div
AC-Coupled
1 µs/div
10 ms/div
S6BP202AGraph012-1
Document Number: 002-08496 Rev. *F
S6BP202AGraph012-2
Page 15 of 19
S6BP202A
12. Usage Precaution
Printed circuit board ground lines should be set up with consideration for common impedance.
Take appropriate measures against static electricity.
Containers
for semiconductor materials should have anti−static protection or be made of conductive material.
mounting, printed circuit boards should be stored and shipped in conductive bags or containers.
Work platforms, tools, and instruments should be properly grounded.
Working personnel should be grounded with resistance of 250 kΩ to 1 MΩ in serial body and ground.
After
Do not apply negative voltages.
The use of negative voltages below −0.3 V may make the parasitic transistor activated to the LSI, and can cause malfunctions.
13. RoHS Compliance Information
This product has observed the standard of lead, cadmium, mercury, Hexavalent chromium, polybrominated biphenyls (PBB), and
polybrominated diphenyl ethers (PBDE).
14. Ordering Information
Table 14-1 Ordering Information
Order Code
Part Number (MPN)
S6BP202A1FST2B00A,
1F
S6BP202A1FST2B20A
MPN: Marketing Part Number
Package
Plastic ETSSOP16 (0.65 mm pitch), 16-pin
(Package Code: SEC016)
Figure 14-1 Ordering Part Number Definitions
S 6 B P 2 0 2 A XX S T 2 B X 0 A
Fixed on 0A
Packed number: 0 = 4000 pcs / Tape and Reel
2 = 200 pcs / Tape and Reel
Packing: B = 13 inch Tape and Reel
Package: T2 = ETSSOP, Pure Sn / Low-Halogen
Reliability Grade: S = 10 ppm
Preset Condition (Order Code): See Product Lineup
Revision: A = 1st Revision
Product ID: 02
Topology: 2 = Switch-Mode Power Supply (Integrated FET)
Product Type: P = Power Management IC
Product Class: 6B = Automotive Analog
Company ID: S = Cypress
Document Number: 002-08496 Rev. *F
Page 16 of 19
S6BP202A
15. Package Dimensions
Package Code: SEC016
002-10769 Rev. **
Document Number: 002-08496 Rev. *F
Page 17 of 19
S6BP202A
16. Major Changes
Spansion Publication Number: S6BP202A_DS405-00027
Page
Section
Preliminary 0.1
−
Preliminary 0.2
1
Change Results
Initial release
−
The sentences of the "Notice to Readers" were changed from "the contents of Full
Production" to "the contents of Preliminary".
Cover page
10. Electrical
"(TSD)" was added in the table of "10. Electrical Characteristics".
Characteristics
NOTE: Please see “Document History” about later revised information.
13
Document History
Document Title: S6BP202A, ASSP, 42V, 2.4A, Synchronous Buck-boost DC/DC Converter IC
Document Number: 002-08496
Submission
Revision
ECN
**
−
*A
5056149
Added Block Diagram
12/18/2015 Added Figure 15-1
Updated 16. Package Dimensions
*B
5164343
Added “AEC-Q100 compliant (Grade-1)” in Features
Added Figure 3-1 I/O Pin Equivalent Circuit Diagram
The followings in 7. Electrical Characteristics were updated.
The parameter name of IVOUT was changed from ”VOUT output voltage” to “Maximum
output current”
03/08/2016
The max values of IVOUT were moved to the min column.
Added 11. Development Support
Added 12. Reference Data
Deleted the ES part number from Table 15-1
*C
5839054
07/31/2017 Adapted Cypress new logo.
*D
5909405
Updated to the Cypress naming and format
Updated “TSSOP” → “ETSSOP” in Features, Table 14-1 and Figure 14-1
Updated 15 Package Dimensions
10/13/2017 Added More Information
Deleted “11. Development Support” (Moved to More Information)
Changed the suffix of the Part Number from “000” to “00A” in 1. Product Lineup Table 14-1
and Figure 14-1
*E
6409930
12/13/2018 No change; sunset review.
7022884
Updated Features and Block Diagram for orderable S6BP202A1F
Updated MPN in 1.Product Lineup, Table 14-1 Ordering Information and Figure 14-1
11/18/2020
Ordering Part Number Definitions.
Deleted “Operation State of DC/DC Convertor When Selecting SYNC_OUT”
*F
Date
Description of Change
09/04/2015 New Spec.
Document Number: 002-08496 Rev. *F
Page 18 of 19
S6BP202A
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Document Number: 002-08496 Rev. *F
November 18, 2020
Page 19 of 19
