CYStech Electronics Corp.
P-Channel Logic Level Enhancement Mode Power MOSFET
Spec. No. : C733J3 Issued Date : 2009.07.07 Revised Date : Page No. : 1/7
MTB90P06J3
Features
• Low Gate Charge • Simple Drive Requirement • Pb-free lead plating & Halogen-free package
BVDSS ID RDSON(MAX)
-60V -10A 90.8mΩ
Equivalent Circuit
MTB90P06J3
Outline
TO-252
G:Gate D:Drain S:Source
GDS
Absolute Maximum Ratings (TC=25°C, unless otherwise noted)
Parameter Symbol Limits Unit
Drain-Source Voltage Gate-Source Voltage Continuous Drain Current @ TC=25°C Continuous Drain Current @ TC=100°C Pulsed Drain Current *1 Avalanche Current Avalanche Energy @ L=0.1mH, ID=-10A, RG=25Ω Repetitive Avalanche Energy @ L=0.05mH *2 Total Power Dissipation @TC=25℃ Total Power Dissipation @TC=100℃ Operating Junction and Storage Temperature Range Note : *1. Pulse width limited by maximum junction temperature
*2. Duty cycle ≤ 1%
MTB90P06J3
VDS VGS ID ID IDM IAS EAS EAR Pd Tj, Tstg
-60 ±20 -10 -7 -40 -10 5 2 33 10 -55~+175
V
A
mJ W °C
CYStek Product Specification
CYStech Electronics Corp.
Thermal Data
Parameter Thermal Resistance, Junction-to-case, max Thermal Resistance, Junction-to-ambient, max Symbol Rth,j-c Rth,j-a
Spec. No. : C733J3 Issued Date : 2009.07.07 Revised Date : Page No. : 2/7
Value 4.5 85
Unit °C/W °C/W
Characteristics (Tc=25°C, unless otherwise specified)
Symbol Static BVDSS VGS(th) IGSS IDSS ID(ON) RDS(ON)
*1 *1
Min. -60 -1 -10 -
Typ. -1.8 82 120 9 16.2 2 3.5 8 12 20 12 1980 665 645 6.8 12 9
Max. -3 ±100 -1 -25 90.8 140 -10 -40 -1.3 -
Unit V V nA μA μA A mΩ mΩ S nC
Test Conditions VGS=0, ID=-250μA VDS =VGS, ID=-250μA VGS=±20, VDS=0 VDS =-32V, VGS =0 VDS =-30V, VGS =0, TJ=125°C VDS =-5V, VGS =-4.5V VGS =-10V, ID=-10A VGS =-5V, ID=-8A VDS =-5V, ID=-10A ID=-10A, VDS=-30V, VGS=-10V VDS=-10V, ID=-1A, VGS=-10V, RG=6Ω
GFS *1 Dynamic Qg *1, 2 Qgs *1, 2 Qgd *1, 2 td(ON) *1, 2 tr *1, 2 td(OFF) *1, 2 tf *1, 2 Ciss Coss Crss Rg Source-Drain Diode IS *1 ISM *3 VSD *1 trr Qrr
ns
pF Ω A V ns nC
VGS=0V, VDS=-25V, f=1MHz VGS=15mV, VDS=0, f=1MHz
IF=IS, VGS=0V IF=-5A, dIF/dt=100A/μs
Note : *1.Pulse Test : Pulse Width ≤300μs, Duty Cycle≤2% *2.Independent of operating temperature *3.Pulse width limited by maximum junction temperature.
Ordering Information
Package Shipping TO-252 MTB90P06J3 2500 pcs / Tape & Reel (Pb-free lead plating & Halogen-free package)
MTB90P06J3
Device
Marking B90P06
CYStek Product Specification
CYStech Electronics Corp.
Characteristic Curves
Spec. No. : C733J3 Issued Date : 2009.07.07 Revised Date : Page No. : 3/7
MTB90P06J3
CYStek Product Specification
CYStech Electronics Corp.
Characteristic Curves(Cont.)
Spec. No. : C733J3 Issued Date : 2009.07.07 Revised Date : Page No. : 4/7
MTB90P06J3
CYStek Product Specification
CYStech Electronics Corp.
Reel Dimension
Spec. No. : C733J3 Issued Date : 2009.07.07 Revised Date : Page No. : 5/7
Carrier Tape Dimension
MTB90P06J3
CYStek Product Specification
CYStech Electronics Corp.
Recommended wave soldering condition
Product Pb-free devices Peak Temperature 260 +0/-5 °C
Spec. No. : C733J3 Issued Date : 2009.07.07 Revised Date : Page No. : 6/7
Soldering Time 5 +1/-1 seconds
Recommended temperature profile for IR reflow
Profile feature Sn-Pb eutectic Assembly Average ramp-up rate 3°C/second max. (Tsmax to Tp) Preheat 100°C −Temperature Min(TS min) −Temperature Max(TS max) 150°C −Time(ts min to ts max) 60-120 seconds Time maintained above: −Temperature (TL) 183°C − Time (tL) 60-150 seconds Peak Temperature(TP) 240 +0/-5 °C Time within 5°C of actual peak 10-30 seconds temperature(tp) Ramp down rate 6°C/second max. 6 minutes max. Time 25 °C to peak temperature
Pb-free Assembly 3°C/second max. 150°C 200°C 60-180 seconds 217°C 60-150 seconds 260 +0/-5 °C 20-40 seconds 6°C/second max. 8 minutes max.
Note : All temperatures refer to topside of the package, measured on the package body surface.
MTB90P06J3
CYStek Product Specification
CYStech Electronics Corp.
TO-252 Dimension
Marking:
Spec. No. : C733J3 Issued Date : 2009.07.07 Revised Date : Page No. : 7/7
Device Name Date code
Style: Pin 1.Gate 2.Drain 3.Source
3-Lead TO-252 Plastic Surface Mount Package CYStek Package Code: J3
DIM A A1 B B1 B2 C D D2 D3
Inches Min. Max. 0.0827 0.0984 0.0374 0.0512 0.0118 0.0335 0.0157 0.0370 0.0236 0.0394 0.0157 0.0236 0.2087 0.2441 0.2638 0.2874 0.0866 0.1181
Millimeters Min. Max. 2.10 2.50 0.95 1.30 0.30 0.85 0.40 0.94 0.60 1.00 0.40 0.60 5.30 6.20 6.70 7.30 2.20 3.00
DIM E E2 H L L1 L2 L3 P
Inches Min. Max. 0.2520 0.2638 0.1890 0.2146 0.3622 0.3996 0.0350 0.0669 0.0354 0.0650 0.0197 0.0433 0.0000 0.0118 0.0827 0.0984
Millimeters Min. Max. 6.40 6.70 4.80 5.45 9.20 10.15 0.89 1.70 0.90 1.65 0.50 1.10 0.00 0.30 2.10 2.50
Notes: 1.Controlling dimension: millimeters.
2.Maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material. 3.If there is any question with packing specification or packing method, please contact your local CYStek sales office.
Material:
• Lead : KFC; pure tin plated • Mold Compound: Epoxy resin family, flammability solid burning class: UL94V-0
Important Notice:
• All rights are reserved. Reproduction in whole or in part is prohibited without the prior written approval of CYStek. • CYStek reserves the right to make changes to its products without notice. • CYStek semiconductor products are not warranted to be suitable for use in Life-Support Applications, or systems. • CYStek assumes no liability for any consequence of customer product design, infringement of patents, or application assistance.
MTB90P06J3
CYStek Product Specification