73S8009C
Versatile Power Management
and Smart Card Interface IC
DATA SHEET
Simplifying System Integration™
DS_8009C_025
February 2010
DESCRIPTION
The Teridian 73S8009C is a versatile power
management and single smart card interface circuit
that is ideally suited for smart card reader products
that are battery and/or USB bus-powered. In
addition to its EMV 4.1 and ISO-7816-3 compliant
smart card-to-host interface circuitry; it provides
control, conversion, and regulation of power for a
companion host processor circuit and power for the
smart card. The 73S8009C can operate from a
single 2.7 V to 6.5 V source supply, or a
combination of battery power (4.0 V to 6.5 V) and
USB power (4.4 V to 5.5 V).
The 73S8009C supports 5 V, 3 V, and 1.8 V smart
cards. The smart card signals for RST, CLK, IO,
and auxiliary signals AUX1 and AUX2 are
level-shifted to the selected VCC value. Although
the host controller is required to handle the
detailed signal timing for activation and deactivation under normal conditions, the 73S8009C
blocks any spurious signals on CLK, RST and IO
during power-up (as VCC rises) and power-down.
The 73S8009C contains two handshaking signals
for the controller: OFF indicates that a card is
present, and RDY indicates that VCC is at an
acceptable value. The 73S8009C will perform
emergency deactivation upon card removal,
voltage faults, or over-current events
The power management circuitry of the 73S8009C
allows operation from a wide range of voltages
from multiple sources. VPC is converted by using
an inductive, step-up power converter to the
intermediate voltage, VP. VP is used by linear
voltage regulators and switches to create the
voltages VDD and as required, VCC. VDD is used by
the 73S8009C and is also made available for the
companion controller circuit or other external
circuits. The VBAT and VBUS pins provide inputs
from alternate power sources as required. An
internal switch in the 73S8009C acts as a
single-pole, double-throw switch that selects either
VBAT or VBUS to be connected to VPC. When the
voltage on VBUS is zero, VBAT is connected to VPC.
When voltage is applied to VBUS, the switch selects
VBUS as the source for power.
Rev. 1.5
When power is supplied by VPC or VBAT , the
73S8009C is controlled by the ON_OFF pin in the
manner of a “push-on/push-off” button action. The
OFF_REQ and OFF_ACK signals provide
handshaking and control of the power “off”
function by the controller. A SPST momentary
switch to ground connected to ON_OFF is all that
is required for power control. Alternatively, the
“off” state can be initiated from the host controller
through OFF_ACK. When the 73S8009C is “off,”
the current is less than 1 µA.
When power is supplied via the VBUS pin, the
73S8009C is unconditionally in the “power-on”
state regardless of the action of the ON/OFF
switch or OFF_ACK signal. Power supply current
operating from the VBUS power when VCC is off is
less than 500 µA to conform to USB “SUSPEND”
requirements.
APPLICATIONS
•
•
•
Handheld PINpad smart card readers for
e-commerce, secure login, e-health, Gov’t ID
and loyalty
Point of Sales & Transaction Terminals
General Purpose Smart Card Readers
ADVANTAGES
•
Ideally suited to USB bus-powered
applications
Ideal for combo bus-powered and/or
self-powered systems
Automatic battery switchover in bus
powered systems
•
Very low-power mode (sub-µA) with
push-button ON/OFF switch input with
de-bounce
•
Provides 3.3 V / 40 mA power to external
circuitry (host processor or peripheral circuits)
•
The inductor-based DC-DC converter provides
higher current and efficiency than usual
charge-pump capacitor-based converters:
Ideal for battery-powered applications
© 2010 Teridian Semiconductor Corporation
1
73S8009C Data Sheet
DS_8009C_025
FEATURES
•
•
Smart card Interface:
• Complies with ISO-7816-3 and EMV 4.1
and derivative standards
• A DC-DC Converter provides 1.8 V/3 V/5 V
to the card from a wide range of external
power supply inputs
• Provides up to 65 mA to the card
• ISO-7816-3 Card emergency deactivation
sequencer
• 2 voltage supervisors detect voltage drops
on the VCC (card) and VDD (digital) power
supplies
• Card over-current detection 150 mA max.
• 2 card detection inputs, 1 for either user
polarity
• Auxiliary I/O lines for synchronous and
ISO-7816-12 USB card support
•
•
Power Supply Output:
• VDD supply output available to power up
external circuitry: 3.3 V ±0.3 V, 40 mA
• Card CLK clock frequency up to 20 MHz
• 6 kV ESD and short circuit protection on
the card interface
•
Industrial temperature range
•
Small format QFN package
•
RoHS compliant (6/6) lead-free package
System Controller Interface:
• 5 Signal images of the card signals
(RSTIN, CLKIN, I/OUC, AUX1UC and
AUX2UC)
DC-DC Converter:
• Step-up converter
• Generates an intermediary voltage VP
• Requires a single 10 µH Inductor
•
System Power Supply requirements:
• When using VBUS: Standard USB +5
input (range +4.4 V to 5.5 V)
• When using VBAT : 4.0 V to 6.5 V
• When using VPC: 2.7 V to 6.5 V
• Automated detection of voltage presence Priority on VBUS over VBAT
• 2 Inputs activate and select the card
voltage (CMDVCC% and CMDVCC#)
• 2 Outputs, interrupt to the system controller
(OFF and RDY), to inform the system
controller of the card presence / faults and
status of the interface
• 1 Chip Select input
• 2 Handshaking signals for proper shutdown
sequencing of all output supply voltages
(OFF_REQ, OFF_ACK)
•
2
ON/OFF Main System Switch:
• Input for an SPST momentary switch to
ground
Rev. 1.5
73S8009C Data Sheet
DS_8009C_025
FUNCTIONAL DIAGRAM
CS
12
10
VBAT VBUS
VDD
TEST1 TEST2
30
25
29
23
15
vref
VOLTAGE
REFERENCE
24
ON_OFF
S2
S1
VPC
LIN
VPC FAULT
VCC OK
VCC = 5
CMDVCC5
5
VCC = 3
CMDVCC3
32
26
27
VCC FAULT
4
OFF
VP
bias currents
CONTROL
LOGIC
SWITCH/LDO
REGULATOR
17
GND
19
POWER DOWN
ON/OFF
VCC
8
RDY
OFF_REQ
OFF_ACK
RSTIN
CLKIN
11
RESET
BUFFER
18
CLOCK
BUFFER
16
RST
9
6
CLK
14
PRES
7
13
PRES
1.5MHz
R-C
OSC.
I/OUC
22
1
I/O
2
SMART CARD I/O BUFFERS
AND SIGNAL LOGIC
AUX1UC
3
AUX2UC
21
AUX1
20
AUX2
28
GND
Pin numbers reference the QFN32 package.
Figure 1: 73S8009C Block Diagram
Rev. 1.5
3
73S8009C Data Sheet
DS_8009C_025
Table of Contents
1
Pinout ............................................................................................................................................. 6
2
3
Electrical Specifications.............................................................................................................. 10
2.1 Absolute Maximum Ratings ................................................................................................... 10
2.2 Recommended Operating Conditions .................................................................................... 11
2.3 Smart Card Interface Requirements ...................................................................................... 11
2.4 Digital Signals Characteristics ............................................................................................... 14
2.5 DC Characteristics ................................................................................................................ 15
2.6 Voltage / Temperature Fault Detection Circuits...................................................................... 15
2.7 Thermal Characteristics ........................................................................................................ 15
Applications Information ............................................................................................................. 16
3.1 Example 73S8009C Schematics ........................................................................................... 16
3.2 Power Supply and Converter ................................................................................................. 18
3.3 Interface Function - ON/OFF Modes...................................................................................... 18
3.4 System Controller Interface ................................................................................................... 20
3.5 Card Power Supply and Voltage Supervision......................................................................... 20
3.6 Activation and De-activation Sequence ................................................................................. 21
3.7 OFF and Fault Detection ....................................................................................................... 22
3.8 Chip Selection ....................................................................................................................... 23
3.9 I/O Circuitry and Timing......................................................................................................... 24
4
Equivalent Circuits ...................................................................................................................... 26
5
Mechanical Drawing .................................................................................................................... 30
6
Ordering Information ................................................................................................................... 31
7
Related Documentation ............................................................................................................... 31
8
Contact Information..................................................................................................................... 31
4
Rev. 1.5
DS_8009C_025
73S8009C Data Sheet
Figures
Figure 1: 73S8009C Block Diagram ......................................................................................................... 3
Figure 2: 73S8009C 32-Pin QFN Pinout .................................................................................................. 6
Figure 3: Typical 73S8009C Application Schematic ............................................................................... 17
Figure 4: 73S8009C Logical Block Diagram ........................................................................................... 19
Figure 5: Activation Sequence ............................................................................................................... 21
Figure 6: Deactivation Sequence ........................................................................................................... 22
Figure 7: OFF Activity ............................................................................................................................ 22
Figure 8: CS Timing Definitions.............................................................................................................. 23
Figure 9: I/O and I/OUC State Diagram .................................................................................................. 24
Figure 10: I/O – I/OUC Delays - Timing Diagram.................................................................................... 25
Figure 11: On_Off Pin ............................................................................................................................ 26
Figure 12: Open Drain type – OFF and RDY .......................................................................................... 26
Figure 13: Power Input/Output Circuit, VDD, LIN, VPC, VCC, VP ........................................................... 26
Figure 14: Smart Card CLK Driver Circuit .............................................................................................. 27
Figure 15: Smart Card RST Driver Circuit .............................................................................................. 27
Figure 16: Smart Card IO, AUX1, and AUX2 Interface Circuit................................................................. 28
Figure 17: Smart Card I/OUC, AUX1UC and AUX2UC Interface Circuit.................................................. 28
Figure 18: General Input Circuit ............................................................................................................. 29
Figure 19: OFF_REQ Interface Circuit ................................................................................................... 29
Figure 20: 32-Pin QFN Package Dimensions ......................................................................................... 30
Tables
Table 1: 73S8009C Pin Definitions .......................................................................................................... 7
Table 2: Absolute Maximum Device Ratings .......................................................................................... 10
Table 3: Recommended Operating Conditions ....................................................................................... 11
Table 4: DC Smart Card Interface Requirements ................................................................................... 11
Table 5: Digital Signals Characteristics .................................................................................................. 14
Table 6: DC Characteristics ................................................................................................................... 15
Table 7: Voltage / Temperature Fault Detection Circuits......................................................................... 15
Table 8: Thermal Characteristics ........................................................................................................... 15
Table 9: Order Numbers and Packaging Marks ...................................................................................... 31
Rev. 1.5
5
73S8009C Data Sheet
DS_8009C_025
1 Pinout
OFF
GND
TEST2
VDD
GND
LIN
VPC
VBAT
32
31
30
29
28
27
26
25
The 73S8009C is supplied as a 32-pin QFN package.
I/OUC
1
24
ON_OFF
AUX1UC
2
23
VBUS
AUX2UC
3
22
I/O
CMDVCC5
4
21
AUX1
CMDVCC3
5
20
AUX2
RSTIN
6
19
VCC
CLKIN
7
18
RST
RDY
8
17
GND
9
10
11
12
13
14
15
16
OFF_ACK
TEST1
OFF_REQ
CS
PRES
PRES
VP
CLK
TERIDIAN
73S8009C
Figure 2: 73S8009C 32-Pin QFN Pinout
6
Rev. 1.5
DS_8009C_025
73S8009C Data Sheet
Table 1 describes the pin functions for the device.
Table 1: 73S8009C Pin Definitions
Pin
Name
Pin
(QFN32)
Type
Equivalent
Circuit
Description
Card Interface
I/O
22
IO
Figure 16
Card I/O: Data signal to/from card. Includes a pull-up
resistor to VCC.
AUX1
21
IO
Figure 16
AUX1: Auxiliary data signal to/from card. Includes a
pull-up resistor to VCC.
AUX2
20
IO
Figure 16
AUX2: Auxiliary data signal to/from card. Includes a
pull-up resistor to VCC.
RST
18
O
Figure 15
Card reset: provides reset (RST) signal to card. RST is
the pass through signal on RSTIN. Internal control logic
will hold RST low when card is not activated or VCC is
too low.
CLK
16
O
Figure 14
Card clock: provides clock signal (CLK) to card. CLK is
the pass through of the signal on pin CLKIN. Internal
control logic will hold CLK low when card is not
activated or VCC is too low.
PRES
14
I
Figure 18
Card Presence switch: active high indicates card is
present. Should be tied to GND when not used, but it
Includes a high-impedance pull-down current source.
PRES
13
I
Figure 18
Card Presence switch: active low indicates card is
present. Should be tied to VDD when not used, but it
Includes a high-impedance pull-up current source.
VCC
19
PSO
Figure 13
Card power supply – logically controlled by sequencer,
output of LDO regulator. Requires an external 0.47 µF
low ESR filter capacitor to GND.
GND
17
GND
–
Card ground.
Miscellaneous Inputs and Outputs
CLKIN
7
10
I
–
Figure 18
–
TEST1
TEST2
30
–
–
Clock signal source for the card clock.
Factory test pin. This pin must be tied to GND in
typical applications.
Factory test pin. This pin must be tied to GND in
typical applications.
Power Supply and Ground
VDD
29
PSO
Figure 13
System interface supply voltage and supply voltage for
companion controller circuitry. Requires a minimum of
two 0.1 µF capacitors to ground for proper decoupling.
VPC
26
PSI
Figure 13
Power supply source for main voltage converter circuit.
A 10 µF and a 0.1 µF ceramic capacitor must be
connected to this pin.
VBAT
25
Rev. 1.5
Alternate power source input, typically from two series
cells, V > 4 V.
7
73S8009C Data Sheet
DS_8009C_025
Pin
Name
Pin
(QFN32)
VBUS
23
LIN
27
PSI
Figure 13
Connection to 10 µH inductor for internal step up
converter. Note: inductor must be rated for 400 mA
maximum peak current.
VP
15
PSO
Figure 13
Intermediate output of main converter circuit. Requires
an external 4.7 µF low ESR filter capacitor to GND.
GND
Type
Equivalent
Circuit
Description
Alternate power source input from USB connector or
hub.
28,31
–
Ground.
Microcontroller Interface
CS
12
I
Figure 18
When CS = 1, the control and signal pins are configured
normally. When CS is set low, CMDVCC%, RSTIN, and
CMDVCC# are latched. I/OUC, AUX1UC, and
AUX2UC are set to high-impedance pull-up mode and
do not pass data to or from the smart card. Signals
RDY and OFF are disabled to prevent a low output and
the internal pull-up resistors are disconnected.
OFF
32
O
Figure 12
Interrupt signal to the processor. Active Low - Multifunction indicating fault conditions and card presence.
Open drain output configuration – It includes an internal
20 kΩ pull-up to VDD. Pull-up is disabled in Power down
state and CS = 0 modes.
I/OUC
1
IO
Figure 17
System controller data I/O to/from the card. Includes a
pull-up resistor to VDD.
AUX1UC
2
IO
Figure 17
System controller auxiliary data I/O to/from the card.
Includes a pull-up resistor to VDD.
AUX2UC
3
IO
Figure 17
System controller auxiliary data I/O to/from the card.
Includes a pull-up resistor to VDD.
CMDVCC%
CMDVCC#
4
5
I
I
Figure 18
Logic low on one or both of these pins will cause the
LDO to ramp the Vcc supply to the smart card and
smart card interface to the value described in the
following table.
CMDVCC% CMDVCC# Vcc Output Voltage
0
0
1
1
0
1
0
1
1.8 V
5.0 V
3.0 V
LDO Off
Note: See the description of the Card Power Supply for
more detail on the operation of CMDVCC% and
CMDVCC#.
RSTIN
6
RDY
8
8
I
Figure 18
Reset Input: This signal is the reset command to the
card.
Figure 12
Signal to controller indicating the 73S8009C is ready
because VCC is above the required value after
CMDVCC% and/or CMDVCC# is asserted low. A 20 kΩ
pull-up resistor to VDD is provided internally. Pull-up is
disabled in Power down state and CS=0 modes.
Rev. 1.5
DS_8009C_025
Pin
Name
73S8009C Data Sheet
Pin
(QFN32)
Type
Equivalent
Circuit
ON_OFF
24
I
Figure 11
Power control pin. Connected to normally open SPST
switch to ground. Closing switch for duration greater
than de-bounce period will turn 73S8009C circuit “on.”
If 73S8009C is “on,” closing switch will turn 73S8009C
to “off” state after the de-bounce period and
OFF_REQ/OFF_ACK handshake.
OFF_REQ
11
O
Figure 19
Digital output. Request to the host system controller to
turn the 73S8009C off. If ON_OFF switch is closed (to
ground) for de-bounce duration and circuit is “on,”
OFF_REQ will go high (Request to turn OFF).
Connected to OFF_ACK via 100 kΩ internal resistor.
OFF_ACK
9
I
Figure 18
Setting OFF_ACK high will power “off” all analog
functions and disconnect the 73S8009C from VBAT or
VPC. The pin has an internal 100 kΩ resistor
connection to OFF_REQ so that when not connected or
no host interaction is required, the Acknowledge will be
true and the circuit will turn “off” immediately with
OFF_REQ.
Rev. 1.5
Description
9
73S8009C Data Sheet
DS_8009C_025
2 Electrical Specifications
This section provides the following:
Absolute maximum ratings
Recommended operating conditions
Smart card interface requirements
Digital signals characteristics
Voltage / temperature fault detection circuits
Thermal characteristics
2.1
Absolute Maximum Ratings
Table 2 lists the maximum operating conditions for the 73S8009C. Permanent device damage may occur
if absolute maximum ratings are exceeded. Exposure to the extremes of the absolute maximum rating for
extended periods may affect device reliability. The smart card interface pins are protected against short
circuits to VCC, ground, and each other.
Table 2: Absolute Maximum Device Ratings
Parameter
Rating
Supply Voltage VBUS
-0.5 to 6.6 VDC
Supply Voltage VBAT
-0.5 to 6.6 VDC
Supply Voltage VPC
-0.5 to 6.6 VDC
VDD
-0.5 to 4.0 VDC
Input Voltage for Digital Inputs
-0.3 to (VDD +0.5) VDC
Storage Temperature
-60 to 150°C
Pin Voltage (except card interface)
-0.3 to (VDD + 0.5) VDC
Pin Voltage (card interface)
-0.3 to (VCC + 0.3) VDC
Pin Voltage, LIN pin
0.3 to 6.5 VDC
ESD Tolerance – Card interface pins
+/- 6 kV
ESD Tolerance – Other pins
+/- 2 kV
Pin Current, except LIN
± 200 mA
Pin Current, LIN
+ 500 mA in, -200 mA out
Note: ESD testing on smart card pins is HBM condition, 3 pulses, each polarity referenced to ground.
Note: Smart Card pins are protected against shorts between any combinations of Smart Card pins.
10
Rev. 1.5
DS_8009C_025
2.2
73S8009C Data Sheet
Recommended Operating Conditions
Function operation should be restricted to the recommended operating conditions specified in Table 3.
Table 3: Recommended Operating Conditions
Parameter
Rating
Supply voltage VPC
2.7 to 6.5 VDC
Supply Voltage VBUS
4.4 to 5.5 VDC
Supply Voltage VBAT
4.0 to 6.5 VDC
Ambient operating temperature
-40 °C to +85 °C
2.3
Smart Card Interface Requirements
Table 4 lists the 73S8009C Smart Card interface requirements.
Table 4: DC Smart Card Interface Requirements
Symbol Parameter
Condition
Card Power Supply (VCC) Regulator
General Conditions: -40C < 85C, 2.7 V < VPC < 6.6 V
Inactive mode
Inactive mode ICC = 1 mA
Active mode; ICC
