DS1543W-120

DS1543W-120

  • 厂商:

    AD(亚德诺)

  • 封装:

    DIP-28

  • 描述:

    IC RTC CLK/CALENDAR PAR 28-EDIP

  • 详情介绍
  • 数据手册
  • 价格&库存
DS1543W-120 数据手册
PRELIMINARY DS1543 64k NV Timekeeping RAM www.dalsemi.com FEATURES          PIN ASSIGNMENT Integrated NV SRAM, real time clock, crystal, power-fail control circuit and lithium energy source Clock registers are accessed identical to the static RAM. These registers are resident in the sixteen top RAM locations Totally nonvolatile with over 10 years of operation in the absence of power Precision Power-On Reset Programmable Watchdog Timer and RTC Alarm BCD coded year, month, date, day, hours, minutes, and seconds with automatic leap year compensation valid up to the year 2100 Battery voltage level indicator flag Power-fail write protection allows for ±10% Vcc power supply tolerance Lithium energy source is electrically disconnected to retain freshness until power is applied for the first time ORDERING INFORMATION DS1543-XXX *DS1543W-XXX (5V) -70 -100 70 ns access 100 ns access (3.3V) -120 120 ns access -150 150 ns access RST A12 A7 A6 A5 A4 A3 A2 A1 A0 DQ0 DQ1 DQ2 GND 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 VCC WE IRQ/FT A8 A9 A11 OE A10 CE DQ7 DQ6 DQ5 DQ4 DQ3 28-Pin Encapsulated Package (700 Mil Extended) PIN DESCRIPTION A0-A12 DQ0-DQ7 IRQ \FT RST CE OE WE VCC GND NC 1 of 17 - Address Input - Data Input/Outputs - Interrupt, Frequency Test Output (Open-Drain) - Power-On Reset Output (Open-Drain) - Chip Enable - Output Enable - Write Enable - Power Supply Input - Ground - No Connection 081000 DS1543 DESCRIPTION The DS1543 is a full-function real-time clock/calendar (RTC) with a RTC alarm, watchdog timer, poweron reset, battery monitor, and 8k x 8 non-volatile static RAM. User access to all registers within the DS1543 is accomplished with a bytewide interface as shown in Figure 1. The RTC registers contain year, month, date, day, hours, minutes, and seconds data in 24-hour BCD format. Corrections for day of month and leap year are made automatically. The RTC registers are double-buffered into an internal and external set. The user has direct access to the external set. Clock/calendar updates to the external set of registers can be disabled and enabled to allow the user to access static data. Assuming the internal oscillator is turned on, the internal set of registers are continuously updated; this occurs regardless of external registers settings to guarantee that accurate RTC information is always maintained. The DS1543 has interrupt ( IRQ /FT) and reset ( RST ) outputs which can be used to control CPU activity. The IRQ /FT interrupt output can be used to generate an external interrupt when the RTC register values match user programmed alarm values. The interrupt is always available while the device is powered from the system supply and can be programmed to occur when in the battery backed state to serve as a system wake-up. Either the IRQ /FT or RST outputs can also be used as a CPU watchdog timer, CPU activity is monitored and an interrupt or reset output will be activated if the correct activity is not detected within programmed limits. The DS1543 power-on reset can be used to detect a system power down or failure and hold the CPU in a safe reset state until normal power returns and stabilizes; the RST output is used for this function. The DS1543 also contains its own power fail circuitry which automatically deselects the device when the VCC supply enters an out of tolerance condition. This feature provides a high degree of data security during unpredictable system operation brought on by low VCC levels. PACKAGES The DS1543 is available in two packages (28-pin DIP and 34-pin PowerCap module). The 28-pin DIP style module integrates the crystal, lithium energy source, and silicon all in one package. The 34-pin PowerCap module board is designed with contacts for connection to a separate PowerCap (DS9034PCX) that contains the crystal and battery. This design allows the Power-Cap to be mounted on top of the DS1543P after the completion of the surface mount process. Mounting the PowerCap after the surface mount process prevents damage to the crystal and battery due to the high temperatures required for solder reflow. The PowerCap is keyed to prevent reverse insertion. The PowerCap Module board and PowerCap are ordered separately and shipped in separate containers. The part number for the PowerCap is DS9034PCX. 2 of 17 DS1543 DS1543 BLOCK DIAGRAM Figure 1 DS1543 OPERATING MODES Table 1 VCC In Tolerance VBAT < VCC < Tolerance
DS1543W-120
物料型号为DS1543,由DALLAS SEMICONDUCTOR生产。

这是一款64k NV Timekeeping RAM,具有以下特点:

- 集成NV SRAM、实时时钟、晶体、断电控制电路和锂电池电源。

- 时钟寄存器与静态RAM访问方式相同,位于RAM的最高的16个位置。

- 完全非易失性,无电源情况下可运行超过10年。

- 精确的上电复位、可编程看门狗定时器和RTC报警。

- BCD编码的年、月、日、星期、小时、分钟和秒,自动闰年补偿,有效至2100年。

- 电池电压水平指示器标志,断电写保护,允许±10% Vcc电源电压公差。

- 锂电池电源在首次通电前与电路断开,以保持新鲜。


引脚分配如下:

1. RST - 复位 2. A12 - 地址输入 3. A7 - 地址输入 4. A6 - 地址输入 5. A5 - 地址输入 6. A4 - 地址输入 7. A3 - 地址输入 8. A2 - 地址输入 9. A1 - 地址输入 10. A0 - 地址输入 11. DQ0 - 数据输入/输出 12. DQ1 - 数据输入/输出 13. DQ2 - 数据输入/输出 14. GND - 地 15. VCC - 电源输入 16. WE - 写使能 17. OE - 输出使能 18. CE - 芯片使能 19. DQ7 - 数据输入/输出 20. DQ6 - 数据输入/输出 21. DQ5 - 数据输入/输出 22. DQ4 - 数据输入/输出 23. A11 - 地址输入 24. A9 - 地址输入 25. A8 - 地址输入 26. IRQ/FT - 中断/频率测试输出(开漏) 27. A10 - 地址输入 28. DQ3 - 数据输入/输出

参数特性包括:

- 非易失性存储器和实时时钟。

- 断电写保护和电源电压公差。

- 锂电池电源,保证在断电情况下数据的完整性和实时时钟的运行。


功能详解

- 该芯片具备实时时钟、看门狗定时器、上电复位、电池监控和非易失性静态RAM。

- 时钟寄存器包含年、月、日、星期、小时、分钟和秒数据,以24小时BCD格式存储。

- 时钟/日历寄存器分为内部和外部两组,用户可以直接访问外部寄存器组。

- 芯片具有中断(IRQ/FT)和复位(RST)输出,可以用来控制CPU活动。


应用信息

- 适用于需要精确时间和数据保持功能的电子设备,如电脑、服务器、嵌入式系统等。


封装信息

- 该芯片有28引脚DIP封装和34引脚PowerCap封装两种形式。

28引脚DIP封装集成了晶体、锂电池电源和硅芯片。

34引脚PowerCap封装设计用于连接独立的PowerCap(DS9034PCX),包含晶体和电池。
DS1543W-120 价格&库存

很抱歉,暂时无法提供与“DS1543W-120”相匹配的价格&库存,您可以联系我们找货

免费人工找货