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DS1642-70+

DS1642-70+

  • 厂商:

    AD(亚德诺)

  • 封装:

    DIP24

  • 描述:

    IC RTC CLK/CALENDAR PAR 24-EDIP

  • 数据手册
  • 价格&库存
DS1642-70+ 数据手册
DS1642 Nonvolatile Timekeeping RAM www.maxim-ic.com FEATURES           PIN CONFIGURATION Integrated NV SRAM, Real-Time Clock, Crystal, Power-Fail Control Circuit, and Lithium Energy Source Standard JEDEC Bytewide 2k x 8 Static RAM Pinout Clock Registers are Accessed Identically to the Static RAM. These Registers are Resident in the Eight Top RAM Locations Totally Nonvolatile with Over 10 Years of Operation in the Absence of Power Access Times of 70ns and 100ns Quartz Accuracy ±1 Minute a Month at +25°C, Factory Calibrated BCD-Coded Year, Month, Date, Day, Hours, Minutes, and Seconds with Leap Year Compensation Valid Up to 2100 Power-Fail Write Protection Allows for ±10% VCC Power Supply Tolerance Lithium Energy Source is Electrically Disconnected to Retain Freshness Until Power is Applied for the First Time UL Recognized TOP VIEW 24 VCC 23 A8 3 22 A9 A4 4 21 WE A3 5 20 OE A2 6 19 A10 A1 7 18 CE A0 8 17 DQ7 DQ0 9 16 DQ6 DQ1 10 15 DQ5 DQ2 11 14 DQ4 GND 12 13 DQ3 A7 1 A6 2 A5 DS1642 ENCAPSULATED DIP ORDERING INFORMATION PART DS1642-70+ DS1642-70 DS1642-100+ DS1642-100 VOLTAGE RANGE (V) 5.0 5.0 5.0 5.0 TEMP RANGE 0°C to +70°C 0°C to +70°C 0°C to +70°C 0°C to +70°C PIN-PACKAGE TOP MARK 24 EDIP (0.720a) 24 EDIP (0.720a) 24 EDIP (0.720a) 24 EDIP (0.720a) DS1642+70 DS1642-70 DS1642+100 DS1642-100 *DS9034-PCX, DS9034I-PCX, DS9034-PCX+ required (must be ordered separately). A “+" indicates a lead(Pb)-free product. The top mark will include a “+” symbol on lead-free devices. 1 of 11 REV: 060706 DS1642 PIN DESCRIPTION PIN 1 2 3 4 5 6 7 8 19 22 23 9 10 11 13 14 15 16 17 12 18 20 21 24 NAME A7 A6 A5 A4 A3 A2 A1 A0 A10 A9 A8 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 GND CE OE WE VCC FUNCTION Address Input Data Input/Output Ground Active-Low Chip-Enable Input Active-Low Output-Enable Input Active-Low Write-Enable Input Power-Supply Input DESCRIPTION The DS1642 is a 2k x 8 nonvolatile static RAM and a full-function real-time clock (RTC), both of which are accessible in a bytewide format. The nonvolatile time keeping RAM is pin and function equivalent to any JEDEC-standard 2k x 8 SRAM. The device can also be easily substituted in ROM, EPROM, and EEPROM sockets, providing read/write nonvolatility and the addition of the real-time clock function. The real-time clock information resides in the eight uppermost RAM locations. The RTC registers contain year, month, date, day, hours, minutes, and seconds data in 24-hour BCD format. Corrections for the day of the month and leap year are made automatically. The RTC clock registers are double-buffered to avoid access of incorrect data that can occur during clock update cycles. The double-buffered system also prevents time loss as the timekeeping countdown continues unabated by access to time register data. The DS1642 also contains its own power-fail circuitry, which deselects the device when the VCC supply is in an out-of-tolerance condition. This feature prevents loss of data from unpredictable system operation brought on by low VCC as errant access and update cycles are avoided. 2 of 12 DS1642 CLOCK OPERATIONS–READING THE CLOCK While the double-buffered register structure reduces the chance of reading incorrect data, internal updates to the DS1642 clock registers should be halted before clock data is read to prevent reading of data in transition. However, halting the internal clock register updating process does not affect clock accuracy. Updating is halted when a 1 is written into the read bit, the 7th most significant bit in the control register. As long as a 1 remains in that position, updating is halted. After a halt is issued, the registers reflect the count, that is day, date, and time that was current at the moment the halt command was issued. However, the internal clock registers of the double-buffered system continue to update so that the clock accuracy is not affected by the access of data. All of the DS1642 registers are updated simultaneously after the clock status is reset. Updating occurs within a second after the read bit is written to 0. Figure 1. DS1642 BLOCK DIAGRAM Table 1. TRUTH TABLE VCC 5V ±10% VBAT 4.5V) the DS1642 can be accessed as described above by read or write cycles. However, when VCC is below the power-fail point VPF (point at which write protection occurs) the internal clock registers and RAM is blocked from access. This is accomplished internally by inhibiting access via the CE signal. When VCC falls below the level of the internal battery supply, power input is switched from the VCC pin to the internal battery and clock activity, RAM, and clock data are maintained from the battery until VCC is returned to nominal level. BATTERY LONGEVITY The DS1642 has a lithium power source that is designed to provide energy for clock activity, and clock and RAM data retention when the VCC supply is not present. The capability of this internal power supply is sufficient to power the DS1642 continuously for the life of the equipment in which it is installed. For specification purposes, the life expectancy is 10 years at 25C with the internal clock oscillator running in the absence of VCC power. Each DS1642 is shipped from Dallas Semiconductor with its lithium energy source disconnected, guaranteeing full energy capacity. When VCC is first applied at a level greater than VPF, the lithium energy source is enabled for battery backup operation. Actual life expectancy of the DS1642 will be much longer than 10 years since no lithium battery energy is consumed when VCC is present. 5 of 12 DS1642 ABSOLUTE MAXIMUM RATINGS Voltage Range on Any Pin Relative to Ground……………………………………………..-0.3V to +7.0V Operating Temperature Range……………………………………………...0°C to +70°C (noncondensing) Storage Temperature Range………………………………………………………………...-20°C to +70°C Soldering Temperature (EDIP, leads)……………………………………..+260C for 10 seconds (Note 7) This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operation sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods of time may affect reliability. RECOMMENDED DC OPERATING CONDITIONS PARAMETER SYMBOL MIN Logic 1 Voltage (All Inputs) VIH Logic 0 Voltage (All Inputs) VIL TYP MAX UNITS NOTES 2.2 VCC + 0.3 V 1 -0.3 0.8 V 1 TYP MAX UNITS NOTES DC ELECTRICAL CHARACTERISTICS PARAMETER SYMBOL MIN Active Supply Current ICC 15 50 mA 2, 3 TTL Standby Current ( CE = VIH) ICC1 1 3 mA 2, 3 CMOS Standby Current ( CE < VCC - 0.2V) ICC2 1 3 mA 2, 3 Input Leakage Current (Any Input) IIL -1 +1 A I/O Leakage Current (Any Output) IOL -1 +1 A Output Logic 1 Voltage (IOUT = -1.0mA) VOH 2.4 Output Logic 0 Voltage (IOUT = +2.1mA) VOL Write Protection Voltage VPF 1 0.4 4.25 6 of 12 4.37 4.50 1 V 1 DS1642 AC CHARACTERISTICS—READ CYCLE PARAMETER SYMBOL 70ns ACCESS MIN MAX 70 100ns ACCESS MIN MAX 100 UNITS Read Cycle Time tRC Address Access Time tAA CE to DQ Low-Z tCEL CE Access Time tCEA 70 100 ns CE Data Off Time tCEZ 25 35 ns OE to DQ Low-Z tOEL OE Access Time tOEA 35 55 ns OE Data Off Time tOEZ 25 35 ns Output Hold from Address tOH 70 5 5 5 5 READ CYCLE TIMING DIAGRAM 7 of 12 100 ns ns 5 5 ns ns ns NOTES DS1642 AC CHARACTERISTICS—WRITE CYCLE (VCC = 5.0V ±10, TA = 0°C to 70°C.) PARAMETER SYMBOL 70ns ACCESS MIN MAX 70 100ns ACCESS MIN MAX 100 UNITS Write Cycle Time tWC Address Setup Time tAS 0 0 ns Pulse Width tWEW 50 70 ns Pulse Width tCEW 60 75 ns Data Setup Time tDS 30 40 ns Data Hold Time tDH 0 0 ns Address Hold Time tAH 5 5 ns Data Off Time tWEZ WE CE WE Write Recovery Time tWR 25 5 8 of 12 35 5 ns ns ns NOTES DS1642 WRITE CYCLE TIMING DIAGRAM—WRITE-ENABLE CONTROLLED WRITE CYCLE TIMING DIAGRAM—CHIP-ENABLE CONTROLLED 9 of 12 DS1642 POWER-UP/POWER-DOWN AC CHARACTERISTICS (TA = 0°C to +70°C) PARAMETER SYMBOL MIN or WE at VIH Before Power-Down tPD 0 s VCC Fall Time: VPF (MAX) to VPF (MIN) tF 300 s VCC Fall Time: VPF (MIN) to VBAT tFB 10 s VCC Rise Time: VPF (MIN) to VPF (MAX) tR 0 s CE Power-up Recover Time tREC Expected Data Retention Time (Oscillator On) tDR TYP MAX 35 10 UNITS NOTES ms years 4, 5 MAX UNITS NOTES POWER-UP/POWER-DOWN WAVEFORM TIMING CAPACITANCE (TA = +25°C) PARAMETER SYMBOL MIN TYP Capacitance on All Pins (except DQ) CIN 7 pF Capacitance on DQ Pins CO 10 pF 10 of 12 DS1642 AC TEST CONDITIONS Output Load: 100pF + 1TTL Gate Input Pulse Levels: 0.0 to 3.0V Timing Measurement Reference Levels: Input: 1.5V Output: 1.5V Input Pulse Rise and Fall Times: 5ns NOTES: 1) Voltages are referenced to ground. 2) Typical values are at 25C and nominal supplies. 3) Outputs are open. 4) Data retention time is at 25C. 5) Each DS1642 has a built-in switch that disconnects the lithium source until VCC is first applied by the user. The expected tDR is defined as a cumulative time in the absence of VCC starting from the time power is first applied by the user. 6) Real-time clock modules can be successfully processed through conventional wave-soldering techniques as long as temperature exposure to the lithium energy source contained within does not exceed +85C. Post-solder cleaning with water washing techniques is acceptable, provided that ultrasonic vibration is not used to prevent damage to the crystal. 11 of 12 DS1642 PACKAGE INFORMATION For the latest package outline information and land patterns, go to www.maxim-ic.com/packages. PACKAGE TYPE PACKAGE CODE DOCUMENT NO. 24 EDIP MDF24+1 21-0245 DS1642 24-PIN PACKAGE PKG DIM. A IN. MM B IN. MM C IN. MM D IN. MM E IN. MM F IN. MM G IN. MM H IN. MM J IN. MM K IN. MM 24-PIN MIN MAX 1.270 1.290 37.34 37.85 0.675 0.700 17.15 17.78 0.315 0.335 8.00 78.51 0.075 0.105 1.91 2.67 0.015 0.030 0.38 0.76 0.140 0.180 3.56 4.57 0.090 0.110 2.29 2.79 0.590 0.630 14.99 16.00 0.010 0.018 0.25 0.45 0.015 0.025 0.43 0.58 12 of 12 Maxim/Dallas Semiconductor cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim/Dallas Semiconductor product. No circuit patent licenses are implied. Maxim/Dallas Semiconductor reserves the right to change the circuitry and specifications without notice at any time. Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 © 2006 Maxim Integrated Products The Maxim logo is a registered trademark of Maxim Integrated Products, Inc. The Dallas logo is a registered trademark of Dallas Semiconductor Corporation.
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