Rev: 030508
DS33X11 Demo Kit
General Description
The DS33X11 demo kit (DK) is an easy-to-use
evaluation board for the DS33X11 Ethernet-over-PDH
device. The demo kit contains an option for either
T3/E3 or T1/E1 serial links. All PDH links are
complete with line interface, transformers, and
network connections. Maxim’s ChipView software is
provided with the demo kit, giving point-and-click
access to configuration and status registers from a
Windows®-based PC. On-board LEDs indicate
receive loss-of-signal, queue overflow, Ethernet link,
Tx/Rx, and interrupt status.
Features
♦
Demonstrates Key Functions of DS33X11
Ethernet Transport Chipset
♦
Includes DS26521 T1/E1 SCT, DS3170 T3/E3
SCT, Transformers, BNC, and RJ48 Network
Connectors and Termination
♦
Includes Ethernet PHY Supporting 10/100 and
Gigabit Modes
♦
Provides Support for Hardware and Software
Modes
♦
On-Board MMC2107 Processor and ChipView
Software Provide Point-and-Click Access to
the DS33X11, DS26528, DS3170, and PHY
Registers
♦
All DS33X11 Interface Pins are Easily
Accessible for External Data Source/Sink
♦
LEDs for Loss-of-Signal, Ethernet Link, Tx/Rx,
and Interrupt Status
♦
Easy-to-Read Silkscreen Labels Identify the
Signals Associated with All Connectors,
Jumpers, and LEDs
Windows is a registered trademark of Microsoft Corp.
Ordering Information
PART
DS33X11DK
TYPE
Demo card, T3/E3, T1/E1
Demo Kit Contents
DS33X11DK Main Board
CD-ROM Includes:
ChipView Software and Manual
DS33X11DK Data Sheet
Configuration Files
_____________________________________________
Demo Kit Board
Maxim Integrated Products 1
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
_______________________________________________________________________________________ DS33X11DK
Table of Contents
1.
SYSTEM FLOORPLAN ......................................................................................................4
2.
PCB ERRATA.....................................................................................................................4
3.
FILE LOCATIONS ..............................................................................................................5
4.
BASIC OPERATION...........................................................................................................6
4.1
POWERING UP THE DEMO KIT ..........................................................................................................6
4.1.1
4.2
4.2.1
4.3
General .................................................................................................................................................. 6
BASIC DS33X11 INITIALIZATION ......................................................................................................6
Additional Configuration for DS33X11 ................................................................................................... 7
MONITOR AND CAPTURE ETHERNET TRAFFIC ...................................................................................7
5.
LEDS, CONFIGURATION SWITCHES, JUMPERS, AND CONNECTORS .......................7
6.
REGISTER ACCESS........................................................................................................10
6.1
6.2
6.3
6.4
7.
ADDRESS MAP ..............................................................................................................................10
CONTROL THROUGH EXTERNAL PROCESSOR .................................................................................10
SPI MODE .................................................................................................................................... 10
MAC AND PHY REGISTERS ...........................................................................................................10
ADDITIONAL INFORMATION/RESOURCES ..................................................................11
7.1
7.2
7.3
DS33X11 INFORMATION ...............................................................................................................11
DS33X11DK INFORMATION ..........................................................................................................11
TECHNICAL SUPPORT ....................................................................................................................11
8.
COMPONENT LIST ..........................................................................................................12
9.
SCHEMATICS ..................................................................................................................19
Rev: 030508
2 of 39
_______________________________________________________________________________________ DS33X11DK
List of Figures
Figure 1-1. DS33X11 System Floorplan...................................................................................................................... 4
List of Tables
Table 3-1. File Details.................................................................................................................................................. 5
Table 5-1. Main Board PCB Configuration .................................................................................................................. 7
Table 6-1. Overview of Daughter Card Address Map................................................................................................ 10
Table 8-1. Component List ........................................................................................................................................ 12
Rev: 030508
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_______________________________________________________________________________________ DS33X11DK
1.
System Floorplan
Figure 1-1. DS33X11 System Floorplan
DS33X11 DEMO KIT
POWER
(5V)
DS26521 T1/E1
TRANSFORMER AND NETWORK
CONNECTIONS (T3/E3)
TRANSFORMER AND NETWORK
CONNECTIONS (T1/E1)
DRIVER
CONFIGURATION
DS3170 T3/E3
FET SWITCH + TEST POINTS
CLOCK SELECT, PHY CONFIG
10/100/1000 ETHERNET PHY
AND MAGNETICS
DS33X11
LEDs
USB
SERIAL PORT
(57600-8-N-1)
JUMPERS FOR
ETHERNET CONFIG
TEST POINTS
SPI CONFIG
JUMPERS
DDR
MICROPROCESSOR
2.
PCB Errata
DS33X11DK01A0 board errata:
• SSTL_TESTI pin should have been pulled high (done via rework).
• Needs a reset controller (added by rework).
• Silkscreen at JP21 was backwards (fixed by swapping oscillators to make silkscreen correct).
• Three-pin bias jumpers are missing +- silkscreen.
DS33X11DK02A0 board errata:
• There are no errata for DS33X11DK02A0.
Rev: 030508
4 of 39
_______________________________________________________________________________________ DS33X11DK
3.
File Locations
This demo kit relies upon several supporting files, which are provided on the CD-ROM and are available as a zip
file from the Maxim website at www.maxim-ic.com/DS33X11DK.
All locations are given relative to the top directory of the CD-ROM/zip file. The DS33X11, DS3170, and DS26521
register definition files and configuration files are listed in Table 3-1.
Table 3-1. File Details
FILE NAME
FILE USAGE
.\DS33X11_cfg_demo_gui\_ds33x161_GlobalMicroport.def
Top-level definition file to select in
ChipView’s register mode. This file will
autoload the remaining definition files for
the DS33X11. (Note that the wan files still
need to be loaded (either DS).)
.\DS33X11_cfg_demo_gui\ds33x161_Lan.def
.\DS33X11_cfg_demo_gui\ds33x161_BufferMan.def
.\DS33X11_cfg_demo_gui\ds33x161_EncapDecap.def
.\DS33X11_cfg_demo_gui\ds33x161_Vcat.def
.\DS33X11_cfg_demo_gui\ds33x161_SerialPort.def
DS33X11 dependent files. These are called
by the _ds33x161_GlobalMicroport.def file
listed above.
.\DS33X11_cfg_demo_gui\ds33x11_lan_T3wan_ext.mfg
File for manually configuring the DS33X11
to interface with the DS3170.
.\DS33X11_cfg_demo_gui\ds33x11_lan_T1wan_ext.mfg
File for manually configuring the DS33X11
to interface with the DS26521.
.\DS33X11_cfg_demo_gui\x11_wan1.eset
GUI interface for loading settings when
running the Xchip plug-in (launched from
the Tools menu of the ChipView program).
.\DS33X11_cfg_demo_gui\te3_ds3170\ds3170_evbrd.def
Top-level definition file to select the DS3170
T3/E3 transceiver. This file will autoload the
remaining definition files for the DS3170.
.\DS33X11_cfg_demo_gui\te3_ds3170\misc1_p1.def
.\DS33X11_cfg_demo_gui\te3_ds3170\feac_frac_p1.def
.\DS33X11_cfg_demo_gui\te3_ds3170\ttrace_p1.def
.\DS33X11_cfg_demo_gui\te3_ds3170\ds3_p1.def
.\DS33X11_cfg_demo_gui\te3_ds3170\e3751_p1.def
.\DS33X11_cfg_demo_gui\te3_ds3170\e3832_p1.def
.\DS33X11_cfg_demo_gui\te3_ds3170\port1.def
DS3170 dependent files. These are called
by the ds3170_evbrd.def file listed above.
.\DS33X11_cfg_demo_gui\te3_ds3170\70_t3_sct_needscoaxlb.mfg
Configuration file for T3 mode.
.\DS33X11_cfg_demo_gui\ds26521\DS26521_GLOBAL_T1.def
.\DS33X11_cfg_demo_gui\ds26521\DS26521_1_LIU_BERT.def
.\DS33X11_cfg_demo_gui\ds26521\DS26521_1_T1.def
.\DS33X11_cfg_demo_gui\ds26521\t1_config.mfg
Rev: 030508
Top-level definition file to select the
DS26521 T1/E1 transceiver. This file will
autoload the remaining definition files for
the DS26521.
DS26521dependent files. These are called
by DS26521_GLOBAL_T1.def file listed
above.
Configuration file for T1 mode.
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_______________________________________________________________________________________ DS33X11DK
4.
Basic Operation
Note: In the following sections, software-related items are identified by bolding. Text in bold refers to items directly
from the demo kit (DK) software. Text in bold and underlined refers to items from the Windows operating system.
4.1
•
•
•
Powering Up the Demo Kit
Connect the PCB power jack to the wall adapter.
Connect the RS232 serial cable or USB cable between the host PC and the demo kit.
Verify that the jumpers are configured as described in Table 5-1.
4.1.1 General
•
•
Upon power-up the power LEDs (DS33, DS34, DS35 green) will be lit. Transceiver RLOS + LTC LED
(DS38, DS37 red) will be lit.
PHY LINK LED (DS07 green) should be lit if the Ethernet is connected. Ensure that the JP15 (DS33X11
RefClk) setting matches link mode. For Gigabit mode JP15 should be set to drive RefClk with 125MHz. For
10/100Mb modes, RefClk should be driven with 25MHz.
Following are several basic system initializations.
4.2
Basic DS33X11 Initialization
This section covers three basic methods for configuring the DS33X11.
1) Device Driver-Based Configuration. If the pins J50.1+J50.2 are unjumpered, the device driver will auto
configure the DS33X11 upon power-up. This enables traffic to pass from the Ethernet port to the serial port.
Refer to the device driver documentation for further details.
2) Register-Based Configuration—T1 Mode
a) Install jumper J50.1+J50.2 to disable device drivers, and then reset the board. Ensure that
J50.9+J50.10 is not installed.
b) Launch ChipView.exe and select Register View.
c) When prompted for a definition file, pick the file named _ds33x161_GlobalMicroport.def, Six
additional definition files will load.
d) Go to the File menu and select File→Definition File. When prompted, select
DS26521_GLOBAL_T1.def.
e) Go to the File menu and select File→Memory Config File→Load .MFG file. When prompted, select
the file named ds33x11_lan_T1wan_ext.mfg.
f)
3)
Go to the File menu and select File→Memory Config File→Load .MFG file. When prompted, select
the file named t1_config.mfg.
Register-Based Configuration—T3 Mode
a) Install Jumper J50.1+J50.2 to disable device drivers, and then reset the board. Ensure that
J50.9+J50.10 is installed.
b) Launch ChipView.exe and select Register View.
c) When prompted for a definition file, pick the file named _ds33x161_GlobalMicroport.def. Six
additional definition files will load.
d) Go to the File menu and select File→Definition File. When prompted select ds3170_evbrd.def.
e) Go to the File menu and select File→Memory Config File→Load .MFG file. When prompted,
select the file named ds33x11_lan_T3wan_ext.mfg.
f)
Rev: 030508
Go to the File menu and select File→Memory Config File→Load .MFG file. When prompted,
select the file named 70_t3_sct_needscoaxlb.mfg.
6 of 39
_______________________________________________________________________________________ DS33X11DK
4.2.1 Additional Configuration for DS33X11
•
Using a patch or crossover cable, connect the Ethernet connector to an ordinary PC or network test
equipment. This should cause the link LED to turn on.
•
Place a loopback connector at the T1E1 network side; RLOS and LTC LEDs should go out (DS38, DS37).
•
At this point any packets sent to the DS33X11 are echoed back. Incoming packets (i.e., ping) should cause
the Activity LED to blink.
•
Note that ChipView.exe display settings can be changed using the Options→Settings menu.
4.3
5.
Monitor and Capture Ethernet Traffic
•
Although ping is mentioned, it is not recommended. The ping command goes through the computer’s
TCPIP stack and sometimes will not be sent out the PC’s network connector (i.e., if the PC’s ARP cache is
out of date). Additionally, ping requires two PCs, as a PC with only one adapter cannot ping itself (a local
ping gets sent to “local host” instead of out the connector). However, ping is still a valuable test once the
prototyping stage is complete.
•
Generation and capture of arbitrary (raw) packets can be accomplished using CommView. A time-limited
demo is available at www.tamos.com/products/commview.
•
Wireshark is an excellent (and free) packet capture utility. Download is available at www.wireshark.org.
•
Adding additional Ethernet ports to a PC is rather simple when a USB-to-Ethernet adapter is used. This
allows for end-to-end testing using a single PC. When using two adapters the PC has a different IP
address for each adapter. Test equipment allows selection of either adapter. Operating -system-based
network traffic is sent out of the default adapter; usually this is the adapter that has recently had connection
to a live network.
LEDs, Configuration Switches, Jumpers, and Connectors
The DS33X11DK has several configuration switches, oscillators, and jumpers. Table 5-1 provides a description of
these signals, given in order of appearance on the PC board, from top to bottom and then left to right (with the
board held so that the RS232 and USB connectors are on the right-hand side of the board).
Table 5-1. Main Board PCB Configuration
SILKSCREEN
REFERENCE
FUNCTION
BASIC SETTING
SCHEMATIC
PAGE
J44+J45
WAN Network
Connection
—
40
J47
WAN Network
Connection
—
42
J46
Power Jack
—
28
J43
USB
—
32
J51
RS232 DB9 Connector
—
32
DS33, DS34,
DS35
LED
ON
35
J48+J49
Test Points
Not used
42
YB08
(PCB solder side)
Oscillator
—
40
DS36
LED
User setting
(OFF)
40
Rev: 030508
DESCRIPTION
T3/E3 jumpers for network interface.
Used with 2-pin coax adapter
(provided).
T1/E1 RJ45 connector for network
interface.
System power. Always connected to
5V wall adapter (provided).
USB interface.
RS232 DB9 connector, operates in
ASCII mode at 57.6K,8,N,1.
Power OK LEDs for 1.8V, 2.5V, and
3.3V power supplies. All three LEDs
must be lit.
Address Data Bus Test Points. See
Section 6.2 regarding control by
external processor. Silkscreen for
these signals is provided a few inches
to the left of the signals.
Oscillator for T3/E3 MCLK. Silkscreen
and target are provided on top side of
PCB.
DS3170 general-purpose I/O LED. Not
configured by ini files.
7 of 39
_______________________________________________________________________________________ DS33X11DK
SILKSCREEN
REFERENCE
FUNCTION
•
•
•
J50
SCHEMATIC
DESCRIPTION
PAGE
P1+P2: Jumper to enable drivers (remove to disable drivers).
P3+P4: Jumper to enable interrupt handlers (this jumper is only valid
when drivers are enabled).
P5+P6: Jumper to set for looptime—WAN TxClock driven by RxClock.
Remove to set for source time WAN TxClock driven by oscillator (this
jumper is only valid when drivers are enabled).
P7+P8: Reserved, currently has no impact on system.
P9+P10: Jumper to enable T3/E3 mode, remove jumper to set T1/E1
mode. This jumper controls FET switches U22 and UB34.
BASIC SETTING
Configuration
•
•
J52
FPGA JTAG
Not used
34
J53
Test Point
—
41
DS37–DS38
DS26521 LEDs
—
41
JP16
Bias PHY ManMDIX
Jumper
P1+2 (high)
37
JP17
Bias PHY MultiEn
Jumper
P1+2 (high)
37
JP18
Bias PHY MdixEn
Jumper
P2+3 (low)
37
JP19
Bias PHY MacClkEn
Jumper
P2+3 (low)
37
JP20
PHY Clock In
Jumper
P1+2 (high)
38
YB09
(PCB solder side)
125MHz Oscillator
Not populated
24
YB10
(PCB solder side)
25MHz Oscillator
—
24
125MHz Oscillator
—
24
Connector/Test Points
—
36
J54
DS33X11 Test Points
—
22
JP15, JP101
DS33X11 RefClk
JP15.1+JP15.2,
JP101 installed
24
J2
Ethernet Connection
—
38
YB11
JB05+JB04
(PCB solder side)
Rev: 030508
JTAG Test Points for Lattice FPGA.
Not shared with other devices.
DS26521 Test Points (see silkscreen at
top of board). TCLK, REFCLKIO,
TSYSCLK, TSIG, RSYSCLK,
TSSYNCIO, TSER, RM_RFSYNC,
RSIG.
DS26521 LTC and RLOS Pins. Should
be off when configured and connected
to another device. Check TCLK setting
if LEDs flicker on/off.
Default MDIX Setting. P1+2 PHY is set
to straight mode; P2+3 PHY is in
crossover mode.
PHY Advertisement Setting. P2+3
selects multiple node priority (switch or
hub). P1+2 selects single node priority
(NIC).
P2+3 enables pair swap mode. P1+3
disables pair swap mode.
P2+3 PHY clock to MAC output is
enabled. P1+2 PHY clock to MAC
output is disabled.
PHY Clock Input. Always set for P1+2,
driving PHY with 25MHz oscillator.
Setting P2+3 would drive with
DS33X11 RefClk and work in MII
mode, but not in GMII mode (this
jumper is removed in
DS33X11DK02A0).
125MHz Oscillator. Can be jumpered to
DS33X11 RefClk. This oscillator is not
populated. In GMII mode RefClk is
driven by PHY clock out (using jumper
JP101).
25MHz Oscillator. Used for PHY clock
in (MII+GMII). Used for DS33X11
RefClk in MII mode.
DS33X11 SysClock.
Test Points for interface signals
between PHY and DS33X11.
Test Points for RGCLK, RSYNC,
RDAT, TGCLK, TSYNC, TDAT.
JP15 selects DS33X11 RefClk source:
• JP15.1+2 to select PHY MacClkOut
(GMII mode).
• JP15.2+3 to select 25MHz oscillator
(MII mode).
JP101 should always be installed as it
connects MacClkOut to JP15.1.
RJ45 Ethernet Connector. Used in
10/100 and Gigabit modes.
8 of 39
_______________________________________________________________________________________ DS33X11DK
SILKSCREEN
REFERENCE
FUNCTION
JP26
Bias PHY ANEN
JP24
Bias PHY Duplex
JP27+JP26
Bias PHY
Speed1 + Speed0
JP25
Bias PHY NonIEEE
DS41
LED Duplex
DS46+42
DS47+43
DS48+45
LED Link Speed
1 of the 6 should
be lit (when
linked)
36
DS44+39
LED Activity
—
36
J57
JTAG
Jumpered P1+3
P7+9
27
JP21
YB12, YB13
DS26521 MCLK Select
Jumpered P2+3
42
J55.1–J55.8
DS33X11
SPI Test Points
Jumpered
P1+2
P3+4
P5+6
P7+8
27
J55.9+J55.10
DS33X11
Bias SPI SWAP
Jumpered
P9+10 (high)
27
Both jumpered
27
—
27
J55.11–J55.14
DS40
DS33X11
Bias SPI CPHA
Bias SPI CPOL
LED
BASIC SETTING
Jumper
P2+3 (high)
Jumper
P2+3 (high)
Jumper
P1+2 (low)
P1+2 (low)
Jumper
P2+3 (high)
—
SCHEMATIC
PAGE
38
38
38
38
36
DESCRIPTION
Jumper P2+3 to enable auto
negotiation.
Jumper P2+3 to enable full duplex.
Jumper P1.2 to force half duplex.
If auto negotiation is enabled, this
setting advertises capability for
10/100/1000 speeds. If auto
negotiation is disabled, this setting
forces 10Mb mode.
Jumper P2+3 to enable IEEE-compliant
operation.
LED is on in full-duplex mode.
LED to indicate link speed—1000Mbps,
100Mbps, or 10Mbps. Only one of the
six LEDs should be lit. See the
JP15+JP101 description for setting in
GMII vs. MII mode.
Flashes for PHY TX-RX activity.
JTAG for DS33X11, DS26521, and
DS3170. DS33X11 can be isolated
from DS26521 and DS3170. Jumpers
on P1+3 and P7+9 prevent the devices
from entering JTAG mode.
Jumper P2+3 for 1.544MHz.
Jumper P1+2 for 2.048MHz.
SPI Test Points for DS33X11. The first
four jumpers are installed to connect
the DS33X11 to the processor SPI port
(MISO, MOSI, SCLK, CS).
Processor default is to transfer MSB
first. Jumper P9+10 to match this
setting.
Processor default is to have normal
phase and idle high. See the SPI
section (Section 6.3) for further detail.
DS33X11 interrupt LED.
Jumper P1+2 for MII mode. Jumper
P2+3 for RMII mode (RMII mode is not
available in this demo kit).
Jumper P1+2 for DTE mode. Jumper
P2+3 for DCE mode. (This demo kit
does not support DCE mode.)
OnCe debug connector for MMC2107
microcontroller.
JP22
DS33X11
Bias RMII
Jumpered P1+2
(low)
27
JP28
DS33X11
Bias DCE
Jumpered P1+2
(low)
27
J58
OnCe
Not used
32
Flash VPP
Not used
32
For programming flash memory.
LED
ON
32
LED to display kit status. Should be on.
JB06
(PCB solder side)
DS50
Rev: 030508
9 of 39
_______________________________________________________________________________________ DS33X11DK
6.
Register Access
6.1
Address Map
The external device address space begins at 0x81000000. All offsets given in Table 6-1 are relative to this offset.
Table 6-1. Overview of Daughter Card Address Map
OFFSET
DEVICE
DESCRIPTION
0X0000 to
0X0087
FPGA
0X1000 to
0X1FFF
—
0X4000 to
0X5FFF
DS26521
DS26521 T1/E1 device. Uses CS_X2.
0X8000 to
0X9FFF
DS3170
DS3170 T3/E3 device. Uses CS_X4.
Processor board identification.
Reserved.
All device registers can be easily modified using the ChipView host-based user-interface software with the
definition files previously mentioned.
6.2
Control Through External Processor
The demo kit is intended to be controlled using the on-board microcontroller and a host PC. However, the demo kit
has jumper points to allow it to be controlled by an external processor. The DS33X11 can be controlled in SPI
mode by attaching to the signals at J55 pins 2, 4, 6, 8. The transceivers (DS26521 and DS3170) can be controlled
by jumpering J49.12+14. Doing so pulls up the tristate_bus signal and places the FPGA in a high-impedance mode
(see the Address Map section).
6.3
SPI Mode
The DS33X11 uses SPI mode and is addressed differently than devices that use a parallel address/data bus. The
DS33X11 does not have an address offset. Its base address starts at 0x00. Table 5-1 details the default bias levels
for SPI configuration pins. To change these settings the processor’s SPI settings must also change. The processor
SPI settings can be changed in ChipView’s terminal mode using the SPISG S function.
6.4
MAC and PHY Registers
The MAC and PHY are accessed indirectly. This process is automated by the indirect register module. To load this
module, first select the DS33X162 device driver demo plugin using the Tools→Plugins menu. Once the device
driver demo loads, select the indirect register module from the Tools→Indirect register menu. The first tab of the
menu has a selection for the device bus mode. Select SPI mode when using the DS33X11.
To test that the indirect register section is working, try to reset the PHY. Select the PHY tab, change the Padd field
to 00001 to select the PHY at MDIO address 1. In the Data write field enter 00 00 80 00. Click the Write PHY
button. At this point the link LED of the PHY should go out (and turn back on in a few seconds).
Rev: 030508
10 of 39
_______________________________________________________________________________________ DS33X11DK
7.
Additional Information/Resources
7.1
DS33X11 Information
For more information about the DS33X11, refer to the DS33X11 data sheet available on our website at
www.maxim-ic.com/DS33X11.
7.2
DS33X11DK Information
For more information about the DS33X11DK, including software downloads, refer to the DS33X11DK data sheet
available on the our website at www.maxim-ic.com/DS33X11DK.
7.3
Technical Support
For additional technical support, go to www.maxim-ic.com/support.
Rev: 030508
11 of 39
_______________________________________________________________________________________ DS33X11DK
8.
Component List
Table 8-1 shows the component list for the DS33X11 and DS33X162 demo kits and resource cards. This BOM
contains the part listing for four boards. These boards are the DS33X11DK, DS33X162DK, DualPhyRC, and
GigPhyRC. Each reference designator is only used once. For example, U25 only appears on the DS33X11DK and
is not used on any of the other boards. See Table 5-1.
Table 8-1. Component List
DESIGNATION
QTY
DESCRIPTION
SUPPLIER
PART
C02, C22, C145, CB19, CB23,
D CASE TANT 470uF
CB42, CB95, CB129, CB303,
15
KEM
T491D477M006AS
6.3V 20%
CB319, CB445, CB447, CB452,
CB460, CB463
Reference designators shown on
0603 CERAM 4.7uF 6.3V
231
UNK
ECJ-1VB0J475M
next row
MULTILAYER
C03, C08, C11, C14, C15, C16, C17, C21, C24, C29, C33, C45, C49, C51, C52, C91, C92, C96, C97, C115, C119, C120, C122,
C123, C129, C137, C138, C141, C142, C146, C149, C151, C153, C158, C258, C263, C265, CB01, CB04, CB06, CB09, CB13,
CB16, CB17, CB21, CB24, CB26, CB27, CB28, CB36, CB37, CB41, CB44, CB45, CB46, CB47, CB48, CB58, CB60, CB66, CB67,
CB74, CB75, CB76, CB78, CB80, CB84, CB92, CB93, CB98, CB99, CB100, CB104, CB107, CB114, CB115, CB116, CB118,
CB123, CB125, CB126, CB137, CB138, CB141, CB144, CB151, CB155, CB158, CB163, CB164, CB166, CB170, CB171, CB172,
CB179, CB181, CB183, CB185, CB186, CB188, CB189, CB191, CB192, CB193, CB195, CB197, CB198, CB201, CB204, CB209,
CB215, CB218, CB221, CB222, CB227, CB229, CB230, CB231, CB234, CB235, CB239, CB243, CB249, CB251, CB255, CB258,
CB263, CB264, CB267, CB270, CB271, CB273, CB276, CB277, CB278, CB284, CB287, CB293, CB294, CB297, CB298, CB302,
CB304, CB306, CB307, CB320, CB322, CB327, CB328, CB341, CB343, CB344, CB345, CB347, CB348, CB351, CB352, CB353,
CB357, CB358, CB364, CB365, CB366, CB367, CB369, CB370, CB371, CB375, CB376, CB379, CB380, CB388, CB392, CB393,
CB395, CB396, CB399, CB400, CB401, CB404, CB405, CB406, CB407, CB408, CB409, CB415, CB416, CB423, CB424, CB425,
CB427, CB431, CB436, CB438, CB441, CB442, CB446, CB449, CB453, CB454, CB462, CB467, CB760, CB766, CB768, CB777,
CB779, CB789, CB790, CB791, CB792, CB793, CB795, CB798, CB802, CB804, CB805, CB807, CB808, CB810, CB812, CB813,
CB815, CB816, CB817, CB818, CB824, CB827, CB856, CB857, CB859
Reference designators shown on
L_0603 CERAM .01uF
114
AVX
06035C103KAT
next row
50V 10% X7R
C04, C05, C06, C07, C09, C10, C18, C20, C32, C37, C40, C41, C42, C50, C57, C70, C89, C98, C104, C113, C114, C118, C125,
C133, C134, C136, C148, C150, C261, C266, CB03, CB11, CB14, CB20, CB30, CB34, CB52, CB55, CB61, CB69, CB71, CB73,
CB83, CB103, CB109, CB112, CB119, CB120, CB128, CB139, CB150, CB157, CB161, CB167, CB173, CB187, CB194, CB205,
CB206, CB207, CB213, CB216, CB217, CB219, CB223, CB224, CB225, CB228, CB240, CB256, CB259, CB261, CB275, CB285,
CB295, CB300, CB308, CB332, CB350, CB354, CB359, CB361, CB381, CB385, CB391, CB398, CB402, CB413, CB414, CB419,
CB428, CB432, CB435, CB439, CB443, CB444, CB448, CB451, CB466, CB468, CB761, CB765, CB770, CB771, CB772, CB776,
CB794, CB803, CB806, CB811, CB819, CB823, CB853, CB855
L_0603 CERAM 22pF
C110, C112, CB86, CB87
4
AVX
06033A220JAT
25V 5% NPO
C156, C259, CB51, CB762, CB763,
CB764, CB767, CB769, CB773,
0603 CERAM 0.1uF 16V
16
Phycomp
06032R104K7B20D
10%
CB774, CB775, CB780, CB782,
CB786, CB787, CB788
C25, C126, CB10, CB31, CB33,
CB88, CB89, CB102, CB145,
L_1206 CERAM 10uF
CB146, CB147, CB315, CB333,
20
Panasonic
ECJ-3YB1A106M
10V 20%
CB338, CB363, CB368, CB383,
CB417, CB418, CB437
C28, C31, C132, CB25, CB32,
CB35, CB38, CB40, CB43, CB56,
CB68, CB81, CB85, CB96, CB105,
0603 CERAM .1uF 16V
CB313, CB321, CB324, CB372,
28
Panasonic
ECJ-1VB1C104K
10%
CB373, CB384, CB394, CB397,
CB410, CB411, CB412, CB422,
CB450
C39, C44, C54, C55, C56, C60,
C61, C64, C99, C100, C101, C102,
1206 CERAM 10uF 10V
18
Panasonic
ECJ-3YB1A106M
20%
C103, C105, C106, C107, C108,
C109
Rev: 030508
12 of 39
_______________________________________________________________________________________ DS33X11DK
DESIGNATION
QTY
DESCRIPTION
SUPPLIER
PART
C58, C63, C67, C69, C73, C76,
C77, C86, C87, CB108, CB153,
1206 CERAM 0.1uF 25V
16
Panasonic
ECJ-3VB1E104K
10%
CB208, CB238, CB252, CB253,
CB254
C59, C62, C65, C66, C68, C71,
1206 CERAM 560pf 50V
C72, C75, C78, C79, C80, C81,
17
AVXZ
12065A561JAT2A
5%
C82, C83, C84, C85, C116
Reference designators shown on
L_0603 CERAM .1uF
226
AVX
0603YC104MAT
next row (begins with C01)
16V 20% X7R
C01, C12, C13, C19, C23, C26, C27, C30, C34, C35, C36, C38, C43, C46, C47, C48, C53, C74, C88, C90, C93, C94, C95, C111,
C117, C121, C124, C127, C128, C130, C131, C135, C139, C140, C143, C144, C147, C152, C154, C155, C157, C260, C262,
C264, CB02, CB05, CB07, CB12, CB18, CB22, CB29, CB39, CB49, CB53, CB57, CB59, CB62, CB63, CB64, CB65, CB70, CB72,
CB77, CB79, CB82, CB90, CB91, CB94, CB97, CB101, CB106, CB110, CB111, CB113, CB117, CB121, CB122, CB124, CB130,
CB131, CB132, CB133, CB134, CB135, CB136, CB140, CB142, CB148, CB149, CB152, CB154, CB156, CB159, CB160, CB162,
CB165, CB168, CB169, CB174, CB175, CB176, CB177, CB178, CB180, CB182, CB184, CB190, CB196, CB199, CB200, CB202,
CB203, CB210, CB211, CB212, CB214, CB220, CB226, CB232, CB233, CB236, CB237, CB241, CB242, CB244, CB245, CB246,
CB247, CB248, CB250, CB257, CB260, CB262, CB266, CB268, CB269, CB272, CB274, CB280, CB282, CB283, CB286, CB288,
CB289, CB296, CB299, CB301, CB305, CB309, CB310, CB311, CB312, CB314, CB316, CB317, CB318, CB323, CB325, CB326,
CB329, CB330, CB331, CB334, CB335, CB336, CB337, CB339, CB340, CB342, CB346, CB349, CB355, CB356, CB360, CB362,
CB374, CB377, CB378, CB382, CB386, CB387, CB389, CB390, CB403, CB420, CB421, CB426, CB430, CB433, CB434, CB440,
CB455, CB456, CB457, CB458, CB459, CB461, CB464, CB465, CB469, CB470, CB757, CB758, CB759, CB778, CB781, CB783,
CB784, CB785, CB796, CB797, CB799, CB800, CB801, CB809, CB814, CB820, CB821, CB822, CB825, CB826, CB828, CB829,
CB852, CB854, CB858
CB08, CB15, CB54, CB127, CB143,
L_D CASE TANT 68uF
CB279, CB281, CB290, CB291,
10
Panasonic
ECS-T1CD686R
16V 20%
CB292
L_1206 CERAM 1uF 16V
CB265, CB429
2
Panasonic
ECJ-3YB1C105K
10%
SCHOTTKY DIODE, 1
International
DB01, DB02, DB03
3
10BQ040
AMP 40 VOLT
Rectifier
DS01, DS02, DS03, DS33, DS34,
DS35, DS41, DS42, DS43, DS44,
DS45, DS46, DS47, DS48, DS49,
24
LED, GREEN, SMD
Panasonic
LN1351C
DS75, DS76, DS77, DS78, DS79,
DS80, DS81, DS82, DS83
DS04, DS05, DS06, DS07, DS17,
DS18, DS19, DS20, DS21, DS24,
17
L_LED, RED, SMD
Panasonic
LN1251C
DS25, DS26, DS36, DS37, DS38,
DS39, DS40
DS08, DS50, DS63, DS64, DS65,
6
L_LED, GREEN, SMD
Panasonic
LN1351C
DS66
DS09, DS10, DS11, DS12, DS13,
DS14, DS15, DS16, DS22, DS23,
20
LED, RED, SMD
Panasonic
LN1251C
DS27, DS28, DS29, DS30, DS31,
DS32, DS71, DS72, DS73, DS74
DS67, DS68, DS69, DS70
4
LED, AMBER, SMD
Panasonic
LN1451C
KIT, 4-40 HARDWARE,
H01, H02, H03, H04, H05, H06,
12
.50 NYLON STANDOFF
NA
4-40KIT4
H07, H08, H09, H10, H11, H12
AND NYLON HEX-NUT
TERMINAL STRIP, 16
J01, J12, J13, J17, J18
5
Samtec
TSW-108-07-T-D
PIN, DUAL ROW, VERT
J02, J50
2
J03, J43
2
J04, J51
2
J05, J06, J48, J49
4
J07, J08, J10, J11
4
Rev: 030508
TERMINAL STRIP, 10
PIN, DUAL ROW, VERT
TYPE B SINGLE RT
ANGLE, BLACK
L_CONN, DB9 RA,
LONG CASE
NON POPULATED
HEADER, 14 PIN, DUAL
ROW, VERT
NOPOP TERMINAL
STRIP, 16 PIN, DUAL
ROW, VERT
NA
NA
MOL
NA
AMP
747459-1
Samtec
NOPOP-HDR-TSW-107-14-T-D
Samtec
NOPOP-TSW-108-07-T-D
13 of 39
_______________________________________________________________________________________ DS33X11DK
DESIGNATION
QTY
J09, J14, J20, J21, J22, J23, J52,
J53, J57
9
J15, J46
2
J16, J24
2
J19, J25, JB06
J26, J27, J28, J29, J30, J31, J32,
J33, J34, J35, J36, J37, J38, J39,
J40, J41, J44, J45
3
18
J42, J58
2
J47
1
J54, J93, J94, J95, J96
5
J55
1
J56, J98
2
J91, J92
2
J97, J99
2
JB01, JB05
2
JB02, JB04
2
JB03
1
Reference designators shown on
next row (begins with JP01)
49
DESCRIPTION
L_TERMINAL STRIP, 10
PIN, DUAL ROW, VERT
CONN 2.1MM/5.5MM
PWRJACK RT ANGLE
PCB, closed frame, high
current 24VDC@5A also
requires 5V ACDC
adapter INPUT 100240VAC 50-60HZ 0.6A
OUTPUT DC 5V 2.6A.
PN DMS050260-P5P-SZ.
MODEL 3Z-161WP05
CONNECTOR,
STACKED OCTAL JACK,
64-PIN, SHIELDED
100 MIL 2 POS JUMPER
L_2 PIN HEADER, .100
CENTERS, VERTICAL
100 MIL 2*7 POS
JUMPER
L_RJ48 8 PIN SINGLE
PORT CONNECTOR
L_TERMINAL STRIP, 10
PIN, DUAL ROW, VERT
DO NOT POPULATE
HEADER, 14 PIN, DUAL
ROW, VERT
CONNECTOR,
PULSEJACK, 16 PIN
CONNECTOR,
FASTJACK SINGLE, 8
PIN FOR NATIONAL
PHY
SOCKET, SMD, 50 PIN,
2 ROW VERTICAL
PLUG, SMD, 50 PIN, 2
ROW VERTICAL
TESTPOINTS FOR SMD
50 PIN, 2 ROW
VERTICAL
100 MIL 2 POS JUMPER
DO NOT POPULATE
100 MIL 3 POS JUMPER
SUPPLIER
PART
Samtec
TSW-105-07-T-D
DIGIKEY
CP-002AH-ND
MOL
SD-44520-001
NA
NA
Samtec
TSW-102-07-T-S
NA
NA
MOLEX
15-43-8588
DNP
DNP
Samtec
HDR-TSW-107-14-T-D
Pulse
JK0654218Z
Halo
Electronics
HFJ11-2450E
Samtec
TFM-125-02-S-D-LC
Samtec
SFM-125-L2-S-D-LC
NA
NA_NOTPOPULATED
NOPOP
NA
NA
NA
JP01, JP02, JP03, JP04, JP05, JP06, JP07, JP08, JP09, JP10, JP11, JP12, JP13, JP14, JP15, JP16, JP17, JP18, JP19, JP20,
JP21, JP22, JP23, JP24, JP25, JP26, JP27, JP28, JP29, JP67, JP68, JP69, JP70, JP71, JP72, JP73, JP74, JP75, JP76, JP77,
JP78, JP79, JP80, JP81, JP82, JP83, JP84, JP85, JP86
R01, R02, R42, R43, RB01, RB02,
RB04, RB39, RB46, RB47, RB62,
RB87, RB88, RB89, RB90, RB91,
RB107, RB128, RB231, RB232
R03, R05, RB09, RB10, RB12,
RB14, RB26, RB28, RB96, RB97,
RB100, RB113, RB114, RB115,
RB116, RB118, RB120, RB122,
RB123
R04, RB03, RB05, RB07, RB13,
RB18, RB23, RB24, RB25, RB92,
RB99, RB101, RB104, RB106,
RB121
Rev: 030508
20
RES 0603 0.0 Ohm
1/16W 5%
Panasonic
ERJ-3GEY0R00V
19
RES 0603 30 Ohm
1/16W 5%
Panasonic
ERJ-3GEYJ300V
15
L_RES 0603 330 Ohm
1/16W 5%
Panasonic
ERJ-3GEYJ331V
14 of 39
_______________________________________________________________________________________ DS33X11DK
DESIGNATION
QTY
R06, R07, R39, R41
4
R08, RB06, RB15, RB17, RB19,
RB20, RB21, RB43, RB45
R09, R10, R11, R12, R14, R15,
R16, R17, R18, R19, R20, R21,
R22, R23, R24, R25, R26, R27,
R28, R29, R30, R31, R32, R33,
R34, R35, RB32, RB33, RB48,
RB49, RB50, RB51
R13, RB30, RB31, RB60, RB61,
RB109, RB110, RB111, RB127
32
R36, R40
2
R37, R38
2
RB08, RB41, RB98, RB108
4
RB11, RB95
2
RB119, RB246
2
RB125, RB126, RB129, RB245,
RB248, RB249
6
RB16, RB22, RB131, RB132
4
RB233, RB234, RB235, RB236,
RB239, RB241
6
RB237, RB238
2
RB27, RB124, RB130, RB247
4
RB29, RB34, RB35, RB36, RB37,
RB38
6
RB40, RB44, RB112, RB240,
RB242, RB243, RB244
7
RB42, RB117
2
RB52, RB53, RB54, RB55, RB56,
RB57, RB58, RB59, RB63, RB64,
RB65, RB66, RB67, RB68, RB69,
RB70, RB103, RB105
RB71, RB72, RB73, RB74, RB75,
RB76, RB77, RB78, RB79, RB80,
RB81, RB82, RB83, RB84, RB85,
RB86, RB93, RB94, RB102
RP01, RP02, RP03, RP04, RP05,
RP06, RP41, RP42, RP43, RP44,
RP48, RP49, RPB07, RPB10,
RPB109, RPB110
RP07, RP08, RP09, RP10, RP12,
RP45, RP46, RP47, RP50, RP51,
RPB15, RPB19, RPB93, RPB98,
RPB107, RPB108, RPB131,
RPB132, RPB144, RPB145
See next row (begins with RP11)
Rev: 030508
9
DESCRIPTION
RES 0603 24.3 Ohm
1/16W 1%
L_RES 0603 1.0K Ohm
1/16W 5%
RES 1206 61.9 Ohm
1/8W 1%
SUPPLIER
PART
Panasonic
ERJ-3EKF24R3V
Panasonic
ERJ-3GEYJ102V
Panasonic
ERJ-8ENF61R9V
Panasonic
ERJ-3GEYJ103V
Panasonic
ERJ-3GEYJ105V
Panasonic
ERJ-6ENF61R9V
Panasonic
ERJ-3GEYJ103V
Panasonic
ERJ-3GEYJ152V
Panasonic
ERJ-3EKF9761V
L_RES 0603 10K Ohm
1/16W 5%
RES 0603 1.0M Ohm
1/16W 5%
RES 0805 61.9 Ohm
1/10W 1%
RES 0603 10K Ohm
1/16W 5%
RES 0603 1.5K Ohm
1/16W 5%
RES 0603 9.76K Ohm
1/16W 1%
RES 0603 2.0K Ohm
1/16W 5%
L_RES 0603 0 Ohm
1/16W 1%
RES 0603 2.2K Ohm
1/16W 5%
RES 0603 4.87K Ohm
1/16W 1%
RES 0603 330 Ohm
1/16W 5%
RES 0603 51 Ohm
1/10W 5% - SEE
SPECIAL
INSTRUCTIONS
RES 0603 30 Ohm
1/16W
RES 0805 10K Ohm
1/10W 1%
Panasonic
ERJ-3GEYJ202V
AVX
CJ10-000F
Panasonic
ERJ-3GEYJ222V
Panasonic
ERJ-3EKF4871V
Panasonic
ERJ-3GEYJ331V
Panasonic
ERJ-3GEY0R00V
Panasonic
ERJ-3GEYJ300V
Panasonic
ERJ-6ENF1002V
18
RES 0603 332 Ohm
1/16W 1%
Panasonic
ERJ-3EKF3320V
19
RES 0603 51 Ohm
1/16W 5%
Panasonic
ERJ-3GEYJ510V
16
4 PACK RESISTOR 24
OHM 2 PCT
KOA
CN1J4TTD240G
20
4 PACK RESISTOR 50
OHM 2 PCT
KOA
CN1J4TTD500G
62
4 PACK RESISTOR 30
OHM 5% QUAD 0402
PANASONIC
EXB-N8V300JX
9
15 of 39
_______________________________________________________________________________________ DS33X11DK
DESIGNATION
QTY
DESCRIPTION
SUPPLIER
PART
RP11, RP13, RP15, RP16, RP17, RP18, RP19, RP20, RP25, RP26, RP27, RP28, RP29, RP30, RP31, RP32, RP33, RP34, RP35,
RP36, RP37, RP38, RP39, RP84, RP85, RP86, RP87, RP88, RP89, RP91, RP92, RP93, RP94, RPB05, RPB08, RPB09, RPB11,
RPB13, RPB16, RPB18, RPB21, RPB24, RPB25, RPB30, RPB35, RPB43, RPB44, RPB51, RPB52, RPB58, RPB59, RPB60,
RPB61, RPB62, RPB63, RPB64, RPB65, RPB84, RPB87, RPB91, RPB99, RPB143
RP14, RPB04, RPB06, RPB14,
RPB20, RPB22, RPB54, RPB55,
RPB56, RPB66, RPB77, RPB79,
4 PACK RESISTOR 10K
22
PANASONIC
EXB-N8V103JX
RPB89, RPB92, RPB94, RPB95,
OHM 5% QUAD 0402
RPB96, RPB97, RPB100, RPB101,
RPB103, RPB150
RP21, RP22, RP23, RP24, RPB26,
RPB27, RPB28, RPB29, RPB31,
RPB32, RPB33, RPB34, RPB36,
4 PACK RESISTOR 20
24
PANASONIC
EXB-N8V200JX
RPB38, RPB39, RPB40, RPB41,
OHM 5% QUAD 0402
RPB42, RPB45, RPB46, RPB47,
RPB49, RPB50, RPB53
RP40, RP90, RPB01, RPB02,
RPB03, RPB12, RPB17, RPB37,
RPB57, RPB67, RPB68, RPB69,
4 PACK RESISTOR 1K
23
PANASONIC
EXB-N8V102JX
RPB70, RPB71, RPB74, RPB78,
OHM 5% QUAD 0402
RPB80, RPB82, RPB83, RPB85,
RPB90, RPB104, RPB149
RPB23, RPB48, RPB72, RPB73,
4 PACK RESISTOR 330
RPB75, RPB76, RPB81, RPB86,
13
PANASONIC
EXB-N8V331JX
OHM 5% QUAD 0402
RPB102, RPB105, RPB133,
RPB135, RPB147
RPB88, RPB106, RPB134,
RPB136, RPB137, RPB138,
4 PACK RESISTOR 2.2K
12
PANASONIC
EXB-N8V222JX
OHM 5% QUAD 0402
RPB139, RPB140, RPB141,
RPB142, RPB146, RPB148
SWITCH MOM 4PIN
SW01
1
Panasonic
EVQPAE04M
SINGLE POLE
XFMR, OCTAL T3/E3, 1
T01, T02, T03
3
Pulse
T3049
TO 2, SMT 32 PIN
XFMR, XMIT/RCV, 1 TO
TB01, TB02, TB03, TB04
4
2 AND 1 TO 1, SMT 32
Pulse
TX1475
PIN
XFMR, 1CT_1CT &
TB05
1
Pulse
TX1277
1CT_2CT, 12P SMT
TP01, TPB01, TPB02, TPB07,
TESTPOINT, 1 PLATED
NA
NA
6
TPB08, TPB09
HOLE, DO NOT STUFF
U01, U19
2
USB UART (USB - 8 bit
FIFO), 32 PIN LQFP
FTD
FT245BM
U02
1
ETHERNET EXTENSION
DEVICE 16 WAN 2 LAN
DALLAS
SEMICONDUC
TOR
NA
U03, UB29
2
Atmel
AT25F2048N-10SU-2.7
U04, U05, U06, U07, U11, U22,
UB12, UB14, UB15, UB17, UB19,
UB34
12
Philips
CBT3244APW
U08, U15
2
Dallas
Semiconductor
DS26528N
U09, U10, U12, UB13, UB18, UB20
6
Philips
CBT3244APW-T
U13, U23, UB22, UB33
4
NA
NA
U14, U24
2
Lattice
LFEC3E-3T144C
Rev: 030508
SPI SERIAL EEPROM
2M 8 PIN SOIC 2.7V to
3.6V
IC, OCT BUFFER FET
SWITCH 5V 20-PIN
TSSOP
IC, OCTAL
TRANSCEIVER 0-70C
256P BGA
BAD PARTNUM IC, OCT
BUFFER FET SWITCH
5V TSOP
CYPRESS SRAM, LAB
STOCK
IC, FPGA, 1.2V, 20X20
TQFP, 144 PIN
16 of 39
_______________________________________________________________________________________ DS33X11DK
DESIGNATION
QTY
U16, U17
2
U18, U27
2
U20
1
U21
1
U25
1
U26, U33
2
U31, U32
2
UB01, UB28, UB70
3
UB02, UB36
2
UB03, UB35
2
UB04, UB30
2
UB05, UB06, UB37, UB38
4
UB07, UB08, UB09, UB11, UB16,
UB23, UB24, UB25, UB26, UB27
10
UB10, UB31
2
UB21, UB32
2
XB01, XB02
2
Y01, YB07
2
YB01, YB03, YB09, YB11
4
YB02, YB10
2
YB04
1
YB05
1
Rev: 030508
DESCRIPTION
QUAD TRIPLE DUAL
SINGLE ATM PACKET
PHYs FOR DS3 E3 STS1
0-70C 400P BGA
MMC2107 PROCESSOR
DS3/E3 SCT, 11X11
CSBGA, 100 PIN
IC, SINGLE T1 E1 J1
TRANSCEIVER, 10X10
LQFP, 64-PIN
ETHERNET EXTENSION
DEVICE 1 WAN 2 LAN
GIG PHYTER V,
10/100/1000 ETHERNET
PHYSICAL LAYER, 128
PIN QFP
IC, DP83848C PHYTER
10/100 ETHERNET
TRANSCEIVER, 48 PIN
TQFP
HIGH SPEED BUFFER
SINK SOURCE DDR
TERMINATION
REGULATOR
DOUBLE DATA RATE
(DDR) SDRAM 2-2-2
TIMING 256MBITX16
TSSOP
IC, LINEAR REG 1.5W,
1.8V or Adj, 1A,
16TSSOP-EP
IC, LINEAR REG 1.5W,
2.5V or Adj, 1A,
16TSSOP-EP
IC, LINEAR REG 1.5W,
3.3V or Adj, 1A,
16TSSOP-EP
Dual RS-232 transceivers
with 3.3V/5V internal
capacitors
IC, LDO REGULATOR
WITH RESET,1.20V
OUTPUT 300 MA, 6 PIN
SOT23
XTAL LOW PROFILE
8.0MHZ
XTAL, LOW PROFILE,
6.00 MHZ
SOCKETED
OSCILLATOR,
CRYSTAL CLOCK, 3.3V
- 125.000 MHZ
SOCKETED
OSCILLATOR,
CRYSTAL CLOCK, 3.3V
- 25.000 MHZ
OSCILLATOR,
CRYSTAL CLOCK, 5.0V
- 44.736 MHZ
OSCILLATOR + Socket,
CRYSTAL CLOCK, 3.3V
- 2.048 MHZ
SUPPLIER
PART
Dallas
Semiconductor
DS3184
Motorola
MMC2107
Dallas
Semiconductor
DS3170
Dallas
Semiconductor
DS26521
Dallas
Semiconductor
NA
National
Semiconductor
DP83865BVH
National
Semiconductor
DP83848C
FAIRCHILD
NC7SZ86
AVNET
LP2995M
MICRON
NA
Maxim
MAX1793EUE-18
Maxim
MAX1793EUE-25
Maxim
MAX1793EUE-33
MAXIM
NA
Maxim
MAX1963EZT120-T
ECL
EC1-8.000M
Pletronics
LP49-26-6.00M
ECLIPTEK
EC1325HSTS-125.000M+SOCKET
SaRonix
NTH089AA3-25.000+SOCKET
SaRonix
NTH089AA-44.736
SaRonix
SOCKET+NTH039A3-2.0480
17 of 39
_______________________________________________________________________________________ DS33X11DK
DESIGNATION
QTY
YB06
1
YB08
1
YB12
1
YB13
1
Rev: 030508
DESCRIPTION
OSCILLATOR + Socket,
CRYSTAL CLOCK, 5V 1.544 MHZ
OSCILLATOR,
CRYSTAL CLOCK, 3.3V
- 44.736 MHZ
OSCILLATOR,
CRYSTAL CLOCK, 3.3V
- 1.544 MHZ
OSCILLATOR,
CRYSTAL CLOCK, 3.3V
- 2.048 MHZ
SUPPLIER
PART
SaRonix
SOCKET+NTH039A-1.5440
SaRonix
NTH089AA3-44.736
SaRonix
NTH039A3-1.5440
SaRonix
NTH039A3-2.0480
18 of 39
_______________________________________________________________________________________ DS33X11DK
9.
Schematics
The DS33X11DK schematics are featured in the following pages. As this is a hierarchal schematic some
explanation follows. The schematic contains six hierarchal blocks: the microcontroller, DS26521, DS3170, Ethernet
PHY, Ethernet Test Points, and Power Supply.
All signals inside a hierarchy block are local, with exception for VCC and ground. In-port and out-port connectors are
used to allow signals inside a hierarchy block to become accessible as pins on the hierarchy blocks symbol. From
here blocks are wired together as if they were ordinary components. The system diagram is shown again below,
with schematic page numbers given for each functional block.
DS33X11 PCB LAYOUT AND SCHEMATIC HIERARCHY BLOCK PAGE LISTING
DS3170 LIU BLOCK
PAGE 5 SYMBOL
DS26521 BLOCK
PAGE 5 SYMBOL
SCHEMATIC
PAGE 21
SCHEMATIC
PAGES 22–23
DS33X11 SECTION
CONTAINS SIX
HIERARCHY
BLOCKS
SCHEMATIC
PAGES 4–11
ETHERNET PHY
PAGE 7 SYMBOL
SCHEMATIC
PAGES 19–20
ETHERNET
TEST POINTS
PAGE 7 SYMBOL
SCHEMATIC
PAGE 18
DS33X11
SCHEMATIC
PAGES 4–8
POWER SUPPLY
PAGE 10 SYMBOL
µP BLOCK
PAGE 4 SYMBOL
SCHEMATIC
PAGE 17
SCHEMATIC
PAGES 12–16
Rev: 030508
19 of 39
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses
are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600
© 2008 Maxim Integrated Products
is a registered trademark of Maxim Integrated Products.
A
B
8
INT5
CS_X1
CS_X2
PHY_INT
X162_CS
TE1_L_CS
7
INT4
TE3_INT
RESET_SYS
ADDR
WR_DUT
WR
DATA
SPI_MISO
SPI_SCK
SPI_CS
SPI_MOSI
BLOCK
MISC_IO
MISC_IO
MISC_IO
MISC_IO
MISC_IO
TE1_ENL
SPI_MISO
SPI_SCK
SPI_SS
SPI_MOSI
6
_ds33x11dk_dn.
LOOP_SOURCETIME_B
LOOP_SOURCETIME_A
ENABLE_CALLBACKS_H
ENABLE_DRIVER_H
BLOCK NAME:
_motprocrescard_dn
RESET_IN
A_DUT_
D_DUT
RD_DUT
CS_X5
CS_X4
RD
TE3_L_CS
INT3
TE1_INT
CS_X3
INT2
X162_INT
HIERARCHY
MICROPROCESSOR
L5
D7_SPI_CPOL
PARENT BLOCK:
5
K5
D6_SPI_CPHA
\_rc_top_dn_\
G5
J5
D5_SPI_SWAP
X162_INT
L4
D2_SPI_CLK
J3
K4
D1_SPI_MOSI
X162_CS
J4
4
INT*
CS*
SPI_CPOL
SPI_CPHA
SPI_SWAP
SPI_CLK
SPI_MOSI
SPI_MISO
F1
VDD_1.8V
V1_8
INTERFACE
DS33X11_U
MICROPORT
M11
VDD_1.8V
VSS
F6
D0_SPI_MISO
L1
G6
VDD_1.8V
VSS
C
VSS
F7
U25
VSS
J7
P.4,12-16
P.5,21(T3),22-23(T1)
P.6-7,18,19-20
P.8
P.7
P.9
P.10-11,17
M1
MICROPORT.
WAN.
ETHERNET.
DDR MEMORY.
OSCILLATORS.
BIAS+CONFIG.
POWER.
G7
VDD_1.8V
3
V3_3
JTDO
JTDI
JTCLK
JTMS
RST*
HIZ*
NC_GND
NC_GND
NC_GND
ENGINEER:
STEVE SCULLY
MICROPORT.
F10
P.4,12-16
2
4
STMD 3
2
RESET_SYS 1
F3
K2
L6
K6
4
1
3
U3
1
4
1
4/76(TOTAL)
PAGE: 1/8(BLOCK)
06/07/2006
STMD
V3_3
RPB92
RPB97
INVERTER
5
6
7
5
8
6
DATE:
NC7SZ86_U
10K
10K
10K
7
E12
2
DUT_SYSCLK
G4
F4
F5
K3
L2
DUT_JTRST_N
H2
8
DUT_JTDO
H3
1
DUT_JTCLK
DUT_JTDI
G3
DUT_JTMS
RESET_SYS
DUT_HIZ_N
G2
F2
OF DS33X11DK
NC_VCC
NC_DNU
NC_DNU
NC_DNU
NC_DNU
SYSCLK
JTRST_N
2
DS33X42X82X162EE01A0
BEGINNING
TITLE:
VSS
D
M5
VDD_1.8V
J6
INDEX
VSS
CONTENTS /
H12
VDD_1.8V
3
K1
4
H6
VD_3.3V
VSS
DS33X11DK
5
H7
VD_3.3V
VSS
6
M7
VD_3.3V
VSS
7
M2
VD_3.3V
VSS
8
F11
VD_3.3V
M6
VSS
M9
K12
VD_3.3V
F12
VDD_1.8V
G11
H1
VD_3.3V
M12
FLOAT
GROUND
A
B
C
D
A
B
C
D
8
8
JTDI
WAN_JTDI
JTDO
JTRST
WAN_JTDO
WAN_JTRST
CS
TE3_L_CS
V3_3
4
TE1_TSYNC1
7
TE1_RDATA1
7
9
TE1_RSYNC1
3
5
8
TE1_RGCLK1
6
2
19
1
2Y4
2Y3
2Y2
2Y1
1A4
1A3
1A2
1A1
17
15
13
11
12
14
16
18
10
TE1_RSYNC1
RSYNC521
6
17
15
13
11
12
14
16
18
10
_ds33x11dk_dn.
PORT1_TE3_ENL
WAN_RDATA1
WAN_RSYNC1
WAN_RGCLK1
WAN_TSYNC1
WAN_TGCLK1
V5_0
2A4
2A3
2A2
2A1
1Y4
1Y3
1Y2
1Y1
PORT1_TE3_ENL
3
5
7
9
8
6
4
2
19
PARENT BLOCK:
5
2Y4
2Y3
2Y2
2Y1
1A4
1A3
1A2
1A1
2OE*
1OE*
OCTAL
FET SWITCH
GND
VCC
CBT3244A_U
U22
\_rc_top_dn_\
TE3_RDATA1
TE3_RSYNC1
TE3_RGCLK1
TE3_TSYNC1
TE3_TGCLK1
4
WAN.
3
STEVE SCULLY
4
3
2
1
30
5
6
7
RPB91 8
TDATA1
TSYNC1
TCLK1
RSYNC1
RDATA1
RCLK1
U25
2
1
TE3_TDATA1
TE1_TDATA1
1
5/76(TOTAL)
PAGE: 2/8(BLOCK)
DATE:
06/07/2006
WAN INTERFACE
DS33X11_U
WAN_RDATA1
WAN_RSYNC1
WAN_RGCLK1
P.5,21(T3),22-23(T1)
DS33X42X82X162EE01A0
ENGINEER:
TITLE:
WAN_TDATA1
WAN_TDATA1
TE3_TGCLK1
TE3_TGCLK
L3
M4
WAN_TSYNC1
TE3_RGCLK1
TE3_TSOFO
TE3_RGCLK
J1
J2
G1
10
8
6
4
2
M3
WAN_RSYNC1
1
10
8
6
4
2
CONN_10P
9
7
5
3
1
2
WAN_TGCLK1
20
9
7
5
3
1
WAN_RGCLK1
WAN_TDATA1
WAN_TSYNC1
WAN_TGCLK1
J54
TE3_RSYNC1
3
WAN_RDATA1
4
TE3_TDATA1
TE3_RDATA1
TE1_TSYNC1
TE1_TDATA1
5
TE3_TSYNC1
TE3_RSOFO
TE3_TSER
TE3_RSER
TE3_TCLKI
TE3_RCLKI
TSYNC521
TSER521
TCHCLK521
TE1_RDATA1
RSER521
TE1_TGCLK1
TE1_RGCLK1
6
RCHCLK521
BLOCK NAME:
2A4
2A3
2A2
2A1
1Y4
1Y3
1Y2
1Y1
GND
VCC
OCTAL
FET SWITCH
2OE*
1OE*
20
_TE3WAN_DN
CBT3244A_U
UB34
RESET_B
TE1_TGCLK1
TE1_ENL
RESET_SYS
WR
RD
RD
WR
ADDR
DAT
DATA
T3_INT
JTDI
WAN_JT1TOT3_TD
TE3_INT
ADDR
JTCLK
WAN_JTCK
WR_DUT
WR
JTMS
CS_X3
TE1_L_CS
WAN_JTMS
RD_DUT
D_DUT
A_DUT
INT521
RD
DATA
TE1_INT
ADDR
RESET521
RESET_SYS
_ds26521dk01a0dutdn_
JTRST
WAN_JTRST
JTDO
JTCLK
WAN_JTCK
WAN_JT1TOT3_TD
JTMS
WAN_JTMS
7
A
B
C
D
A
B
C
D
8
8
7
7
H10
2
6
BLOCK NAME:
ETH_RXD
K10
6
U25
RXD[7]
RXD[6]
RXD[5]
RXD[4]
RXER1
CRS1
RXDV1
RXD[3]
RXD[2]
RXD[1]
RXD[0]
COL1
_ds33x11dk_dn.
K11
L11
5
7
L10
G9
ETH_RX_ERR
4
G12
F9
H11
J11
1
3
J10
0
G10
ETH_RX_CRS
ETH_RXDV
ETH_RXD
ETH_COL_DET
6
PARENT BLOCK:
5
INTERFACE
DS33X11_U
ETHERNET
5
GTX_CLK1
M10
PB_GMII_CLKFROM_MAC
REFCLK
M8
DUT_REF_CLK
MDIO
H4
ETH_MDIO
MDC
H5
ETH_MDC
RMII_SEL
4
4
TXD[7]
TXD[6]
TXD[5]
TXD[4]
TXER1
TXEN1
TXCLK1
TXD[3]
TXD[2]
TXD[1]
TXD[0]
RXCLK1
\_rc_top_dn_\
K7
DUT_RMII_SEL
DCE_SEL
L7
DUT_DCE_SEL
3
4
1
2
H8
H9
L12
F8
1
2
3
4
L8
K8
L9
K9
4
3
2
J9
G8
1
30
J8
J12
7
5
6
5
6
30
5
6
7
RP35 8
30
7
RP33 8
30
RP37 8
RB122
ETH_GMII_TX_ER_
ETH_TX_EN
ETH_TX_CLK
ETH_TXD
7
6
5
4
3
2
ENGINEER:
STEVE SCULLY
2
P.6-7,18,19-20
DS33X42X82X162EE01A0
ETHERNET.
TITLE:
ETH_TXD
ETH_GMII_CLKFROM_MAC
PB_GMII_CLKFROM_MAC
3
2
1
0
ETH_RX_CLK
3
06/07/2006
1
6/76(TOTAL)
PAGE: 3/8(BLOCK)
DATE:
1
A
B
C
D
A
B
C
D
8
4
1
25.000MHZ_3.3V_SOCKET
125.000MHZ_3.3V_SOCKET
8
4
1
GND
1
7
OSC
YB10
GND
1
OSC
YB11
7
OUT
VCC
OUT
VCC
V3_3
RB114
30
6
BLOCK NAME:
USE CLK_TO_MAC
JP15
JMP_3
30
RB115
IN
GMII
R7
0.0
30
MODE
V3_3
PT1_RX_ERR
RX_ERR
AV_REF_CLK
PARENT BLOCK:
\_rc_top_dn_\
RESET_B
PHY_INT
PHY_INT
RESET_SYS
ETH_MDC
ETH_MDIO
TITLE:
3
ENGINEER:
STEVE SCULLY
2
1
7/76(TOTAL)
PAGE: 4/8(BLOCK)
DATE:
06/07/2006
CLK_TO_MAC_TESTPNT
ETH_GMII_TX_ER_
ETH_GMII_CLKFROM_MAC
P.6-7,18,19-20
DS33X42X82X162EE01A0
ETHERNET.
SPARE
GMII_CLKFROM_MAC
GMII_TX_ER_
GMII_CLKTOMAC_BUF
ETHERNET (LAN)
CONNECTORS
_phy_imbus_mb_dn
1
ETHERNET CONNECTOR (I.M.
BUS)
IS INTENDED FOR USE AS TESTPOINTS
NOT CONNECTION TO A RESOURCE CARD
RESET_B
PHY_INT
MDC
MDIO
OSC25M
PY25MHZOSC
PHYOSC25M
MDC
MDIO
REF_CLK
AV_REF_CLK
PT2_TX_EN
PT2_TX_CLK
PT2_TXD
PT2_RX_ERR
PT2_RX_CRS
PT2_RX_CLK
PT2_RXDV
PT2_RXD
REF_CLK
4
CLK_TO_MAC
CLK_TO_MAC_TESTPNT
ETH_GMII_CLKFROM_MAC
TX_ER_
CLKTOMAC
CLKTOMAC_TESTPNT
GMII_CLKFROM_MAC
ETH_TXD
ETH_GMII_TX_ER_
TX_EN
ETH_RXD
PT1_TX_EN
ETH_TX_EN
PT2_COL_DET
PT1_TX_CLK
ETH_TX_CLK
TXD
PT1_TXD
PT1_RX_CRS
ETH_RX_CRS
ETH_RX_ERR
RX_CRS
ETH_TXD
PT1_RX_CLK
ETH_TXD
PT1_RXDV
PT1_RXD
PT1_COL_DET
ETH_RX_CLK
RXDV
2
SINGLE 50 PIN
I.M.
CARD PLUG-CONNECTORS
USED ON BOTTOM OF MOTHERBOARD
FOR CONNECTION TO ETHERNET CARD
RX_CLK
ETH_RXD
3
TX_CLK
SPARE
5
ETH_COL_DET
ETH_RXD
4
ETH_RXDV
RXD
COL_DET
_phy_dp83865bvh_dn
5
DUT_REF_CLK
RB116
_ds33x11dk_dn.
2
DUT_REF_CLK:
RMII (50 MHZ)
GMII (125
MHZ)
MII
(25 MHZ)
DUT_SYSCLK
6
PY25MHZOSC
RB118
30
CLK_TO_MAC
5
8
5
8
V3_3
3
1
ONLY
GMII
R101
2.2K
A
B
C
D
A
B
C
8
B4
D3
11
12
D5
B5
C5
E5
A7
A8
A5
E6
E7
DDR_CAS
DDR_RAS
DDR_WE
DDR_CKE
DDR_CKINV
DDR_CK
DDR_CS
DDR_LDM
DDR_UDM
C4
C3
10
D4
A4
9
DDR_BA0
B3
DDR_BA1
E2
C2
6
7
E1
5
8
C1
D1
3
4
B2
2
7
SD_UDM
SD_LDM
SD_CS*
SD_CLK
SD_CLK*
SD_CLKEN
SD_WE*
SD_RAS*
SD_CAS*
SD_BA[1]
SD_BA[0]
SD_A[12]
SD_A[11]
SD_A[10]
SD_A[9]
SD_A[8]
SD_A[7]
SD_A[6]
SD_A[5]
SD_A[4]
SD_A[3]
SD_A[2]
A12
SD_A[1]
DDR INTERFACE
DS33X11_U
D12
AVDD_1.8V
VSSO
E11
D2
C7
VDDQ_2.5V
E3
6
BLOCK NAME:
VSSO
1
A2
VDDQ_2.5V
A6
VSSO
SD_A[0]
E10
VDDQ_2.5V
VSSO
B6
A3
B12
VDDQ_2.5V
B7
VSSO
0
E4
VDDQ_2.5V
A1
VSSO
DDR_A
B1
VDDP_2.5V
C12
VSSO
C6
VDDP_2.5V
AVSS
U25
D6 VREF_FROM_VREG
VREF
_ds33x11dk_dn.
SD_DQ[0]
SD_DQ[1]
SD_DQ[2]
SD_DQ[3]
SD_DQ[4]
SD_DQ[5]
SD_DQ[6]
SD_DQ[7]
SD_DQ[8]
SD_DQ[9]
SD_DQ[10]
SD_DQ[11]
SD_DQ[12]
SD_DQ[13]
SD_DQ[14]
SD_DQ[15]
SD_LDQS
SD_UDQS
CB431
V2_5
12
C9
10
9
8
7
6
5
4
3
2
1
0
B8
D8
C8
C10
D10
B10
A10
C11
D11
B11
A11
11
13
15
PARENT BLOCK:
5
V2_5
DDR_DQ
DDR_LDQS
D9
E9
FOR DDR
VREF_FROM_VREG
DDR_UDQS
14
4.7UF
B9
A9
E8
D7
1
C156
2
V2_5
.1UF
V1_8
4.7UF
CB425
R3
4.87K
R4
4.87K
0.1UF
C135
D
.1UF
\_rc_top_dn_\
4
C150
C134
4.7UF
V2_5
C139
.01UF
C142
.01UF
C267
4.7UF
CB443
4.7UF
C151
4
38
37
36
35
32
31
30
29
7
6
5
4
3
2
1
0
26
DDR_BA0
39
27
DDR_BA1
8
22
DDR_CAS
40
23
DDR_RAS
9
21
DDR_WE
28
44
DDR_CKE
10
45
DDR_CK
41
24
DDR_CS
11
46
DDR_CKINV
42
20
DDR_LDM
12
47
3
DDR_UDM
DDR_A
TPB02
C146
RESISTOR DIVIDER
COMPONENT VALUES
OF 4.87K
1% WAS CHOSEN TO SIMPLIFY
BOM
(THE DP83848 PHY USES THE SAME VALUE RESISTOR)
C152
3
ENGINEER:
STEVE SCULLY
2
P.8
DS33X42X82X162EE01A0
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
LDQS
UDQS
3
2
1
0
5
4
2
06/07/2006
1
8/76(TOTAL)
PAGE: 5/8(BLOCK)
DATE:
DDR_DQ
4
7
8
54
8
9
56
5
10
57
10
11
59
7
12
60
6
13
62
11
14
63
13
15
DDR_LDQS
16
65
DDR_UDQS
1
51
VREF_FROM_VREG
MT46V16M16BG75
UB35
DDR MEMORY.
TITLE:
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
BA0
BA1
CAS
RAS
WE
CKE
CK
CS
CK_INV
LDM
UDM
V2_5
2
DNU
DNU
19
50
5
.1UF
NC
NC
NC
NC
NC
14
53
43
25
17
6
.1UF
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
58
6
64
12
52
7
CB461
VSS
VSS
VSS
48
34
66
8
4.7UF
18
1
33
VDD
VDD
VDD
.01UF
15
55
9
3
61
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
C136
49
VREF
4.7UF
A
B
C
D
A
B
C
8
3
4
DUT_JTDI
2
DUT_JTCLK
DUT_JTRST_N
1
DUT_JTMS
7
9
5
WAN_JTDO
3
VCC
TDO
TDI
TCK
7
10K
5
6
7
RPB1018
CONN_10P
GND
7
5
3
1
TMS
2
10
8
6
4
330
5
6
7
RPB1058
5
30
4
3
2
1
2
V3_3
2
WAN_JTDI
WAN_JTCK
WAN_JTMS
DS40
2
_ds33x11dk_dn.
6
DUT_JTDI
DUT_JTDO
V3_3
BLOCK NAME:
7
6
RB127
10K
8 RPB99
DUT_JTCLK
DUT_JTMS
4
X162_INT
1
3
DUT_RMII_SEL
WAN_JTRST
DUT_JTRST_N
2
DUT_DCE_SEL
J57
1
DUT_HIZ_N
6
3
1
7
3
1
D
8
3
1
JP29
JP28
5
5
PARENT BLOCK:
JP22
\_rc_top_dn_\
4
4
7
SPI_SS
5
6
7
5
6
1K
4
3
1
2
7
9
4 7
8 RPB80
3 5
3
1
5
1K
2
7
6
13
11
14
12
10
8
6
4
2
14
12
10
8
6
4
2
10
8
6
4
2
CONN_10P
9
7
5
3
1
J50
10
8
6
4
2
CONN_14P
1
4
313
211
8 RPB78
1K
9
7
5
3
1
J55
5
6
7
TE1_ENL
LOOP_SOURCETIME_B
LOOP_SOURCETIME_A
10K
RPB100
8
ENABLE_CALLBACKS_H
ENABLE_DRIVER_H
D7_SPI_CPOL
D6_SPI_CPHA
D5_SPI_SWAP
X162_CS
D2_SPI_CLK
D1_SPI_MOSI
D0_SPI_MISO
2
4
3
2
1
1
IS
3
DS33X11
ENGINEER:
STEVE SCULLY
2
P.9
DS33X42X82X162EE01A0
NOT USED WITH
BIAS+CONFIG.
TITLE:
LOOP_SOURCETIME_B:
06/07/2006
1
9/76(TOTAL)
PAGE: 6/8(BLOCK)
DATE:
LOOP_SOURCETIME_A:
(IN
DRIVER MODE ONLY)
WHEN JUMPER IS INSTALLED
WAN PORTS 1-4 AND 9-12
HAVE TCLK
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