DSTINIM410#

DSTINIm410 Networked Micro Evaluation Board www.maxim-ic.com GENERAL DESCRIPTION FEATURES The DSTINIm410 is a fully assembled and tested circuit board that evaluates the DS80C410 network microcontroller. In addition to the DS80C410, the DSTINIm410 includes a real-time clock, 1MB flash, 1MB static RAM, and support for an external Ethernet PHY for connecting to a wide variety of networks. The circuit board is designed as a module to be plugged into a 144-pin SODIMM connector. For evaluation, the DSTINIm410 can be inserted into the DSTINIs400 socket board. The combination of the two boards allows full evaluation of the features of the DS80C410 using an Ethernet network. Hosts the TINI® Runtime Environment in Validated Hardware Design (in Conjunction with the DSTINIs400) Industry Standard MII Interface to Connects to Network Interfaces Including 10/100 Base-T, Optical, and HomePNA Three Hardware Serial Ports Integrated 1-Wire® Network Master CAN 2.0B Port Real-Time Clock for Time Stamping Detailed information about the initial setup process and use of the TINI platform is contained in Application Note 612: Getting Started with the TINIm400 (DS80C400) Verification Module. 1MB Flash ROM for Application Storage 1MB NV SRAM for Data Storage 3.3V Single-Supply Operation ORDERING INFORMATION PART TEMP RANGE DSTINIm410 Room temp DSTINIm410# Room temp Fully Assembled and Tested Design DIMENSIONS Approx. 67mm x 48mm, 144 SODIMM Approx. 67mm x 48mm, 144 SODIMM Note: To evaluate the DS80C410, order the DSTINIm410 and DSTINIs400. # Denotes a RoHS-compliant device that may include lead that is exempt under the RoHS requirements. TINI and 1-Wire are registered trademarks of Dallas Semiconductor. COMPONENT LIST DESIGNATION QTY DESCRIPTION C1–C5, C8–C14, C17, C18 14 C6, C7 2 27pF, ±20%, 50V C0G ceramic capacitors (0805) C15 1 1.0μF, ±20%, 10V ceramic capacitor (1206) C16 1 4.7μF, ±20%, 10V ceramic capacitor (1206) C19, C20 2 47μF, ±20%, tantalum capacitors (C) BT1 1 CR1632 3V lithium cell DN1 1 BAT54S diode (SOT23) 0.1μF, ±20%, 10V ceramic capacitors (0805) 1 of 5 DESIGNATION QTY DS1 1 DESCRIPTION SML-LX23SRC Lumex LED BSS84 P-Channel FET (SOT23) 2N7002 N-Channel FET (SOT23) Q1, Q3 2 Q2 1 R1, R4, R7, R8 4 10kΩ, ±5% resistors (0805) R2 1 1.5kΩ, ±5% resistor (0805) R3 1 1kΩ, ±5% resistor (0805) R5 1 2.2kΩ, ±5% resistor (0805) REV: 071706 DSTINIm410 Networked Microcontroller Eval Board COMPONENT LIST (continued) DESIGNATION QTY R6 1 U1 1 U2, U3 2 U4 1 U5, U6 2 DESCRIPTION DESIGNATION QTY U7 1 MAX1792EUA18 voltage regulator U8 1 DS1672U-33 real-time clock U9 1 DS2502-E48 IEEE MAC address AM29LV081B-70EC 1MB flash Y1 1 14.7456MHz crystal MAX6365PKA31 reset controller Y2 1 32kHz crystal 10Ω, ±5% resistor (0805) DS80C410-FNY networked microcontroller R1LV0408CSB-7LC 512kB RAM DESCRIPTION QUICK START It is highly recommended that the developer use the DSTINIs400 sockets board in conjunction with the DSTINIm410. The DSTINIs400 was specifically designed to hold the DSTINIm410 and provide the physical interconnects (Ethernet PHY), as well as the 1-Wire, I2C, SPI™, CAN, and four serial port connectors. If the developer wishes to implement his or her own design using the DSTINIm410, a 144-pin SODIMM connector such as the Hirose SX6E-144S-0.8SH is required. The DSTINIm410 must be seated correctly into the DSTINIs400 to ensure a proper connection. Insert the DSTINIm410 into the connector at a 30-degree angle. Place index fingers behind the SODIMM connector and place thumbs on the top edge of the DSTINIm410, pressing firmly until it clicks into place or seats with only a millimeter of gold contact exposed. Press the DSTINIm410 down parallel to the DSTINIs400 until the side arms latch into the center of the semicircular cutouts on the DSTINIm410. Note that the flash used on the DSTINIm410 limits applications to a maximum of 2x clock multiplier mode with the included 14.7456MHz crystal. Use of the 4x clock multiplier mode results in unstable operations. FOR MORE INFORMATION TINI platform details can be found at www.maxim-ic.com/TINI. The TINI Specification and Developer’s Guide (Addison-Welsey, 2001) is an invaluable resource when developing with the TINI platform. Download a free copy from our website at www.maxim-ic.com/TINIguide. DS80C410 INFORMATION For more information about the DS80C410 network microcontroller, refer to the DS80C410 data sheet available on our website at www.maxim-ic.com/DS80C410. ADDITIONAL RESOURCES For detailed information about the initial setup and use of the TINI platform, refer to Application Note 612: Getting Started with the TINIm400 (DS80C410) Verification Module at www.maxim-ic.com/appnoteindex. DS80C410 Networked Microcontroller Data Sheet: www.maxim-ic.com/DS80C410 DSTINIm400 Networked Microcontroller Evaluation Board: www.maxim-ic.com/DSTINIm400 DSTINIs400/DSTINIs-00x Sockets Evaluation Board: www.maxim-ic.com/DSTINIs400 Microcontroller Website: www.maxim-ic.com/microcontrollers SPI is a trademark of Motorola Inc. 2 of 5 Maxim/Dallas Semiconductor cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim/Dallas Semiconductor product. No circuit patent licenses are implied. Maxim/Dallas Semiconductor reserves the right to change the circuitry and specifications without notice at any time. Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 © 2006 Maxim Integrated Products The Maxim logo is a registered trademark of Maxim Integrated Products, Inc. The Dallas logo is a registered trademark of Dallas Semiconductor Corporation. TxClk MDC R2 SClk SDa nWr nRd P5[3:0] Int1W R3 14 15 16 17 18 19 20 21 22 23 24 25 1 2 3 4 5 6 7 8 9 10 11 nStiffPU P30 P31 P32 P33 RxD0 RxD1 RxD2 RxD3 TxD3 TxD2 TxD1 TxD0 VCC3 nPCE[0..3] 1.5K RxD[3:0] P3[3:0] MDIO VCC3 RxClk RxDV RxEr TxEn Col TxD[3:0] CRS nRstOut 1K RXD.0 RXD.1 RXD.2 RXD.3 MDC MDIO P3.0/RXD0 P3.1/TXD0 P3.2/INT0* P3.3/INT1* P3.4/T0 P3.5/T1/CLKO CRS COL TXD.3 TXD.2 TXD.1 TXD.0 TX_EN TXCLK RX_ER RXCLK RX_DV DS1 LED C6 DS80C400 U1 " 27pF C7 14.74 5 6 M H z Y1 VCC3 27pF P7.3/A3 P7.4/A4 P7.5/A5 P7.6/A6 P7.7/A7 VCC1 EA* ALE PSEN* P2.0/A8 P2.1/A9 P2.2/A10 P2.3/A11 P2.4/A12 P2.5/A13 P2.6/A14 P2.7/A15 P6.0/CE4* P6.1/CE5* P6.2/CE6* P6.3/CE7* P6.4/A20 P6.5/A21 XTAL2 XTAL1 Reset P3.6/WR* P3.7/RD* P5.7/PCE3* P5.6/PCE2* P5.5/PCE1* P5.4/PCE0* P5.3 P5.2/T3 P5.1/C0RX P5.0/C0TX 26 27 ! 28 ! 29 ! 30 !" 3 1 32 33 34 35 P53 P52 P51 P50 & $ 37 38 # % $ & P1[7:0] P17 P16 P15 P14 P13 P12 P11 P10 100 99 98 97 96 95 94 93 92 91 90 89 OWSTP* OW RSTOL RST P1.7/INT5* P1.6/INT4 P1.5/INT3* P1.4/INT2 P1.3/TXD1 P1.2/RXD1 P1.1/T2EX P1.0/T2 " 86 85 84 83 82 81 80 79 78 77 76 P0.0/D0 P0.1/D1 P0.2/D2 P0.3/D3 P0.4/D4 P0.5/D5 P0.6/D6 P0.7/D7 P7.0/A0 P7.1/A1 P7.2/A2 MUX* P4.7/A19 P4.6/A18 P4.5/A17 P4.4/A16 P4.3/CE3* P4.2/CE2* P4.1/CE1* P4.0/CE0* P6.7/TXD2 P6.6/RXD2 40 41 42 43 44 45 46 47 48 49 50 ! ! ! !" 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